#ifndef _SMM_CIS_H_\r
#define _SMM_CIS_H_\r
\r
+//\r
+// Share some common definitions with PI SMM\r
+//\r
+#include <Pi/PiSmmCis.h>\r
+#include <Protocol/SmmCpuIo.h>\r
+\r
#define EFI_SMM_CPU_IO_GUID \\r
{ \\r
0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r
//\r
// SMM Base specification constant and types\r
//\r
-#define SMM_SMST_SIGNATURE SIGNATURE_32 ('S', 'M', 'S', 'T')\r
#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r
\r
-//\r
-// *******************************************************\r
-// EFI_SMM_IO_WIDTH\r
-// *******************************************************\r
-//\r
-typedef enum {\r
- SMM_IO_UINT8 = 0,\r
- SMM_IO_UINT16 = 1,\r
- SMM_IO_UINT32 = 2,\r
- SMM_IO_UINT64 = 3\r
-} EFI_SMM_IO_WIDTH;\r
-\r
/**\r
Provides the basic memory and I/O interfaces that are used to\r
abstract accesses to devices.\r
IN UINTN NumberOfPages\r
);\r
\r
-/**\r
- Lets the caller get one distinct application processor (AP) in the enabled processor pool to execite a \r
- caller-provided code stream while in SMM. \r
-\r
- @param Procedure A pointer to the code stream to be run on the designated AP of the system.\r
- @param CpuNumber The zero-based index of the processor number of the AP on which the code stream is\r
- supposed to run. If the processor number points to the current processor or a disabled\r
- processor, then it will not run the supplied code.\r
- @param ProcArguments Allows the caller to pass a list of parameters to the code that is run by\r
- the AP. It is an optional common mailbox between APs and the BSP to share information.\r
-\r
- @retval EFI_SUCCESS The call was successful and the return parameters are valid.\r
- @retval EFI_INVALID_PARAMETER The input arguments are out of range.\r
- @retval EFI_INVALID_PARAMETER The CPU requested is not available on this SMI invocation.\r
- @retval EFI_INVALID_PARAMETER The CPU cannot support an additional service invocation.\r
- \r
- @note: Inconsistent with specification here:\r
- In Framework Spec, this definition does not exist. This method is introduced in PI1.0 spec for \r
- implementation needs.\r
- \r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_SMM_STARTUP_THIS_AP)(\r
- IN FRAMEWORK_EFI_AP_PROCEDURE Procedure,\r
- IN UINTN CpuNumber,\r
- IN OUT VOID *ProcArguments OPTIONAL\r
- );\r
-\r
///\r
/// The processor save-state information for IA-32 processors. This information is important in that the\r
/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_\r
#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_\r
\r
+//\r
+// Share some common definitions with PI SMM\r
+//\r
+#include <Protocol/SmmAccess2.h>\r
+\r
#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \\r
{ \\r
0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } \\r
}\r
\r
-///\r
-/// Describes the candidate regions for SMRAM that are\r
-/// supported by this platform.\r
-///\r
-typedef struct {\r
- EFI_PHYSICAL_ADDRESS PhysicalStart; ///< Designates the physical address of the SMRAM in memory.\r
- EFI_PHYSICAL_ADDRESS CpuStart; ///< Designates the address of the SMRAM, as seen by software executing on the processors. \r
- UINT64 PhysicalSize; ///< Describes the number of bytes in the SMRAM region.\r
- UINT64 RegionState; ///< Describes the accessibility attributes of the SMRAM.\r
-} EFI_SMRAM_DESCRIPTOR;\r
-\r
-///\r
-/// Definition of SMRAM states, used as value for EFI_SMRAM_DESCRIPTOR.RegionState.\r
-///@{\r
-#define EFI_SMRAM_OPEN 0x00000001\r
-#define EFI_SMRAM_CLOSED 0x00000002\r
-#define EFI_SMRAM_LOCKED 0x00000004\r
-#define EFI_CACHEABLE 0x00000008\r
-#define EFI_ALLOCATED 0x00000010\r
-///@}\r
-\r
/**\r
* GUID specific data structure of HOB for reserving SMRAM regions.\r
*\r
0x3792095a, 0xe309, 0x4c1e, {0xaa, 0x01, 0x85, 0xf5, 0x65, 0x5a, 0x17, 0xf1 } \\r
}\r
\r
-//\r
-// SMM Access specification constant and types\r
-//\r
-// *******************************************************\r
-// EFI_SMRAM_STATE\r
-// *******************************************************\r
-//\r
-#define EFI_SMRAM_OPEN 0x00000001\r
-#define EFI_SMRAM_CLOSED 0x00000002\r
-#define EFI_SMRAM_LOCKED 0x00000004\r
-#define EFI_CACHEABLE 0x00000008\r
-#define EFI_ALLOCATED 0x00000010\r
-\r
//\r
// SMM Access specification Member Function\r
//\r
#ifndef _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_\r
#define _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_\r
\r
+//\r
+// Share some common definitions with PI SMM\r
+//\r
+#include <Protocol/SmmStandbyButtonDispatch2.h>\r
+\r
//\r
// Global ID for the Standby Button SMI Protocol\r
//\r
// Related Definitions\r
//\r
\r
-///\r
-/// Standby Button. Example, Use for changing LEDs before ACPI OS is on.\r
-/// - DXE/BDS Phase\r
-/// - OS Install Phase\r
-///\r
-typedef enum {\r
- EfiStandbyButtonEntry,\r
- EfiStandbyButtonExit\r
-} EFI_STANDBY_BUTTON_PHASE;\r
-\r
typedef struct {\r
/// Describes whether the child handler should be invoked upon the entry to the button\r
/// activation or upon exit (i.e., upon receipt of the button press event or upon release of\r
#ifndef _EFI_SMM_SX_DISPATCH_H_\r
#define _EFI_SMM_SX_DISPATCH_H_\r
\r
+//\r
+// Share some common definitions with PI SMM\r
+//\r
+#include <Protocol/SmmSxDispatch2.h>\r
\r
//\r
// Global ID for the Sx SMI Protocol\r
}\r
\r
typedef struct _EFI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH_PROTOCOL;\r
-//\r
-// Related Definitions\r
-//\r
-typedef enum {\r
- SxS0,\r
- SxS1,\r
- SxS2,\r
- SxS3,\r
- SxS4,\r
- SxS5,\r
- EfiMaximumSleepType\r
-} EFI_SLEEP_TYPE;\r
-\r
-typedef enum {\r
- SxEntry,\r
- SxExit,\r
- EfiMaximumPhase\r
-} EFI_SLEEP_PHASE;\r
\r
typedef struct {\r
EFI_SLEEP_TYPE Type;\r
#ifndef _EFI_SMM_USB_DISPATCH_H_\r
#define _EFI_SMM_USB_DISPATCH_H_\r
\r
+//\r
+// Share some common definitions with PI SMM\r
+//\r
+#include <Protocol/SmmUsbDispatch2.h>\r
\r
//\r
// Global ID for the USB Protocol\r
\r
typedef struct _EFI_SMM_USB_DISPATCH_PROTOCOL EFI_SMM_USB_DISPATCH_PROTOCOL;\r
\r
-//\r
-// Related Definitions\r
-//\r
-typedef enum {\r
- UsbLegacy,\r
- UsbWake\r
-} EFI_USB_SMI_TYPE;\r
-\r
typedef struct {\r
///\r
/// Describes whether this child handler will be invoked in response to a USB legacy\r
#include <Pi/PiMultiPhase.h>\r
#include <Protocol/SmmCpuIo.h>\r
\r
-typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_SYSTEM_TABLE -> EFI_SMM_SYSTEM_TABLE2\r
+/// EFI_SMM_SYSTEM_TABLE_REVISION -> EFI_SMM_SYSTEM_TABLE2_REVISION\r
+/// EFI_SMM_INSTALL_CONFIGURATION_TABLE -> EFI_SMM_INSTALL_CONFIGURATION_TABLE2\r
+///\r
+\r
+typedef struct _EFI_SMM_SYSTEM_TABLE2 EFI_SMM_SYSTEM_TABLE2;\r
\r
///\r
/// The System Management System Table (SMST) signature\r
///\r
/// The System Management System Table (SMST) revision is 1.0\r
///\r
-#define EFI_SMM_SYSTEM_TABLE_REVISION ((1 << 16) | (0x00))\r
+#define EFI_SMM_SYSTEM_TABLE2_REVISION ((1 << 16) | (0x00))\r
\r
/**\r
Adds, updates, or removes a configuration table entry from the System Management System Table.\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r
- IN CONST EFI_SMM_SYSTEM_TABLE *SystemTable,\r
- IN CONST EFI_GUID *Guid,\r
- IN VOID *Table,\r
- IN UINTN TableSize\r
+(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE2)(\r
+ IN CONST EFI_SMM_SYSTEM_TABLE2 *SystemTable,\r
+ IN CONST EFI_GUID *Guid,\r
+ IN VOID *Table,\r
+ IN UINTN TableSize\r
);\r
\r
/**\r
/// services for managing SMRAM allocation and providing basic I/O services. These services are \r
/// intended for both preboot and runtime usage.\r
///\r
-struct _EFI_SMM_SYSTEM_TABLE {\r
+struct _EFI_SMM_SYSTEM_TABLE2 {\r
///\r
/// The table header for the SMST.\r
///\r
- EFI_TABLE_HEADER Hdr;\r
+ EFI_TABLE_HEADER Hdr;\r
///\r
/// A pointer to a NULL-terminated Unicode string containing the vendor name.\r
/// It is permissible for this pointer to be NULL.\r
///\r
- CHAR16 *SmmFirmwareVendor;\r
+ CHAR16 *SmmFirmwareVendor;\r
///\r
/// The particular revision of the firmware.\r
///\r
- UINT32 SmmFirmwareRevision;\r
+ UINT32 SmmFirmwareRevision;\r
\r
- EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
+ EFI_SMM_INSTALL_CONFIGURATION_TABLE2 SmmInstallConfigurationTable;\r
\r
///\r
/// I/O Service\r
///\r
- EFI_SMM_CPU_IO_PROTOCOL SmmIo;\r
+ EFI_SMM_CPU_IO_PROTOCOL SmmIo;\r
\r
///\r
/// Runtime memory services\r
///\r
- EFI_ALLOCATE_POOL SmmAllocatePool;\r
- EFI_FREE_POOL SmmFreePool;\r
- EFI_ALLOCATE_PAGES SmmAllocatePages;\r
- EFI_FREE_PAGES SmmFreePages;\r
+ EFI_ALLOCATE_POOL SmmAllocatePool;\r
+ EFI_FREE_POOL SmmFreePool;\r
+ EFI_ALLOCATE_PAGES SmmAllocatePages;\r
+ EFI_FREE_PAGES SmmFreePages;\r
\r
///\r
/// MP service\r
///\r
- EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r
+ EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r
\r
///\r
/// CPU information records\r
/// A number between zero and and the NumberOfCpus field. This field designates \r
/// which processor is executing the SMM infrastructure.\r
///\r
- UINTN CurrentlyExecutingCpu;\r
+ UINTN CurrentlyExecutingCpu;\r
///\r
/// The number of current operational processors in the platform. This is a 1 based counter.\r
///\r
- UINTN NumberOfCpus;\r
+ UINTN NumberOfCpus;\r
///\r
/// Points to an array, where each element describes the number of bytes in the \r
/// corresponding save state specified by CpuSaveState. There are always \r
/// NumberOfCpus entries in the array. \r
///\r
- UINTN *CpuSaveStateSize;\r
+ UINTN *CpuSaveStateSize;\r
///\r
/// Points to an array, where each element is a pointer to a CPU save state. The \r
/// corresponding element in CpuSaveStateSize specifies the number of bytes in the \r
/// save state area. There are always NumberOfCpus entries in the array.\r
///\r
- VOID **CpuSaveState;\r
+ VOID **CpuSaveState;\r
\r
///\r
/// Extensibility table\r
///\r
/// The number of UEFI Configuration Tables in the buffer SmmConfigurationTable.\r
///\r
- UINTN NumberOfTableEntries;\r
+ UINTN NumberOfTableEntries;\r
///\r
/// A pointer to the UEFI Configuration Tables. The number of entries in the table is \r
/// NumberOfTableEntries. \r
///\r
- EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
+ EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
\r
///\r
/// Protocol services\r
///\r
- EFI_INSTALL_PROTOCOL_INTERFACE SmmInstallProtocolInterface;\r
- EFI_UNINSTALL_PROTOCOL_INTERFACE SmmUninstallProtocolInterface;\r
- EFI_HANDLE_PROTOCOL SmmHandleProtocol;\r
- EFI_SMM_REGISTER_PROTOCOL_NOTIFY SmmRegisterProtocolNotify;\r
- EFI_LOCATE_HANDLE SmmLocateHandle;\r
- EFI_LOCATE_PROTOCOL SmmLocateProtocol;\r
+ EFI_INSTALL_PROTOCOL_INTERFACE SmmInstallProtocolInterface;\r
+ EFI_UNINSTALL_PROTOCOL_INTERFACE SmmUninstallProtocolInterface;\r
+ EFI_HANDLE_PROTOCOL SmmHandleProtocol;\r
+ EFI_SMM_REGISTER_PROTOCOL_NOTIFY SmmRegisterProtocolNotify;\r
+ EFI_LOCATE_HANDLE SmmLocateHandle;\r
+ EFI_LOCATE_PROTOCOL SmmLocateProtocol;\r
\r
///\r
/// SMI Management functions\r
///\r
- EFI_SMM_INTERRUPT_MANAGE SmiManage;\r
- EFI_SMM_INTERRUPT_REGISTER SmiHandlerRegister;\r
- EFI_SMM_INTERRUPT_UNREGISTER SmiHandlerUnRegister;\r
+ EFI_SMM_INTERRUPT_MANAGE SmiManage;\r
+ EFI_SMM_INTERRUPT_REGISTER SmiHandlerRegister;\r
+ EFI_SMM_INTERRUPT_UNREGISTER SmiHandlerUnRegister;\r
};\r
\r
#endif\r
\r
#include <PiDxe.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_OPEN -> EFI_SMM_OPEN2\r
+/// EFI_SMM_CLOSE -> EFI_SMM_CLOSE2\r
+/// EFI_SMM_LOCK -> EFI_SMM_LOCK2\r
+/// EFI_SMM_CAPABILITIES -> EFI_SMM_CAPABILITIES2\r
+///\r
+\r
#define EFI_SMM_ACCESS2_PROTOCOL_GUID \\r
{ \\r
0xc2702b74, 0x800c, 0x4131, {0x87, 0x46, 0x8f, 0xb5, 0xb8, 0x9c, 0xe4, 0xac } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_OPEN)(\r
+(EFIAPI *EFI_SMM_OPEN2)(\r
IN EFI_SMM_ACCESS2_PROTOCOL *This\r
);\r
\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_CLOSE)(\r
+(EFIAPI *EFI_SMM_CLOSE2)(\r
IN EFI_SMM_ACCESS2_PROTOCOL *This\r
);\r
\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_LOCK)(\r
+(EFIAPI *EFI_SMM_LOCK2)(\r
IN EFI_SMM_ACCESS2_PROTOCOL *This\r
);\r
\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_CAPABILITIES)(\r
+(EFIAPI *EFI_SMM_CAPABILITIES2)(\r
IN CONST EFI_SMM_ACCESS2_PROTOCOL *This,\r
IN OUT UINTN *SmramMapSize,\r
IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap\r
/// that the north bridge or memory controller would publish this protocol.\r
/// \r
struct _EFI_SMM_ACCESS2_PROTOCOL {\r
- EFI_SMM_OPEN Open;\r
- EFI_SMM_CLOSE Close;\r
- EFI_SMM_LOCK Lock;\r
- EFI_SMM_CAPABILITIES GetCapabilities;\r
+ EFI_SMM_OPEN2 Open;\r
+ EFI_SMM_CLOSE2 Close;\r
+ EFI_SMM_LOCK2 Lock;\r
+ EFI_SMM_CAPABILITIES2 GetCapabilities;\r
///\r
/// Indicates the current state of the SMRAM. Set to TRUE if SMRAM is locked.\r
///\r
\r
#include <PiDxe.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_ACTIVATE -> EFI_SMM_ACTIVATE2\r
+/// EFI_SMM_DEACTIVATE -> EFI_SMM_DEACTIVATE2\r
+///\r
+\r
#define EFI_SMM_CONTROL2_PROTOCOL_GUID \\r
{ \\r
0x843dc720, 0xab1e, 0x42cb, {0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b} \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_ACTIVATE)(\r
+(EFIAPI *EFI_SMM_ACTIVATE2)(\r
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
IN OUT UINT8 *CommandPort OPTIONAL,\r
IN OUT UINT8 *DataPort OPTIONAL,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_DEACTIVATE)(\r
+(EFIAPI *EFI_SMM_DEACTIVATE2)(\r
IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
IN BOOLEAN Periodic OPTIONAL\r
);\r
/// these signals.\r
///\r
struct _EFI_SMM_CONTROL2_PROTOCOL {\r
- EFI_SMM_ACTIVATE Trigger;\r
- EFI_SMM_DEACTIVATE Clear;\r
+ EFI_SMM_ACTIVATE2 Trigger;\r
+ EFI_SMM_DEACTIVATE2 Clear;\r
///\r
/// Minimum interval at which the platform can set the period. A maximum is not \r
/// specified in that the SMM infrastructure code can emulate a maximum interval that is \r
#ifndef _SMM_CPU_IO_H_\r
#define _SMM_CPU_IO_H_\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_CPU_IO -> EFI_SMM_CPU_IO2\r
+/// EFI_SMM_IO_ACCESS -> EFI_SMM_IO_ACCESS2\r
+///\r
+\r
#define EFI_SMM_CPU_IO_PROTOCOL_GUID \\r
{ \\r
0x3242A9D8, 0xCE70, 0x4AA0, { 0x95, 0x5D, 0x5E, 0x7B, 0x14, 0x0D, 0xE4, 0xD2 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_CPU_IO)(\r
+(EFIAPI *EFI_SMM_CPU_IO2)(\r
IN CONST EFI_SMM_CPU_IO_PROTOCOL *This,\r
IN EFI_SMM_IO_WIDTH Width,\r
IN UINT64 Address,\r
///\r
/// This service provides the various modalities of memory and I/O read.\r
///\r
- EFI_SMM_CPU_IO Read;\r
+ EFI_SMM_CPU_IO2 Read;\r
///\r
/// This service provides the various modalities of memory and I/O write.\r
///\r
- EFI_SMM_CPU_IO Write;\r
-} EFI_SMM_IO_ACCESS;\r
+ EFI_SMM_CPU_IO2 Write;\r
+} EFI_SMM_IO_ACCESS2;\r
\r
///\r
/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.\r
///\r
typedef struct _EFI_SMM_CPU_IO_PROTOCOL {\r
- EFI_SMM_IO_ACCESS Mem; ///< Allows reads and writes to memory-mapped I/O space.\r
- EFI_SMM_IO_ACCESS Io; ///< Allows reads and writes to I/O space.\r
+ EFI_SMM_IO_ACCESS2 Mem; ///< Allows reads and writes to memory-mapped I/O space.\r
+ EFI_SMM_IO_ACCESS2 Io; ///< Allows reads and writes to I/O space.\r
};\r
\r
extern EFI_GUID gEfiSmmCpuIoProtocolGuid;\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_GPI_REGISTER -> EFI_SMM_GPI_REGISTER2\r
+/// EFI_SMM_GPI_UNREGISTER -> EFI_SMM_GPI_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_GPI_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x25566b03, 0xb577, 0x4cbf, {0x95, 0x8c, 0xed, 0x66, 0x3e, 0xa2, 0x43, 0x80 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_GPI_REGISTER)(\r
+(EFIAPI *EFI_SMM_GPI_REGISTER2)(\r
IN CONST EFI_SMM_GPI_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN CONST EFI_SMM_GPI_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_GPI_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_GPI_UNREGISTER2)(\r
IN CONST EFI_SMM_GPI_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// for the General Purpose Input (GPI) SMI source generator.\r
///\r
struct _EFI_SMM_GPI_DISPATCH2_PROTOCOL {\r
- EFI_SMM_GPI_REGISTER Register;\r
- EFI_SMM_GPI_UNREGISTER UnRegister;\r
+ EFI_SMM_GPI_REGISTER2 Register;\r
+ EFI_SMM_GPI_UNREGISTER2 UnRegister;\r
///\r
/// Denotes the maximum value of inputs that can have handlers attached.\r
///\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_PERIODIC_TIMER_REGISTER -> EFI_SMM_PERIODIC_TIMER_REGISTER2\r
+/// EFI_SMM_PERIODIC_TIMER_UNREGISTER -> EFI_SMM_PERIODIC_TIMER_UNREGISTER2\r
+/// EFI_SMM_PERIODIC_TIMER_INTERVAL -> EFI_SMM_PERIODIC_TIMER_INTERVAL2\r
+///\r
+\r
#define EFI_SMM_PERIODIC_TIMER_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x4cec368e, 0x8e8e, 0x4d71, {0x8b, 0xe1, 0x95, 0x8c, 0x45, 0xfc, 0x8a, 0x53 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_PERIODIC_TIMER_REGISTER)(\r
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_REGISTER2)(\r
IN CONST EFI_SMM_PERIODIC_TIMER_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN CONST EFI_SMM_PERIODIC_TIMER_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_PERIODIC_TIMER_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_UNREGISTER2)(\r
IN CONST EFI_SMM_PERIODIC_TIMER_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_PERIODIC_TIMER_INTERVAL)(\r
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_INTERVAL2)(\r
IN CONST EFI_SMM_PERIODIC_TIMER_DISPATCH2_PROTOCOL *This,\r
IN OUT UINT64 **SmiTickInterval\r
);\r
/// This protocol provides the parent dispatch service for the periodical timer SMI source generator.\r
///\r
struct _EFI_SMM_PERIODIC_TIMER_DISPATCH2_PROTOCOL {\r
- EFI_SMM_PERIODIC_TIMER_REGISTER Register;\r
- EFI_SMM_PERIODIC_TIMER_UNREGISTER UnRegister;\r
- EFI_SMM_PERIODIC_TIMER_INTERVAL GetNextShorterInterval;\r
+ EFI_SMM_PERIODIC_TIMER_REGISTER2 Register;\r
+ EFI_SMM_PERIODIC_TIMER_UNREGISTER2 UnRegister;\r
+ EFI_SMM_PERIODIC_TIMER_INTERVAL2 GetNextShorterInterval;\r
};\r
\r
extern EFI_GUID gEfiSmmPeriodicTimerDispatch2ProtocolGuid;\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_POWER_BUTTON_REGISTER -> EFI_SMM_POWER_BUTTON_REGISTER2\r
+/// EFI_SMM_POWER_BUTTON_UNREGISTER -> EFI_SMM_POWER_BUTTON_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_POWER_BUTTON_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x1b1183fa, 0x1823, 0x46a7, {0x88, 0x72, 0x9c, 0x57, 0x87, 0x55, 0x40, 0x9d } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_POWER_BUTTON_REGISTER)(\r
+(EFIAPI *EFI_SMM_POWER_BUTTON_REGISTER2)(\r
IN CONST EFI_SMM_POWER_BUTTON_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN EFI_SMM_POWER_BUTTON_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_POWER_BUTTON_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_POWER_BUTTON_UNREGISTER2)(\r
IN CONST EFI_SMM_POWER_BUTTON_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// This protocol provides the parent dispatch service for the power button SMI source generator.\r
///\r
struct _EFI_SMM_POWER_BUTTON_DISPATCH2_PROTOCOL {\r
- EFI_SMM_POWER_BUTTON_REGISTER Register;\r
- EFI_SMM_POWER_BUTTON_UNREGISTER UnRegister;\r
+ EFI_SMM_POWER_BUTTON_REGISTER2 Register;\r
+ EFI_SMM_POWER_BUTTON_UNREGISTER2 UnRegister;\r
};\r
\r
extern EFI_GUID gEfiSmmPowerButtonDispatch2ProtocolGuid;\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_STANDBY_BUTTON_REGISTER -> EFI_SMM_STANDBY_BUTTON_REGISTER2\r
+/// EFI_SMM_STANDBY_BUTTON_UNREGISTER -> EFI_SMM_STANDBY_BUTTON_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_STANDBY_BUTTON_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x7300c4a1, 0x43f2, 0x4017, {0xa5, 0x1b, 0xc8, 0x1a, 0x7f, 0x40, 0x58, 0x5b } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_STANDBY_BUTTON_REGISTER)(\r
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_REGISTER2)(\r
IN CONST EFI_SMM_STANDBY_BUTTON_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN EFI_SMM_STANDBY_BUTTON_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_STANDBY_BUTTON_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_UNREGISTER2)(\r
IN CONST EFI_SMM_STANDBY_BUTTON_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// button SMI source generator.\r
///\r
struct _EFI_SMM_STANDBY_BUTTON_DISPATCH2_PROTOCOL {\r
- EFI_SMM_STANDBY_BUTTON_REGISTER Register;\r
- EFI_SMM_STANDBY_BUTTON_UNREGISTER UnRegister;\r
+ EFI_SMM_STANDBY_BUTTON_REGISTER2 Register;\r
+ EFI_SMM_STANDBY_BUTTON_UNREGISTER2 UnRegister;\r
};\r
\r
extern EFI_GUID gEfiSmmStandbyButtonDispatch2ProtocolGuid;\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_SW_REGISTER -> EFI_SMM_SW_REGISTER2\r
+/// EFI_SMM_SW_UNREGISTER -> EFI_SMM_SW_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_SW_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x18a3c6dc, 0x5eea, 0x48c8, {0xa1, 0xc1, 0xb5, 0x33, 0x89, 0xf9, 0x89, 0x99 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_SW_REGISTER)(\r
+(EFIAPI *EFI_SMM_SW_REGISTER2)(\r
IN CONST EFI_SMM_SW_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN CONST EFI_SMM_SW_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_SW_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_SW_UNREGISTER2)(\r
IN CONST EFI_SMM_SW_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// interrupt in the EFI_SMM_SW_REGISTER_CONTEXT is denoted by MaximumSwiValue.\r
///\r
struct _EFI_SMM_SW_DISPATCH2_PROTOCOL {\r
- EFI_SMM_SW_REGISTER Register;\r
- EFI_SMM_SW_UNREGISTER UnRegister;\r
+ EFI_SMM_SW_REGISTER2 Register;\r
+ EFI_SMM_SW_UNREGISTER2 UnRegister;\r
///\r
/// A read-only field that describes the maximum value that can be used in the \r
/// EFI_SMM_SW_DISPATCH2_PROTOCOL.Register() service.\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_SX_REGISTER -> EFI_SMM_SX_REGISTER2\r
+/// EFI_SMM_SX_UNREGISTER -> EFI_SMM_SX_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_SX_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0x456d2859, 0xa84b, 0x4e47, {0xa2, 0xee, 0x32, 0x76, 0xd8, 0x86, 0x99, 0x7d } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_SX_REGISTER)(\r
+(EFIAPI *EFI_SMM_SX_REGISTER2)(\r
IN CONST EFI_SMM_SX_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN CONST EFI_SMM_SX_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_SX_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_SX_UNREGISTER2)(\r
IN CONST EFI_SMM_SX_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// respond to sleep state related events.\r
///\r
struct _EFI_SMM_SX_DISPATCH2_PROTOCOL {\r
- EFI_SMM_SX_REGISTER Register;\r
- EFI_SMM_SX_UNREGISTER UnRegister;\r
+ EFI_SMM_SX_REGISTER2 Register;\r
+ EFI_SMM_SX_UNREGISTER2 UnRegister;\r
};\r
\r
extern EFI_GUID gEfiSmmSxDispatch2ProtocolGuid;\r
\r
#include <Pi/PiSmmCis.h>\r
\r
+///\r
+/// Note:\r
+/// To avoid name conflict between PI and Framework SMM spec, the following names defined\r
+/// in PI 1.2 SMM spec are renamed. These renamings are not yet in a public PI spec and errta.\r
+///\r
+/// EFI_SMM_USB_REGISTER -> EFI_SMM_USB_REGISTER2\r
+/// EFI_SMM_USB_UNREGISTER -> EFI_SMM_USB_UNREGISTER2\r
+///\r
+\r
#define EFI_SMM_USB_DISPATCH2_PROTOCOL_GUID \\r
{ \\r
0xee9b8d90, 0xc5a6, 0x40a2, {0xbd, 0xe2, 0x52, 0x55, 0x8d, 0x33, 0xcc, 0xa1 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_USB_REGISTER)(\r
+(EFIAPI *EFI_SMM_USB_REGISTER2)(\r
IN CONST EFI_SMM_USB_DISPATCH2_PROTOCOL *This,\r
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,\r
IN CONST EFI_SMM_USB_REGISTER_CONTEXT *RegisterContext,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_SMM_USB_UNREGISTER)(\r
+(EFIAPI *EFI_SMM_USB_UNREGISTER2)(\r
IN CONST EFI_SMM_USB_DISPATCH2_PROTOCOL *This,\r
IN EFI_HANDLE DispatchHandle\r
);\r
/// This protocol provides the parent dispatch service for the USB SMI source generator.\r
///\r
struct _EFI_SMM_USB_DISPATCH2_PROTOCOL {\r
- EFI_SMM_USB_REGISTER Register;\r
- EFI_SMM_USB_UNREGISTER UnRegister;\r
+ EFI_SMM_USB_REGISTER2 Register;\r
+ EFI_SMM_USB_UNREGISTER2 UnRegister;\r
};\r
\r
extern EFI_GUID gEfiSmmUsbDispatch2ProtocolGuid;\r
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