PersistAcrossReset capsules\r
\r
Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials are licensed and made available\r
under the terms and conditions of the BSD License which accompanies this\r
\r
#include "CapsuleService.h"\r
\r
-#include <Library/CacheMaintenanceLib.h>\r
-\r
/**\r
Whether the platform supports capsules that persist across reset. Note that\r
some platforms only support such capsules at boot time.\r
return FeaturePcdGet (PcdSupportUpdateCapsuleReset) && !EfiAtRuntime ();\r
}\r
\r
-/**\r
- Writes Back a range of data cache lines covering a set of capsules in memory.\r
-\r
- Writes Back the data cache lines specified by ScatterGatherList.\r
-\r
- @param ScatterGatherList Physical address of the data structure that\r
- describes a set of capsules in memory\r
-\r
-**/\r
-VOID\r
-CapsuleCacheWriteBack (\r
- IN EFI_PHYSICAL_ADDRESS ScatterGatherList\r
- )\r
-{\r
- EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc;\r
-\r
- Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList;\r
- do {\r
- WriteBackDataCacheRange (Desc, sizeof *Desc);\r
-\r
- if (Desc->Length > 0) {\r
- WriteBackDataCacheRange ((VOID *)(UINTN)Desc->Union.DataBlock,\r
- Desc->Length\r
- );\r
- Desc++;\r
- } else if (Desc->Union.ContinuationPointer > 0) {\r
- Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc->Union.ContinuationPointer;\r
- }\r
- } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0);\r
-\r
- WriteBackDataCacheRange (Desc, sizeof *Desc);\r
-}\r
--- /dev/null
+/** @file\r
+ Flush the cache is required for most architectures while do capsule\r
+ update. It is not support at Runtime.\r
+\r
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials are licensed and made available\r
+ under the terms and conditions of the BSD License which accompanies this\r
+ distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "CapsuleService.h"\r
+\r
+#include <Library/CacheMaintenanceLib.h>\r
+\r
+/**\r
+ Writes Back a range of data cache lines covering a set of capsules in memory.\r
+\r
+ Writes Back the data cache lines specified by ScatterGatherList.\r
+\r
+ @param ScatterGatherList Physical address of the data structure that\r
+ describes a set of capsules in memory\r
+\r
+**/\r
+VOID\r
+CapsuleCacheWriteBack (\r
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList\r
+ )\r
+{\r
+ EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc;\r
+\r
+ if (!EfiAtRuntime ()) {\r
+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList;\r
+ do {\r
+ WriteBackDataCacheRange (\r
+ (VOID *)(UINTN)Desc,\r
+ (UINTN)sizeof (*Desc)\r
+ );\r
+\r
+ if (Desc->Length > 0) {\r
+ WriteBackDataCacheRange (\r
+ (VOID *)(UINTN)Desc->Union.DataBlock,\r
+ (UINTN)Desc->Length\r
+ );\r
+ Desc++;\r
+ } else if (Desc->Union.ContinuationPointer > 0) {\r
+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc->Union.ContinuationPointer;\r
+ }\r
+ } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0);\r
+\r
+ WriteBackDataCacheRange (\r
+ (VOID *)(UINTN)Desc,\r
+ (UINTN)sizeof (*Desc)\r
+ );\r
+ }\r
+}\r
+\r
--- /dev/null
+/** @file\r
+ Null function version of cache function.\r
+\r
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials are licensed and made available\r
+ under the terms and conditions of the BSD License which accompanies this\r
+ distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "CapsuleService.h"\r
+\r
+#include <Library/CacheMaintenanceLib.h>\r
+\r
+/**\r
+ Writes Back a range of data cache lines covering a set of capsules in memory.\r
+\r
+ Writes Back the data cache lines specified by ScatterGatherList.\r
+\r
+ Null version, do nothing.\r
+\r
+ @param ScatterGatherList Physical address of the data structure that\r
+ describes a set of capsules in memory\r
+\r
+**/\r
+VOID\r
+CapsuleCacheWriteBack (\r
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList\r
+ )\r
+{\r
+}\r
+\r
PersistAcrossReset capsules\r
\r
Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials are licensed and made available\r
under the terms and conditions of the BSD License which accompanies this\r
return FeaturePcdGet (PcdSupportUpdateCapsuleReset);\r
}\r
\r
-/**\r
- Writes Back a range of data cache lines covering a set of capsules in memory.\r
-\r
- Writes Back the data cache lines specified by ScatterGatherList.\r
-\r
- @param ScatterGatherList Physical address of the data structure that\r
- describes a set of capsules in memory\r
-\r
-**/\r
-VOID\r
-CapsuleCacheWriteBack (\r
- IN EFI_PHYSICAL_ADDRESS ScatterGatherList\r
- )\r
-{\r
-}\r
# It installs the Capsule Architectural Protocol defined in PI1.0a to signify\r
# the capsule runtime services are ready.\r
#\r
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
\r
[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64]\r
SaveLongModeContext.c\r
- CapsuleReset.c\r
\r
-[Sources.X64]\r
- X64/SaveLongModeContext.c\r
+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64]\r
+ CapsuleCache.c\r
+\r
+[Sources.Ia32, Sources.X64, Sources.EBC]\r
CapsuleReset.c\r
\r
[Sources.ARM, Sources.AARCH64]\r
- SaveLongModeContext.c\r
Arm/CapsuleReset.c\r
\r
+[Sources.EBC]\r
+ CapsuleCacheNull.c\r
+\r
+[Sources.X64]\r
+ X64/SaveLongModeContext.c\r
+\r
[Packages]\r
MdePkg/MdePkg.dec\r
MdeModulePkg/MdeModulePkg.dec\r
BaseLib\r
PrintLib\r
BaseMemoryLib\r
+ CacheMaintenanceLib\r
\r
[LibraryClasses.X64]\r
UefiLib\r
BaseMemoryLib\r
\r
-[LibraryClasses.ARM, LibraryClasses.AARCH64]\r
- CacheMaintenanceLib\r
-\r
[Guids]\r
## SOMETIMES_PRODUCES ## Variable:L"CapsuleUpdateData" # (Process across reset capsule image) for capsule updated data\r
## SOMETIMES_PRODUCES ## Variable:L"CapsuleLongModeBuffer" # The long mode buffer used by IA32 Capsule PEIM to call X64 CapsuleCoalesce code to handle >4GB capsule blocks\r