MdePkg/Library/Pci: Fix various typos

Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-26-philmd@redhat.com>

diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h
index 41558dabddc2fac32dabca412076ac88916611e4..7e22a527a80e2b58bf2e0143ae9840a0ea555e9a 100644 (file)
--- a/MdePkg/Include/Library/PciCf8Lib.h
+++ b/MdePkg/Include/Library/PciCf8Lib.h
@@ -1027,7 +1027,7 @@ PciCf8BitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1060,7 +1060,7 @@ PciCf8ReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r

diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Library/PciExpressLib.h
index aec2b5f3777d125f4a55b2573c2630cdd0bd2f6b..826fdcf7db6cfdd855c40dd96256ee1f05aff362 100644 (file)
--- a/MdePkg/Include/Library/PciExpressLib.h
+++ b/MdePkg/Include/Library/PciExpressLib.h
@@ -997,7 +997,7 @@ PciExpressBitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1029,7 +1029,7 @@ PciExpressReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r

diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h
index 7a7d42050f0adeaeb4a44a84d970536ec6bf49b7..836494b6c1d798e35914da3f60b5326fa7a1d18f 100644 (file)
--- a/MdePkg/Include/Library/PciLib.h
+++ b/MdePkg/Include/Library/PciLib.h
@@ -997,7 +997,7 @@ PciBitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1029,7 +1029,7 @@ PciReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r

diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Library/PciSegmentLib.h
index bd31f05a23fe2894918a494c4132c9b1260a0b0b..fcd98dbfd8dfbbd04ae66c5477d59daef7475dfc 100644 (file)
--- a/MdePkg/Include/Library/PciSegmentLib.h
+++ b/MdePkg/Include/Library/PciSegmentLib.h
@@ -984,7 +984,7 @@ PciSegmentBitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1016,7 +1016,7 @@ PciSegmentReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r

diff --git a/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c b/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c
index b0dbdec0cf85590e2e6c6af96a0e505ce8dbca55..75931d46e0b52871f4ba8c19bb55e18b65b7f5bf 100644 (file)
--- a/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c
+++ b/MdePkg/Library/PciSegmentLibSegmentInfo/DxeRuntimePciSegmentLib.c
@@ -210,7 +210,7 @@ PciSegmentRegisterForRuntimeAccess (
   Address = (UINTN)EcamAddress;\r
 \r
   //\r
-  // See if Address has already been registerd for runtime access\r
+  // See if Address has already been registered for runtime access\r
   //\r
   for (Index = 0; Index < mDxeRuntimePciSegmentLibNumberOfRuntimeRanges; Index++) {\r
     if (mDxeRuntimePciSegmentLibRegistrationTable[Index].PhysicalAddress == Address) {\r

diff --git a/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c b/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c
index 1b42481123c9a7685e9e40eae55ec13e32a9e2d2..a76e9d9adf07712ab94dd998a6b6577029c76884 100644 (file)
--- a/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c
+++ b/MdePkg/Library/PciSegmentLibSegmentInfo/PciSegmentLibCommon.c
@@ -1169,7 +1169,7 @@ PciSegmentBitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be read. Size is\r
   returned. When possible 32-bit PCI configuration read cycles are used to read\r
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
   and 16-bit PCI configuration read cycles may be used at the beginning and the\r
   end of the range.\r
 \r
@@ -1272,7 +1272,7 @@ PciSegmentReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI\r
   configuration registers from a single PCI function to be written. Size is\r
   returned. When possible 32-bit PCI configuration write cycles are used to\r
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,\r
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
   and the end of the range.\r
 \r