/** @file\r
ConsoleOut Routines that speak VGA.\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
// Check bit 6 of Feature Byte 2.\r
// If it is set, then Int 16 Func 09 is supported\r
//\r
- if (*(UINT8 *)(UINTN) ((Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {\r
+ if (*(UINT8 *) (((UINTN) Regs.X.ES << 4) + Regs.X.BX + 0x06) & 0x40) {\r
//\r
// Get Keyboard Functionality\r
//\r
/** @file\r
\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
\r
CopyMem (\r
Frame,\r
- (VOID *)(UINTN) ((SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),\r
+ (VOID *) (((UINTN) SimpleNetworkDevice->Isr.FrameSegSel << 4) + SimpleNetworkDevice->Isr.FrameOffset),\r
SimpleNetworkDevice->Isr.BufferLength\r
);\r
Frame = Frame + SimpleNetworkDevice->Isr.BufferLength;\r
/** @file\r
Helper Routines that use a PXE-enabled NIC option ROM.\r
\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
{\r
UINT32 *Address;\r
\r
- Address = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);\r
+ Address = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);\r
CachedVectorAddress[VectorNumber] = *Address;\r
return EFI_SUCCESS;\r
}\r
{\r
UINT32 *Address;\r
\r
- Address = (UINT32 *)(UINTN) (IVT_BASE + VectorNumber * 4);\r
+ Address = (UINT32 *) ((UINTN) IVT_BASE + VectorNumber * 4);\r
*Address = CachedVectorAddress[VectorNumber];\r
return EFI_SUCCESS;\r
}\r
\r
RomIdTableAddress = (UNDI_ROMID_T *) (RomAddress + OPTION_ROM_PTR->PxeRomIdOffset);\r
\r
- if ((UINTN) (OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {\r
+ if (((UINT32)OPTION_ROM_PTR->PxeRomIdOffset + RomIdTableAddress->StructLength) > RomLength) {\r
DEBUG ((DEBUG_ERROR, "ROM ID Offset Error\n\r"));\r
return EFI_NOT_FOUND;\r
}\r
Print_Undi_Loader_Table (UndiLoaderTable);\r
\r
DEBUG ((DEBUG_NET, "Display the PXENV+ and !PXE tables exported by NIC\n\r"));\r
- Print_PXENV_Table ((VOID *)(UINTN)((UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));\r
- Print_PXE_Table ((VOID *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));\r
+ Print_PXENV_Table ((VOID *)(((UINTN)UndiLoaderTable->PXENVptr.Segment << 4) | UndiLoaderTable->PXENVptr.Offset));\r
+ Print_PXE_Table ((VOID *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset));\r
\r
- Pxe = (PXE_T *)(UINTN)((UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);\r
+ Pxe = (PXE_T *)(((UINTN)UndiLoaderTable->PXEptr.Segment << 4) + UndiLoaderTable->PXEptr.Offset);\r
SimpleNetworkDevice->Nii.Id = (UINT64)(UINTN) Pxe;\r
\r
gBS->FreePool (Buffer);\r
/** @file\r
ConsoleOut Routines that speak VGA.\r
\r
-Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
//\r
// Make sure the FrameBufferSize does not exceed the max available frame buffer size reported by VEB.\r
//\r
- ASSERT (CurrentModeData->FrameBufferSize <= (UINTN)(BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));\r
+ ASSERT (CurrentModeData->FrameBufferSize <= ((UINT32)BiosVideoPrivate->VbeInformationBlock->TotalMemory * 64 * 1024));\r
\r
BiosVideoPrivate->ModeData = ModeBuffer;\r
}\r
/** @file\r
\r
-Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
);\r
\r
if (Regs.X.AX == 0) {\r
- *LegacyMemoryAddress = (VOID *) (UINTN) ((Regs.X.DS << 4) + Regs.X.BX);\r
+ *LegacyMemoryAddress = (VOID *) (((UINTN) Regs.X.DS << 4) + Regs.X.BX);\r
Status = EFI_SUCCESS;\r
} else {\r
Status = EFI_OUT_OF_RESOURCES;\r
}\r
\r
if ((mStructureTableAddress != 0) && \r
- (mStructureTablePages < (UINTN) EFI_SIZE_TO_PAGES (EntryPointStructure->TableLength))) {\r
+ (mStructureTablePages < EFI_SIZE_TO_PAGES ((UINT32)EntryPointStructure->TableLength))) {\r
//\r
// If original buffer is not enough for the new SMBIOS table, free original buffer and re-allocate\r
//\r
/** @file\r
\r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
//\r
// Print DescString\r
//\r
- String = (CHAR8 *)(UINTN)((BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);\r
+ String = (CHAR8 *)(((UINTN)BbsTable[Index].DescStringSegment << 4) + BbsTable[Index].DescStringOffset);\r
if (String != NULL) {\r
DEBUG ((EFI_D_INFO," ("));\r
for (SubIndex = 0; String[SubIndex] != 0; SubIndex++) {\r
//\r
// If current BBS entry has its description then use it.\r
//\r
- StringDesc = (UINT8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);\r
+ StringDesc = (UINT8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);\r
if (NULL != StringDesc) {\r
//\r
// Only get fisrt 32 characters, this is suggested by BBS spec\r
)\r
{\r
if ((Char >= L'0') && (Char <= L'9')) {\r
- return (UINTN) (Char - L'0');\r
+ return (Char - L'0');\r
}\r
\r
if ((Char >= L'A') && (Char <= L'F')) {\r
- return (UINTN) (Char - L'A' + 0xA);\r
+ return (Char - L'A' + 0xA);\r
}\r
\r
ASSERT (FALSE);\r
//\r
// If current BBS entry has its description then use it.\r
//\r
- StringDesc = (CHAR8 *) (UINTN) ((CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);\r
+ StringDesc = (CHAR8 *) (((UINTN) CurBBSEntry->DescStringSegment << 4) + CurBBSEntry->DescStringOffset);\r
if (NULL != StringDesc) {\r
//\r
// Only get fisrt 32 characters, this is suggested by BBS spec\r
\r
if (Base10Exponent >= 6) {\r
FreqMhz = ProcessorFrequency;\r
- for (Index = 0; Index < (UINTN) (Base10Exponent - 6); Index++) {\r
+ for (Index = 0; Index < ((UINT32)Base10Exponent - 6); Index++) {\r
FreqMhz *= 10;\r
}\r
} else {\r
/** @file\r
Uses the services of the I/O Library to produce the CPU I/O Protocol\r
\r
-Copyright (c) 2004 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
This program and the accompanying materials \r
//\r
// Check to see if Address is aligned\r
//\r
- if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {\r
+ if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {\r
return EFI_UNSUPPORTED;\r
}\r
\r