UefiCpuPkg/MpInitLib: Implementation of MpInitLibGetProcessorInfo()

v5:
  1. Remove (-1) and use the clean code to calculate the Location->Thread
     and Location->Core.

v4:
  1. Update HealthData type from UINT32 to EFI_HEALTH_FLAGS

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index cbaeccc64729ae6a2eda78b8c01fa7c004c83ce7..d0473fdb37592da32e54d00cc7ce999fccc0cc6e 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -57,6 +57,132 @@ IsBspExecuteDisableEnabled (
   return Enabled;\r
 }\r
 \r
+/**\r
+  Get CPU Package/Core/Thread location information.\r
+\r
+  @param[in]  InitialApicId     CPU APIC ID\r
+  @param[out] Location          Pointer to CPU location information\r
+**/\r
+VOID\r
+ExtractProcessorLocation (\r
+  IN  UINT32                     InitialApicId,\r
+  OUT EFI_CPU_PHYSICAL_LOCATION  *Location\r
+  )\r
+{\r
+  BOOLEAN                        TopologyLeafSupported;\r
+  UINTN                          ThreadBits;\r
+  UINTN                          CoreBits;\r
+  CPUID_VERSION_INFO_EBX         VersionInfoEbx;\r
+  CPUID_VERSION_INFO_EDX         VersionInfoEdx;\r
+  CPUID_CACHE_PARAMS_EAX         CacheParamsEax;\r
+  CPUID_EXTENDED_TOPOLOGY_EAX    ExtendedTopologyEax;\r
+  CPUID_EXTENDED_TOPOLOGY_EBX    ExtendedTopologyEbx;\r
+  CPUID_EXTENDED_TOPOLOGY_ECX    ExtendedTopologyEcx;\r
+  UINT32                         MaxCpuIdIndex;\r
+  UINT32                         SubIndex;\r
+  UINTN                          LevelType;\r
+  UINT32                         MaxLogicProcessorsPerPackage;\r
+  UINT32                         MaxCoresPerPackage;\r
+\r
+  //\r
+  // Check if the processor is capable of supporting more than one logical processor.\r
+  //\r
+  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);\r
+  if (VersionInfoEdx.Bits.HTT == 0) {\r
+    Location->Thread  = 0;\r
+    Location->Core    = 0;\r
+    Location->Package = 0;\r
+    return;\r
+  }\r
+\r
+  ThreadBits = 0;\r
+  CoreBits = 0;\r
+\r
+  //\r
+  // Assume three-level mapping of APIC ID: Package:Core:SMT.\r
+  //\r
+\r
+  TopologyLeafSupported = FALSE;\r
+  //\r
+  // Get the max index of basic CPUID\r
+  //\r
+  AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);\r
+\r
+  //\r
+  // If the extended topology enumeration leaf is available, it\r
+  // is the preferred mechanism for enumerating topology.\r
+  //\r
+  if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {\r
+    AsmCpuidEx (\r
+      CPUID_EXTENDED_TOPOLOGY,\r
+      0,\r
+      &ExtendedTopologyEax.Uint32,\r
+      &ExtendedTopologyEbx.Uint32,\r
+      &ExtendedTopologyEcx.Uint32,\r
+      NULL\r
+      );\r
+    //\r
+    // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for\r
+    // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not\r
+    // supported on that processor.\r
+    //\r
+    if (ExtendedTopologyEbx.Uint32 != 0) {\r
+      TopologyLeafSupported = TRUE;\r
+\r
+      //\r
+      // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract\r
+      // the SMT sub-field of x2APIC ID.\r
+      //\r
+      LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
+      ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);\r
+      ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;\r
+\r
+      //\r
+      // Software must not assume any "level type" encoding\r
+      // value to be related to any sub-leaf index, except sub-leaf 0.\r
+      //\r
+      SubIndex = 1;\r
+      do {\r
+        AsmCpuidEx (\r
+          CPUID_EXTENDED_TOPOLOGY,\r
+          SubIndex,\r
+          &ExtendedTopologyEax.Uint32,\r
+          NULL,\r
+          &ExtendedTopologyEcx.Uint32,\r
+          NULL\r
+          );\r
+        LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
+        if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {\r
+          CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;\r
+          break;\r
+        }\r
+        SubIndex++;\r
+      } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);\r
+    }\r
+  }\r
+\r
+  if (!TopologyLeafSupported) {\r
+    AsmCpuid (CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);\r
+    MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;\r
+    if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {\r
+      AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);\r
+      MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;\r
+    } else {\r
+      //\r
+      // Must be a single-core processor.\r
+      //\r
+      MaxCoresPerPackage = 1;\r
+    }\r
+\r
+    ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);\r
+    CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);\r
+  }\r
+\r
+  Location->Thread  = InitialApicId & ((1 << ThreadBits) - 1);\r
+  Location->Core    = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);\r
+  Location->Package = (InitialApicId >> (ThreadBits + CoreBits));\r
+}\r
+\r
 /**\r
   Get the Application Processors state.\r
 \r
@@ -930,8 +1056,54 @@ MpInitLibGetProcessorInfo (
   OUT EFI_HEALTH_FLAGS           *HealthData  OPTIONAL\r
   )\r
 {\r
-  return EFI_UNSUPPORTED;\r
+  CPU_MP_DATA            *CpuMpData;\r
+  UINTN                  CallerNumber;\r
+\r
+  CpuMpData = GetCpuMpData ();\r
+\r
+  //\r
+  // Check whether caller processor is BSP\r
+  //\r
+  MpInitLibWhoAmI (&CallerNumber);\r
+  if (CallerNumber != CpuMpData->BspNumber) {\r
+    return EFI_DEVICE_ERROR;\r
+  }\r
+\r
+  if (ProcessorInfoBuffer == NULL) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
+  if (ProcessorNumber >= CpuMpData->CpuCount) {\r
+    return EFI_NOT_FOUND;\r
+  }\r
+\r
+  ProcessorInfoBuffer->ProcessorId = (UINT64) CpuMpData->CpuData[ProcessorNumber].ApicId;\r
+  ProcessorInfoBuffer->StatusFlag  = 0;\r
+  if (ProcessorNumber == CpuMpData->BspNumber) {\r
+    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;\r
+  }\r
+  if (CpuMpData->CpuData[ProcessorNumber].CpuHealthy) {\r
+    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_HEALTH_STATUS_BIT;\r
+  }\r
+  if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {\r
+    ProcessorInfoBuffer->StatusFlag &= ~PROCESSOR_ENABLED_BIT;\r
+  } else {\r
+    ProcessorInfoBuffer->StatusFlag |= PROCESSOR_ENABLED_BIT;\r
+  }\r
+\r
+  //\r
+  // Get processor location information\r
+  //\r
+  ExtractProcessorLocation (CpuMpData->CpuData[ProcessorNumber].ApicId, &ProcessorInfoBuffer->Location);\r
+\r
+  if (HealthData != NULL) {\r
+    HealthData->Uint32 = CpuMpData->CpuData[ProcessorNumber].Health;\r
+  }\r
+\r
+  return EFI_SUCCESS;\r
 }\r
+\r
+\r
 /**\r
   This return the handle number for the calling processor.  This service may be\r
   called from the BSP and APs.\r