MdeModulePkg: Correct high-memory use in NvmExpressDxe

Move the logic that stores starting PCI attributes and sets the
EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute to
DriverBindingStart() before the memory that backs the
DMA engine is allocated.

This ensures that the DMA-backing memory is not forcibly allocated
below 4G in system address map. Otherwise the allocation fails on
platforms that do not have any memory below the 4G mark and the drive
initialisation fails.

Leave the PCI device enabling attribute logic in NvmeControllerInit()
to ensure that the device is re-enabled on reset in case it was
disabled via PCI attributes.

Cc: Ray Ni <ray.ni@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Tomas Pilar <quic_tpilar@quicinc.com>
Acked-by: Hao A Wu <hao.a.wu@intel.com>

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
index 9d40f67e8ed9615c522e0cc2d938539a2aac69d1..5a1eda8e8ded0bf749e84687b636d10a03e22835 100644 (file)
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c
@@ -959,6 +959,33 @@ NvmExpressDriverBindingStart (
       goto Exit;\r
     }\r
 \r
+    //\r
+    // Save original PCI attributes\r
+    //\r
+    Status = PciIo->Attributes (\r
+                      PciIo,\r
+                      EfiPciIoAttributeOperationGet,\r
+                      0,\r
+                      &Private->PciAttributes\r
+                      );\r
+\r
+    if (EFI_ERROR (Status)) {\r
+      return Status;\r
+    }\r
+\r
+    //\r
+    // Enable 64-bit DMA support in the PCI layer.\r
+    //\r
+    Status = PciIo->Attributes (\r
+                      PciIo,\r
+                      EfiPciIoAttributeOperationEnable,\r
+                      EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,\r
+                      NULL\r
+                      );\r
+    if (EFI_ERROR (Status)) {\r
+      DEBUG ((DEBUG_WARN, "NvmExpressDriverBindingStart: failed to enable 64-bit DMA (%r)\n", Status));\r
+    }\r
+\r
     //\r
     // 6 x 4kB aligned buffers will be carved out of this buffer.\r
     // 1st 4kB boundary is the start of the admin submission queue.\r

diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
index ac77afe1138fdfc5cf0f47ea0d951d6634e06eee..d87212ffb268ad12cc8a4a039b691001ed126928 100644 (file)
--- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
+++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c
@@ -728,20 +728,9 @@ NvmeControllerInit (
   UINT8                Mn[41];\r
 \r
   //\r
-  // Save original PCI attributes and enable this controller.\r
+  // Enable this controller.\r
   //\r
   PciIo  = Private->PciIo;\r
-  Status = PciIo->Attributes (\r
-                    PciIo,\r
-                    EfiPciIoAttributeOperationGet,\r
-                    0,\r
-                    &Private->PciAttributes\r
-                    );\r
-\r
-  if (EFI_ERROR (Status)) {\r
-    return Status;\r
-  }\r
-\r
   Status = PciIo->Attributes (\r
                     PciIo,\r
                     EfiPciIoAttributeOperationSupported,\r
@@ -764,19 +753,6 @@ NvmeControllerInit (
     return Status;\r
   }\r
 \r
-  //\r
-  // Enable 64-bit DMA support in the PCI layer.\r
-  //\r
-  Status = PciIo->Attributes (\r
-                    PciIo,\r
-                    EfiPciIoAttributeOperationEnable,\r
-                    EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,\r
-                    NULL\r
-                    );\r
-  if (EFI_ERROR (Status)) {\r
-    DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status));\r
-  }\r
-\r
   //\r
   // Read the Controller Capabilities register and verify that the NVM command set is supported\r
   //\r