+/** @file\r
+ Processor or Compiler specific defines and types for AArch64.\r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+ Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __PROCESSOR_BIND_H__\r
+#define __PROCESSOR_BIND_H__\r
+\r
+///\r
+/// Define the processor type so other code can make processor based choices\r
+///\r
+#define MDE_CPU_AARCH64\r
+\r
+//\r
+// Make sure we are using the correct packing rules per EFI specification\r
+//\r
+#ifndef __GNUC__\r
+#pragma pack()\r
+#endif\r
+\r
+#if _MSC_EXTENSIONS\r
+ //\r
+ // use Microsoft* C complier dependent interger width types\r
+ //\r
+ typedef unsigned __int64 UINT64;\r
+ typedef __int64 INT64;\r
+ typedef unsigned __int32 UINT32;\r
+ typedef __int32 INT32;\r
+ typedef unsigned short UINT16;\r
+ typedef unsigned short CHAR16;\r
+ typedef short INT16;\r
+ typedef unsigned char BOOLEAN;\r
+ typedef unsigned char UINT8;\r
+ typedef char CHAR8;\r
+ typedef char INT8;\r
+#else\r
+ //\r
+ // Assume standard AARCH64 alignment.\r
+ typedef unsigned long long UINT64;\r
+ typedef long long INT64;\r
+ typedef unsigned int UINT32;\r
+ typedef int INT32;\r
+ typedef unsigned short UINT16;\r
+ typedef unsigned short CHAR16;\r
+ typedef short INT16;\r
+ typedef unsigned char BOOLEAN;\r
+ typedef unsigned char UINT8;\r
+ typedef char CHAR8;\r
+ typedef char INT8;\r
+#endif\r
+\r
+///\r
+/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,\r
+/// 8 bytes on supported 64-bit processor instructions)\r
+///\r
+typedef UINT64 UINTN;\r
+\r
+///\r
+/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,\r
+/// 8 bytes on supported 64-bit processor instructions)\r
+///\r
+typedef INT64 INTN;\r
+\r
+//\r
+// Processor specific defines\r
+//\r
+\r
+///\r
+/// A value of native width with the highest bit set.\r
+///\r
+#define MAX_BIT 0x8000000000000000\r
+\r
+///\r
+/// A value of native width with the two highest bits set.\r
+///\r
+#define MAX_2_BITS 0xC000000000000000\r
+\r
+///\r
+/// Maximum legal AARCH64 address\r
+///\r
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFF\r
+\r
+///\r
+/// The stack alignment required for AARCH64\r
+///\r
+#define CPU_STACK_ALIGNMENT 16\r
+\r
+//\r
+// Modifier to ensure that all protocol member functions and EFI intrinsics\r
+// use the correct C calling convention. All protocol member functions and\r
+// EFI intrinsics are required to modify their member functions with EFIAPI.\r
+//\r
+#define EFIAPI\r
+\r
+#if defined(__GNUC__)\r
+ ///\r
+ /// For GNU assembly code, .global or .globl can declare global symbols.\r
+ /// Define this macro to unify the usage.\r
+ ///\r
+ #define ASM_GLOBAL .globl\r
+\r
+ #define GCC_ASM_EXPORT(func__) \\r
+ .global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\\r
+ .type ASM_PFX(func__), %function\r
+\r
+ #define GCC_ASM_IMPORT(func__) \\r
+ .extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)\r
+\r
+#endif\r
+\r
+/**\r
+ Return the pointer to the first instruction of a function given a function pointer.\r
+ On ARM CPU architectures, these two pointer values are the same,\r
+ so the implementation of this macro is very simple.\r
+\r
+ @param FunctionPointer A pointer to a function.\r
+\r
+ @return The pointer to the first instruction of a function given a function pointer.\r
+\r
+**/\r
+#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)\r
+\r
+#endif\r