MpInitLib: Put SEV logic in separate file

The patch does several simplifications:
1. Treat SwitchToRealProc as part of RendezvousFunnelProc.
   So the common logic in MpLib.c doesn't need to be aware of
   SwitchToRealProc.
   As a result, SwitchToRealSize/Offset are removed from
   MP_ASSEMBLY_ADDRESS_MAP.

2. Move SwitchToRealProc to AmdSev.nasm.
   All other assembly code in AmdSev.nasm is called through
   OneTimeCall.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 8981c327221bc96887761471e1c38e87ea796385..28301bb8f0df9feb7ed9ce774158a8e17123c2cb 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -199,7 +199,6 @@ CProcedureInvoke:
     call       eax               ; Invoke C function\r
 \r
     jmp        $                 ; Never reach here\r
-RendezvousFunnelProcEnd:\r
 \r
 ;-------------------------------------------------------------------------------------\r
 ;SwitchToRealProc procedure follows.\r
@@ -209,6 +208,8 @@ SwitchToRealProcStart:
     jmp        $                 ; Never reach here\r
 SwitchToRealProcEnd:\r
 \r
+RendezvousFunnelProcEnd:\r
+\r
 ;-------------------------------------------------------------------------------------\r
 ;  AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);\r
 ;\r
@@ -258,8 +259,6 @@ ASM_PFX(AsmGetAddressMap):
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], AsmRelocateApLoopStart\r
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart\r
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart\r
-    mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart\r
-    mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart\r
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start\r
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], 0\r
     mov        dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], 0\r

diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
index aba53f57201c93a700fceca193869d602f6a509c..1cc071cf7bdd8b43b2929f2a6f333bfe4e884e61 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>\r
 ; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ; Module Name:\r
@@ -27,8 +27,6 @@ struc MP_ASSEMBLY_ADDRESS_MAP
   .RelocateApLoopFuncAddress     CTYPE_UINTN 1\r
   .RelocateApLoopFuncSize        CTYPE_UINTN 1\r
   .ModeTransitionOffset          CTYPE_UINTN 1\r
-  .SwitchToRealSize              CTYPE_UINTN 1\r
-  .SwitchToRealOffset            CTYPE_UINTN 1\r
   .SwitchToRealNoNxOffset        CTYPE_UINTN 1\r
   .SwitchToRealPM16ModeOffset    CTYPE_UINTN 1\r
   .SwitchToRealPM16ModeSize      CTYPE_UINTN 1\r

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index d761bdc4878f5187cb776de53d0883794289662f..aa0eb9a70b0b10996d0c181b6d233f2058674372 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -936,8 +936,7 @@ FillExchangeInfoData (
   // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.\r
   //\r
   if (CpuMpData->WakeupBufferHigh != 0) {\r
-    Size = CpuMpData->AddressMap.RendezvousFunnelSize +\r
-           CpuMpData->AddressMap.SwitchToRealSize -\r
+    Size = CpuMpData->AddressMap.RendezvousFunnelSize -\r
            CpuMpData->AddressMap.ModeTransitionOffset;\r
     CopyMem (\r
       (VOID *)CpuMpData->WakeupBufferHigh,\r
@@ -991,8 +990,7 @@ BackupAndPrepareWakeupBuffer (
   CopyMem (\r
     (VOID *)CpuMpData->WakeupBuffer,\r
     (VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress,\r
-    CpuMpData->AddressMap.RendezvousFunnelSize +\r
-    CpuMpData->AddressMap.SwitchToRealSize\r
+    CpuMpData->AddressMap.RendezvousFunnelSize\r
     );\r
 }\r
 \r
@@ -1029,7 +1027,6 @@ GetApResetVectorSize (
   UINTN  Size;\r
 \r
   Size = AddressMap->RendezvousFunnelSize +\r
-         AddressMap->SwitchToRealSize +\r
          sizeof (MP_CPU_EXCHANGE_INFO);\r
 \r
   return Size;\r
@@ -1054,11 +1051,9 @@ AllocateResetVector (
     CpuMpData->WakeupBuffer      = GetWakeupBuffer (ApResetVectorSize);\r
     CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *)(UINTN)\r
                                    (CpuMpData->WakeupBuffer +\r
-                                    CpuMpData->AddressMap.RendezvousFunnelSize +\r
-                                    CpuMpData->AddressMap.SwitchToRealSize);\r
+                                    CpuMpData->AddressMap.RendezvousFunnelSize);\r
     CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (\r
-                                    CpuMpData->AddressMap.RendezvousFunnelSize +\r
-                                    CpuMpData->AddressMap.SwitchToRealSize -\r
+                                    CpuMpData->AddressMap.RendezvousFunnelSize -\r
                                     CpuMpData->AddressMap.ModeTransitionOffset\r
                                     );\r
     //\r

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 59ab96089759e80e9867eefb2f446c22e0a4acdf..974fb760199f7feb41ca81216a966e4fa651e133 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -1,7 +1,7 @@
 /** @file\r
   Common header file for MP Initialize Library.\r
 \r
-  Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>\r
   Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
 \r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
@@ -181,8 +181,6 @@ typedef struct {
   UINT8    *RelocateApLoopFuncAddress;\r
   UINTN    RelocateApLoopFuncSize;\r
   UINTN    ModeTransitionOffset;\r
-  UINTN    SwitchToRealSize;\r
-  UINTN    SwitchToRealOffset;\r
   UINTN    SwitchToRealNoNxOffset;\r
   UINTN    SwitchToRealPM16ModeOffset;\r
   UINTN    SwitchToRealPM16ModeSize;\r

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
index 8bb1161fa0f77fe4681eaa872e7e8dd844ebf80a..7c2469f9c53088e341c7e15a108a9d1c8bcd7f7d 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
@@ -198,3 +198,151 @@ RestoreGhcb:
 \r
 SevEsGetApicIdExit:\r
     OneTimeCallRet    SevEsGetApicId\r
+\r
+\r
+;-------------------------------------------------------------------------------------\r
+;SwitchToRealProc procedure follows.\r
+;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC\r
+;IS IN MACHINE CODE.\r
+;  SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)\r
+;  rcx - Buffer Start\r
+;  rdx - Code16 Selector Offset\r
+;  r8  - Code32 Selector Offset\r
+;  r9  - Stack Start\r
+;-------------------------------------------------------------------------------------\r
+SwitchToRealProcStart:\r
+BITS 64\r
+    cli\r
+\r
+    ;\r
+    ; Get RDX reset value before changing stacks since the\r
+    ; new stack won't be able to accomodate a #VC exception.\r
+    ;\r
+    push       rax\r
+    push       rbx\r
+    push       rcx\r
+    push       rdx\r
+\r
+    mov        rax, 1\r
+    cpuid\r
+    mov        rsi, rax                    ; Save off the reset value for RDX\r
+\r
+    pop        rdx\r
+    pop        rcx\r
+    pop        rbx\r
+    pop        rax\r
+\r
+    ;\r
+    ; Establish stack below 1MB\r
+    ;\r
+    mov        rsp, r9\r
+\r
+    ;\r
+    ; Push ultimate Reset Vector onto the stack\r
+    ;\r
+    mov        rax, rcx\r
+    shr        rax, 4\r
+    push       word 0x0002                 ; RFLAGS\r
+    push       ax                          ; CS\r
+    push       word 0x0000                 ; RIP\r
+    push       word 0x0000                 ; For alignment, will be discarded\r
+\r
+    ;\r
+    ; Get address of "16-bit operand size" label\r
+    ;\r
+    lea        rbx, [PM16Mode]\r
+\r
+    ;\r
+    ; Push addresses used to change to compatibility mode\r
+    ;\r
+    lea        rax, [CompatMode]\r
+    push       r8\r
+    push       rax\r
+\r
+    ;\r
+    ; Clear R8 - R15, for reset, before going into 32-bit mode\r
+    ;\r
+    xor        r8, r8\r
+    xor        r9, r9\r
+    xor        r10, r10\r
+    xor        r11, r11\r
+    xor        r12, r12\r
+    xor        r13, r13\r
+    xor        r14, r14\r
+    xor        r15, r15\r
+\r
+    ;\r
+    ; Far return into 32-bit mode\r
+    ;\r
+    retfq\r
+\r
+BITS 32\r
+CompatMode:\r
+    ;\r
+    ; Set up stack to prepare for exiting protected mode\r
+    ;\r
+    push       edx                         ; Code16 CS\r
+    push       ebx                         ; PM16Mode label address\r
+\r
+    ;\r
+    ; Disable paging\r
+    ;\r
+    mov        eax, cr0                    ; Read CR0\r
+    btr        eax, 31                     ; Set PG=0\r
+    mov        cr0, eax                    ; Write CR0\r
+\r
+    ;\r
+    ; Disable long mode\r
+    ;\r
+    mov        ecx, 0c0000080h             ; EFER MSR number\r
+    rdmsr                                  ; Read EFER\r
+    btr        eax, 8                      ; Set LME=0\r
+    wrmsr                                  ; Write EFER\r
+\r
+    ;\r
+    ; Disable PAE\r
+    ;\r
+    mov        eax, cr4                    ; Read CR4\r
+    btr        eax, 5                      ; Set PAE=0\r
+    mov        cr4, eax                    ; Write CR4\r
+\r
+    mov        edx, esi                    ; Restore RDX reset value\r
+\r
+    ;\r
+    ; Switch to 16-bit operand size\r
+    ;\r
+    retf\r
+\r
+BITS 16\r
+    ;\r
+    ; At entry to this label\r
+    ;   - RDX will have its reset value\r
+    ;   - On the top of the stack\r
+    ;     - Alignment data (two bytes) to be discarded\r
+    ;     - IP for Real Mode (two bytes)\r
+    ;     - CS for Real Mode (two bytes)\r
+    ;\r
+    ; This label is also used with AsmRelocateApLoop. During MP finalization,\r
+    ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of\r
+    ; the WakeupBuffer, allowing a parked AP to be booted by an OS.\r
+    ;\r
+PM16Mode:\r
+    mov        eax, cr0                    ; Read CR0\r
+    btr        eax, 0                      ; Set PE=0\r
+    mov        cr0, eax                    ; Write CR0\r
+\r
+    pop        ax                          ; Discard alignment data\r
+\r
+    ;\r
+    ; Clear registers (except RDX and RSP) before going into 16-bit mode\r
+    ;\r
+    xor        eax, eax\r
+    xor        ebx, ebx\r
+    xor        ecx, ecx\r
+    xor        esi, esi\r
+    xor        edi, edi\r
+    xor        ebp, ebp\r
+\r
+    iret\r
+\r
+SwitchToRealProcEnd:\r

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index d7e0e1fabd4b14579ab7609e310284afe742cc4b..1daaa72b1e58eb5ce435eb29e67c969d9a710a5d 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -152,11 +152,6 @@ SkipEnable5LevelPaging:
 \r
 BITS 64\r
 \r
-;\r
-; Required for the AMD SEV helper functions\r
-;\r
-%include "AmdSev.nasm"\r
-\r
 LongModeStart:\r
     mov        esi, ebx\r
     lea        edi, [esi + MP_CPU_EXCHANGE_INFO_FIELD (InitFlag)]\r
@@ -265,154 +260,12 @@ CProcedureInvoke:
     add        rsp, 20h\r
     jmp        $                 ; Should never reach here\r
 \r
-RendezvousFunnelProcEnd:\r
-\r
-;-------------------------------------------------------------------------------------\r
-;SwitchToRealProc procedure follows.\r
-;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC\r
-;IS IN MACHINE CODE.\r
-;  SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)\r
-;  rcx - Buffer Start\r
-;  rdx - Code16 Selector Offset\r
-;  r8  - Code32 Selector Offset\r
-;  r9  - Stack Start\r
-;-------------------------------------------------------------------------------------\r
-SwitchToRealProcStart:\r
-BITS 64\r
-    cli\r
-\r
-    ;\r
-    ; Get RDX reset value before changing stacks since the\r
-    ; new stack won't be able to accomodate a #VC exception.\r
-    ;\r
-    push       rax\r
-    push       rbx\r
-    push       rcx\r
-    push       rdx\r
-\r
-    mov        rax, 1\r
-    cpuid\r
-    mov        rsi, rax                    ; Save off the reset value for RDX\r
-\r
-    pop        rdx\r
-    pop        rcx\r
-    pop        rbx\r
-    pop        rax\r
-\r
-    ;\r
-    ; Establish stack below 1MB\r
-    ;\r
-    mov        rsp, r9\r
-\r
-    ;\r
-    ; Push ultimate Reset Vector onto the stack\r
-    ;\r
-    mov        rax, rcx\r
-    shr        rax, 4\r
-    push       word 0x0002                 ; RFLAGS\r
-    push       ax                          ; CS\r
-    push       word 0x0000                 ; RIP\r
-    push       word 0x0000                 ; For alignment, will be discarded\r
-\r
-    ;\r
-    ; Get address of "16-bit operand size" label\r
-    ;\r
-    lea        rbx, [PM16Mode]\r
-\r
-    ;\r
-    ; Push addresses used to change to compatibility mode\r
-    ;\r
-    lea        rax, [CompatMode]\r
-    push       r8\r
-    push       rax\r
-\r
-    ;\r
-    ; Clear R8 - R15, for reset, before going into 32-bit mode\r
-    ;\r
-    xor        r8, r8\r
-    xor        r9, r9\r
-    xor        r10, r10\r
-    xor        r11, r11\r
-    xor        r12, r12\r
-    xor        r13, r13\r
-    xor        r14, r14\r
-    xor        r15, r15\r
-\r
-    ;\r
-    ; Far return into 32-bit mode\r
-    ;\r
-    retfq\r
-\r
-BITS 32\r
-CompatMode:\r
-    ;\r
-    ; Set up stack to prepare for exiting protected mode\r
-    ;\r
-    push       edx                         ; Code16 CS\r
-    push       ebx                         ; PM16Mode label address\r
-\r
-    ;\r
-    ; Disable paging\r
-    ;\r
-    mov        eax, cr0                    ; Read CR0\r
-    btr        eax, 31                     ; Set PG=0\r
-    mov        cr0, eax                    ; Write CR0\r
-\r
-    ;\r
-    ; Disable long mode\r
-    ;\r
-    mov        ecx, 0c0000080h             ; EFER MSR number\r
-    rdmsr                                  ; Read EFER\r
-    btr        eax, 8                      ; Set LME=0\r
-    wrmsr                                  ; Write EFER\r
-\r
-    ;\r
-    ; Disable PAE\r
-    ;\r
-    mov        eax, cr4                    ; Read CR4\r
-    btr        eax, 5                      ; Set PAE=0\r
-    mov        cr4, eax                    ; Write CR4\r
-\r
-    mov        edx, esi                    ; Restore RDX reset value\r
-\r
-    ;\r
-    ; Switch to 16-bit operand size\r
-    ;\r
-    retf\r
-\r
-BITS 16\r
-    ;\r
-    ; At entry to this label\r
-    ;   - RDX will have its reset value\r
-    ;   - On the top of the stack\r
-    ;     - Alignment data (two bytes) to be discarded\r
-    ;     - IP for Real Mode (two bytes)\r
-    ;     - CS for Real Mode (two bytes)\r
-    ;\r
-    ; This label is also used with AsmRelocateApLoop. During MP finalization,\r
-    ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of\r
-    ; the WakeupBuffer, allowing a parked AP to be booted by an OS.\r
-    ;\r
-PM16Mode:\r
-    mov        eax, cr0                    ; Read CR0\r
-    btr        eax, 0                      ; Set PE=0\r
-    mov        cr0, eax                    ; Write CR0\r
-\r
-    pop        ax                          ; Discard alignment data\r
-\r
-    ;\r
-    ; Clear registers (except RDX and RSP) before going into 16-bit mode\r
-    ;\r
-    xor        eax, eax\r
-    xor        ebx, ebx\r
-    xor        ecx, ecx\r
-    xor        esi, esi\r
-    xor        edi, edi\r
-    xor        ebp, ebp\r
-\r
-    iret\r
+;\r
+; Required for the AMD SEV helper functions\r
+;\r
+%include "AmdSev.nasm"\r
 \r
-SwitchToRealProcEnd:\r
+RendezvousFunnelProcEnd:\r
 \r
 ;-------------------------------------------------------------------------------------\r
 ;  AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);\r
@@ -596,8 +449,6 @@ ASM_PFX(AsmGetAddressMap):
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax\r
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart\r
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart\r
-    mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart\r
-    mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart\r
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start\r
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], PM16Mode - RendezvousFunnelProcStart\r
     mov        qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], SwitchToRealProcEnd - PM16Mode\r