This patch updates the ArmPkg variant of InvalidateInstructionCacheRange to
flush the data cache only to the point of unification (PoU). This improves
performance and also allows invalidation in scenarios where it would be
inappropriate to flush to the point of coherency (like when executing code
from L2 configured as cache-as-ram).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eugene Cohen <eugene@hp.com>
Added AARCH64 and ARM/GCC implementations of the above.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19174
6f19259b-4bc3-4df7-8a09-
765794883524
\r
VOID\r
EFIAPI\r
-ArmCleanDataCacheEntryByMVA (\r
+ArmCleanDataCacheEntryToPoUByMVA(\r
IN UINTN Address\r
);\r
\r
+VOID\r
+EFIAPI\r
+ArmCleanDataCacheEntryByMVA(\r
+IN UINTN Address\r
+);\r
+\r
VOID\r
EFIAPI\r
ArmCleanInvalidateDataCacheEntryByMVA (\r
IN UINTN Length\r
)\r
{\r
- CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);\r
+ CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA);\r
ArmInvalidateInstructionCache ();\r
return Address;\r
}\r
GCC_ASM_EXPORT (ArmInvalidateInstructionCache)\r
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)\r
GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)\r
+GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)\r
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)\r
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)\r
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)\r
ret\r
\r
\r
+ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):\r
+ dc cvau, x0 // Clean single data cache line to PoU\r
+ ret\r
+\r
+\r
ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):\r
dc civac, x0 // Clean and invalidate single data cache line\r
ret\r
GCC_ASM_EXPORT (ArmInvalidateInstructionCache)\r
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)\r
GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)\r
+GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)\r
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)\r
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)\r
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)\r
bx lr\r
\r
\r
+ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):\r
+ mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU\r
+ bx lr\r
+\r
+\r
ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):\r
mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line\r
bx lr\r
bx lr\r
\r
\r
+ RVCT_ASM_EXPORT ArmCleanDataCacheEntryToPoUByMVA\r
+ mcr p15, 0, r0, c7, c11, 1 ; clean single data cache line to PoU\r
+ bx lr\r
+\r
+\r
RVCT_ASM_EXPORT ArmCleanInvalidateDataCacheEntryByMVA\r
mcr p15, 0, r0, c7, c14, 1 ; clean and invalidate single data cache line\r
bx lr\r