/** @file\r
Provides services to access PCI Configuration Space on a platform with multiple PCI segments.\r
+ \r
+ The PCI Segment Library function provide services to read, write, and modify the PCI configuration\r
+ registers on PCI root bridges on any supported PCI segment. These library services take a single \r
+ address parameter that encodes the PCI Segment, PCI Bus, PCI Device, PCI Function, and PCI Register. \r
+ The layout of this address parameter is as follows:\r
+ \r
+ PCI Register: Bits 0..11\r
+ PCI Function Bits 12..14\r
+ PCI Device Bits 15..19\r
+ PCI Bus Bits 20..27\r
+ Reserved Bits 28..31. Must be 0.\r
+ PCI Segment Bits 32..47\r
+ Reserved Bits 48..63. Must be 0.\r
+ \r
+ | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |\r
+ 63 48 47 32 31 28 27 20 19 15 14 12 11 0\r
+\r
+ These functions perform PCI configuration cycles using the default PCI configuration access \r
+ method. This may use I/O ports 0xCF8 and 0xCFC to perform PCI configuration accesses, or it \r
+ may use MMIO registers relative to the PcdPciExpressBaseAddress, or it may use some alternate \r
+ access method. Modules will typically use the PCI Segment Library for its PCI configuration \r
+ accesses when PCI Segments other than Segment #0 must be accessed. \r
\r
Copyright (c) 2006 - 2008, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
\r
Reads and returns the 8-bit PCI configuration register specified by Address.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
\r
Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.\r
Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If Address > 0x0FFFFFFF, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
Reads the bit field in an 8-bit PCI configuration register.\r
The bit field is specified by the StartBit and the EndBit.\r
The value of the bit field is returned.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
Reads the 8-bit PCI configuration register specified by Address,\r
performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
and writes the result to the 8-bit PCI configuration register specified by Address. \r
+ \r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param StartBit The ordinal of the least significant bit in the bit field.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in OrData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in AndData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
\r
Reads and returns the 16-bit PCI configuration register specified by Address.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
\r
\r
Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.\r
Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
- If Address > 0x0FFFFFFF, then ASSERT().\r
+ \r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param Value The value to write.\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param OrData The value to OR with the PCI configuration register.\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
-\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ \r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param AndData The value to AND with the PCI configuration register.\r
\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param AndData The value to AND with the PCI configuration register.\r
Reads the bit field in a 16-bit PCI configuration register.\r
The bit field is specified by the StartBit and the EndBit.\r
The value of the bit field is returned.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
The bit field is specified by the StartBit and the EndBit.\r
All other bits in the destination PCI configuration register are preserved.\r
The new value of the 16-bit register is returned.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address. \r
\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param StartBit The ordinal of the least significant bit in the bit field.\r
The ordinal of the least significant bit in a byte is bit 0.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in OrData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in AndData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT()..\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
\r
Reads and returns the 32-bit PCI configuration register specified by Address.\r
This function must guarantee that all PCI read and write operations are serialized.\r
- If any reserved bits in Address are set, then ASSERT().\r
\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
\r
@return The 32-bit PCI configuration register specified by Address.\r
\r
Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.\r
Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
- If Address > 0x0FFFFFFF, then ASSERT().\r
+ \r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param Value The value to write.\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param OrData The value to OR with the PCI configuration register.\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param AndData The value to AND with the PCI configuration register.\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
\r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param AndData The value to AND with the PCI configuration register.\r
Reads the bit field in a 32-bit PCI configuration register.\r
The bit field is specified by the StartBit and the EndBit.\r
The value of the bit field is returned.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
The bit field is specified by the StartBit and the EndBit.\r
All other bits in the destination PCI configuration register are preserved.\r
The new value of the 32-bit register is returned.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
Reads the 32-bit PCI configuration register specified by Address,\r
performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
and writes the result to the 32-bit PCI configuration register specified by Address. \r
-\r
+ \r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+ \r
@param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param StartBit The ordinal of the least significant bit in the bit field.\r
The ordinal of the least significant bit in a byte is bit 0.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in OrData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
Extra left bits in AndData are stripped.\r
+ \r
If any reserved bits in Address are set, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
If EndBit is greater than 7, then ASSERT().\r
If EndBit is less than StartBit, then ASSERT().\r
and Size into the buffer specified by Buffer.\r
This function only allows the PCI configuration registers from a single PCI function to be read.\r
Size is returned.\r
+ \r
If any reserved bits in StartAddress are set, then ASSERT().\r
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().\r
- If Buffer is NULL, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
\r
@param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
@param Size Size in bytes of the transfer.\r
@param Buffer Pointer to a buffer receiving the data read.\r
\r
- @return The paramter of Size.\r
+ @return The parameter of Size.\r
\r
**/\r
UINTN\r
and Size from the buffer specified by Buffer.\r
This function only allows the PCI configuration registers from a single PCI function to be written.\r
Size is returned.\r
+ \r
If any reserved bits in StartAddress are set, then ASSERT().\r
If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().\r
@param Size Size in bytes of the transfer.\r
@param Buffer Pointer to a buffer containing the data to write.\r
\r
- @return The paramter of Size.\r
+ @return The parameter of Size.\r
\r
**/\r
UINTN\r
/** @file\r
Provides services to load and relocate a PE/COFF image.\r
\r
+ The PE/COFF Loader Library abstracts the implementation of a PE/COFF loader for\r
+ IA-32, x86, IPF, and EBC processor types. The library functions are memory based \r
+ and can be ported easily to any environment.\r
+ \r
Copyright (c) 2006 - 2007, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
#define IMAGE_ERROR_FAILED_RELOCATION 9\r
#define IMAGE_ERROR_FAILED_ICACHE_FLUSH 10\r
\r
-//\r
-// PE/COFF Loader Read Function passed in by caller\r
-//\r
+/**\r
+ Reads contents of a PE/COFF image.\r
+\r
+ A function of this type reads contents of the PE/COFF image specified by FileHandle. The read \r
+ operation copies ReadSize bytes from the PE/COFF image starting at byte offset FileOffset into \r
+ the buffer specified by Buffer. The size of the buffer actually read is returned in ReadSize. \r
+ If FileOffset specifies an offset past the end of the PE/COFF image, a ReadSize of 0 is returned.\r
+ A function of this type must be registered in the ImageRead field of a PE_COFF_LOADER_IMAGE_CONTEXT \r
+ structure for the PE/COFF Loader Library service to function correctly. This function abstracts access \r
+ to a PE/COFF image so it can be implemented in an environment specific manner. For example, SEC and PEI \r
+ environments may access memory directly to read the contents of a PE/COFF image, and DXE or UEFI \r
+ environments may require protocol services to read the contents of PE/COFF image \r
+ stored on FLASH, disk, or network devices.\r
+ \r
+ If FileHandle is not a valid handle, then ASSERT().\r
+ If ReadSize is NULL, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+\r
+ @param FileHandle Pointer to the file handle to read the PE/COFF image.\r
+ @param FileOffset Offset into the PE/COFF image to begin the read operation.\r
+ @param ReadSize On input, the size in bytes of the requested read operation. \r
+ On output, the number of bytes actually read.\r
+ @param Buffer Output buffer that contains the data read from the PE/COFF image.\r
+ \r
+ @retval RETURN_SUCCESS The specified portion of the PE/COFF image was read and the size \r
+ @retval RETURN_DEVICE_ERROR The specified portion of the PE/COFF image could not be read due \r
+ to a device error.\r
+\r
+**/\r
typedef\r
RETURN_STATUS\r
(EFIAPI *PE_COFF_LOADER_READ_FILE) (\r
If any errors occur while computing the fields of ImageContext, \r
then the error status is returned in the ImageError field of ImageContext. \r
If the image is a TE image, then SectionAlignment is set to 0.\r
+ The ImageRead and Handle fields of ImageContext structure must be valid prior \r
+ to invoking this service.\r
\r
@param ImageContext Pointer to the image context structure that describes the PE/COFF\r
image that needs to be examined by this function.\r
If the DestinationAddress field of ImageContext is 0, then use the ImageAddress field of\r
ImageContext as the relocation base address. Otherwise, use the DestinationAddress field\r
of ImageContext as the relocation base address. The caller must allocate the relocation\r
- fixup log buffer and fill in the FixupData field of ImageContext prior to calling this function. \r
+ fixup log buffer and fill in the FixupData field of ImageContext prior to calling this function.\r
+ \r
+ The ImageRead, Handle, PeCoffHeaderOffset, IsTeImage, Machine, ImageType, ImageAddress, \r
+ ImageSize, DestinationAddress, RelocationsStripped, SectionAlignment, SizeOfHeaders, \r
+ DebugDirectoryEntryRva, EntryPoint, FixupDataSize, CodeView, PdbPointer, and FixupData of \r
+ the ImageContext structure must be valid prior to invoking this service.\r
+ \r
If ImageContext is NULL, then ASSERT().\r
\r
@param ImageContext Pointer to the image context structure that describes the PE/COFF\r
specified by the ImageAddress and ImageSize fields of ImageContext. The caller must allocate\r
the load buffer and fill in the ImageAddress and ImageSize fields prior to calling this function.\r
The EntryPoint, FixupDataSize, CodeView, and PdbPointer fields of ImageContext are computed.\r
+ The ImageRead, Handle, PeCoffHeaderOffset, IsTeImage, Machine, ImageType, ImageAddress, ImageSize, \r
+ DestinationAddress, RelocationsStripped, SectionAlignment, SizeOfHeaders, and DebugDirectoryEntryRva \r
+ fields of the ImageContext structure must be valid prior to invoking this service.\r
+ \r
If ImageContext is NULL, then ASSERT().\r
\r
@param ImageContext Pointer to the image context structure that describes the PE/COFF\r
\r
\r
/**\r
- ImageRead function that operates on a memory buffer whos base is passed into\r
- FileHandle. \r
+ Reads contents of a PE/COFF image from a buffer in system memory.\r
+ \r
+ This is the default implementation of a PE_COFF_LOADER_READ_FILE function \r
+ that assumes FileHandle pointer to the beginning of a PE/COFF image. \r
+ This function reads contents of the PE/COFF image that starts at the system memory \r
+ address specified by FileHandle. The read operation copies ReadSize bytes from the \r
+ PE/COFF image starting at byte offset FileOffset into the buffer specified by Buffer. \r
+ The size of the buffer actually read is returned in ReadSize.\r
+ \r
+ If FileHandle is NULL, then ASSERT().\r
+ If ReadSize is NULL, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
\r
- @param FileHandle Ponter to baes of the input stream\r
- @param FileOffset Offset to the start of the buffer\r
- @param ReadSize Number of bytes to copy into the buffer\r
- @param Buffer Location to place results of read\r
+ @param FileHandle Pointer to base of the input stream\r
+ @param FileOffset Offset into the PE/COFF image to begin the read operation.\r
+ @param ReadSize On input, the size in bytes of the requested read operation. \r
+ On output, the number of bytes actually read.\r
+ @param Buffer Output buffer that contains the data read from the PE/COFF image.\r
\r
@retval RETURN_SUCCESS Data is read from FileOffset from the Handle into \r
the buffer.\r
the fixups with a virtual mapping.\r
\r
\r
- @param ImageBase Base address of relocated image\r
- @param VirtImageBase Virtual mapping for ImageBase\r
- @param ImageSize Size of the image to relocate\r
- @param RelocationData Location to place results of read\r
+ @param ImageBase Base address of a PE/COFF image that has been loaded \r
+ and relocated into system memory.\r
+ @param VirtImageBase The request virtual address that the PE/COFF image is to\r
+ be fixed up for.\r
+ @param ImageSize The size, in bytes, of the PE/COFF image.\r
+ @param RelocationData A pointer to the relocation data that was collected when the PE/COFF \r
+ image was relocated using PeCoffLoaderRelocateImage().\r
\r
**/\r
VOID\r
\r
/**\r
Unloads a loaded PE/COFF image from memory and releases its taken resource.\r
- \r
+ Releases any environment specific resources that were allocated when the image \r
+ specified by ImageContext was loaded using PeCoffLoaderLoadImage(). \r
+ \r
For NT32 emulator, the PE/COFF image loaded by system needs to release.\r
For real platform, the PE/COFF image loaded by Core doesn't needs to be unloaded, \r
this function can simply return RETURN_SUCCESS.\r
-\r
+ \r
+ If ImageContext is NULL, then ASSERT().\r
+ \r
@param ImageContext Pointer to the image context structure that describes the PE/COFF\r
image to be unloaded.\r
\r
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