OvmfPkg: SataControllerDxe: enable IO / mem access and DMA when binding

When we bind the SATA controller in SataControllerStart(), we read the NP
("Number of Ports") bitfield from the CAP ("HBA Capabilities") register of
the controller. (See the AHCI 1.3.1 spec.)

This register is memory mapped. If we'd like to access it, we must at
least enable memory space access for the device. In addition, Feng Tian
recommended enabling Bus Master DMA in
<http://thread.gmane.org/gmane.comp.bios.tianocore.devel/10545/focus=10659>.
We also enable IO space access for completeness.

Further, because we change the PCI attributes of the device with the above
when binding it, we must also restore its original PCI attributes when
unbinding it. See the Driver Writer's Guide for UEFI 2.3.1 v1.01, section
18.3 "PCI drivers" | 18.3.2 "Start() and Stop()".

(OvmfPkg's copy of SataControllerDxe differs from the same in DuetPkg
because Duet inherits a pre-configured SATA controller from the BIOS, as
explained by Feng. Technically, DuetPkg's SataControllerDxe could also
apply the technique seen in this patch.)

Cc: Alexander Graf <agraf@suse.de>
Cc: Reza Jelveh <reza.jelveh@tuhh.de>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Hannes Reinecke <hare@suse.de>
Cc: Gabriel L. Somlo <somlo@cmu.edu>
Cc: Feng Tian <feng.tian@intel.com>
Suggested-by: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18528 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/OvmfPkg/SataControllerDxe/SataController.c b/OvmfPkg/SataControllerDxe/SataController.c
index 5e7e23b26164ea0ccf7e7a9f3ccd41a8a2676223..ba21717cad81416b3677b731551d899949796617 100644 (file)
--- a/OvmfPkg/SataControllerDxe/SataController.c
+++ b/OvmfPkg/SataControllerDxe/SataController.c
@@ -390,6 +390,7 @@ SataControllerStart (
 {\r
   EFI_STATUS                        Status;\r
   EFI_PCI_IO_PROTOCOL               *PciIo;\r
+  UINT64                            OriginalPciAttributes;\r
   PCI_TYPE00                        PciData;\r
   EFI_SATA_CONTROLLER_PRIVATE_DATA  *SataPrivateData;\r
   UINT32                            Data32;\r
@@ -414,13 +415,28 @@ SataControllerStart (
     goto Bail;\r
   }\r
 \r
+  //\r
+  // Save original PCI attributes, and enable IO space access, memory space\r
+  // access, and Bus Master (DMA).\r
+  //\r
+  Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationGet, 0,\r
+                    &OriginalPciAttributes);\r
+  if (EFI_ERROR (Status)) {\r
+    goto ClosePciIo;\r
+  }\r
+  Status = PciIo->Attributes (PciIo, EfiPciIoAttributeOperationEnable,\r
+                    EFI_PCI_DEVICE_ENABLE, NULL);\r
+  if (EFI_ERROR (Status)) {\r
+    goto ClosePciIo;\r
+  }\r
+\r
   //\r
   // Allocate Sata Private Data structure\r
   //\r
   SataPrivateData = AllocateZeroPool (sizeof (EFI_SATA_CONTROLLER_PRIVATE_DATA));\r
   if (SataPrivateData == NULL) {\r
     Status = EFI_OUT_OF_RESOURCES;\r
-    goto ClosePciIo;\r
+    goto RestorePciAttributes;\r
   }\r
 \r
   //\r
@@ -428,6 +444,7 @@ SataControllerStart (
   //\r
   SataPrivateData->Signature = SATA_CONTROLLER_SIGNATURE;\r
   SataPrivateData->PciIo = PciIo;\r
+  SataPrivateData->OriginalPciAttributes = OriginalPciAttributes;\r
   SataPrivateData->IdeInit.GetChannelInfo = IdeInitGetChannelInfo;\r
   SataPrivateData->IdeInit.NotifyPhase = IdeInitNotifyPhase;\r
   SataPrivateData->IdeInit.SubmitData = IdeInitSubmitData;\r
@@ -512,6 +529,10 @@ FreeDisqualifiedModes:
 FreeSataPrivateData:\r
   FreePool (SataPrivateData);\r
 \r
+RestorePciAttributes:\r
+  PciIo->Attributes (PciIo, EfiPciIoAttributeOperationSet,\r
+           OriginalPciAttributes, NULL);\r
+\r
 ClosePciIo:\r
   gBS->CloseProtocol (\r
          Controller,\r
@@ -594,6 +615,16 @@ SataControllerStop (
     FreePool (SataPrivateData);\r
   }\r
 \r
+  //\r
+  // Restore original PCI attributes\r
+  //\r
+  SataPrivateData->PciIo->Attributes (\r
+                            SataPrivateData->PciIo,\r
+                            EfiPciIoAttributeOperationSet,\r
+                            SataPrivateData->OriginalPciAttributes,\r
+                            NULL\r
+                            );\r
+\r
   //\r
   // Close protocols opened by Sata Controller driver\r
   //\r

diff --git a/OvmfPkg/SataControllerDxe/SataController.h b/OvmfPkg/SataControllerDxe/SataController.h
index a6c6c168df56136099b6ec501b768a97d20cb0f6..e5b719e76d7d1767a0ec9ba9a41572a8e51b545a 100644 (file)
--- a/OvmfPkg/SataControllerDxe/SataController.h
+++ b/OvmfPkg/SataControllerDxe/SataController.h
@@ -85,6 +85,11 @@ typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA {
   //\r
   EFI_PCI_IO_PROTOCOL               *PciIo;\r
 \r
+  //\r
+  // Original PCI attributes\r
+  //\r
+  UINT64                            OriginalPciAttributes;\r
+\r
   //\r
   // The number of devices that are supported by this channel\r
   //\r