IntelFspWrapperPkg: Refine casting expression result to bigger size

There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

diff --git a/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c b/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c
index 6f06e24cae6e08895f90d0d9b9d6d7384d2fb40b..089413cc3ef68caec37eb60e25dd1b24bf5be41a 100644 (file)
--- a/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c
+++ b/IntelFspWrapperPkg/FspNotifyDxe/LoadBelow4G.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
 /** @file\r
 \r

-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r

 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r


@@ -115,7 +115,7 @@ RelocateImageUnder4GIfNeeded (
   // Align buffer on section boundary\r
   //\r
   ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
   // Align buffer on section boundary\r
   //\r
   ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r

-  ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));\r
+  ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)ImageContext.SectionAlignment - 1);\r

   //\r
   // Load the image to our new buffer\r
   //\r
   //\r
   // Load the image to our new buffer\r
   //\r

diff --git a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
index 162d244665dc3b1ea1fdda8e3291c4c3224a7454..accd6e495e448ea37f4668587f2825687a3c47c6 100644 (file)
--- a/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
+++ b/IntelFspWrapperPkg/Library/BaseFspApiLib/FspApiLib.c
@@ -1,7 +1,7 @@
 /** @file\r
   Provide FSP API related function.\r
 \r
 /** @file\r
   Provide FSP API related function.\r
 \r

-  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -98,7 +98,7 @@ CallFspInit (
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r

-  FspInitApi = (FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r
+  FspInitApi = (FSP_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r

   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);\r
   SetInterruptState (InterruptState);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);\r
   SetInterruptState (InterruptState);\r


@@ -125,7 +125,7 @@ CallFspNotifyPhase (
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r

-  NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
+  NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r

   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);\r
   SetInterruptState (InterruptState);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);\r
   SetInterruptState (InterruptState);\r


@@ -152,7 +152,7 @@ CallFspMemoryInit (
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r

-  FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
+  FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r

   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);\r
   SetInterruptState (InterruptState);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);\r
   SetInterruptState (InterruptState);\r


@@ -179,7 +179,7 @@ CallTempRamExit (
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r

-  TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
+  TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r

   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);\r
   SetInterruptState (InterruptState);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);\r
   SetInterruptState (InterruptState);\r


@@ -206,7 +206,7 @@ CallFspSiliconInit (
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r
   EFI_STATUS          Status;\r
   BOOLEAN             InterruptState;\r
 \r

-  FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
+  FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r

   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);\r
   SetInterruptState (InterruptState);\r
   InterruptState = SaveAndDisableInterrupts ();\r
   Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);\r
   SetInterruptState (InterruptState);\r