rename XXXDflt to XXXDefault (expand for better readability)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16835 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index 7c6e60f0d14f332eea203bedc144a9c2480e229c..afe995c8bd011d1980047c5ae4df8b4eb6e639f5 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -40,9 +40,9 @@ EXTERN   FspApiCallingCheck:PROC
 EXTERN   GetFspBaseAddress:PROC\r
 EXTERN   GetBootFirmwareVolumeOffset:PROC\r
 EXTERN   Pei2LoaderSwitchStack:PROC\r
-EXTERN   FspSelfCheck(FspSelfCheckDflt):PROC\r
-EXTERN   LoadUcode(LoadUcodeDflt):PROC\r
-EXTERN   SecPlatformInit(SecPlatformInitDflt):PROC\r
+EXTERN   FspSelfCheck(FspSelfCheckDefault):PROC\r
+EXTERN   LoadUcode(LoadUcodeDefault):PROC\r
+EXTERN   SecPlatformInit(SecPlatformInitDefault):PROC\r
 EXTERN   SecCarInit:PROC\r
 \r
 ;\r
@@ -82,7 +82,7 @@ RET_ESI  MACRO
 ENDM\r
 \r
 ;------------------------------------------------------------------------------\r
-FspSelfCheckDflt PROC NEAR PUBLIC\r
+FspSelfCheckDefault PROC NEAR PUBLIC\r
    ; Inputs:\r
    ;   eax -> Return address\r
    ; Outputs:\r
@@ -97,10 +97,10 @@ FspSelfCheckDflt PROC NEAR PUBLIC
    xor   eax, eax\r
 exit:\r
    jmp   ebp\r
-FspSelfCheckDflt   ENDP\r
+FspSelfCheckDefault   ENDP\r
 \r
 ;------------------------------------------------------------------------------\r
-SecPlatformInitDflt PROC NEAR PUBLIC\r
+SecPlatformInitDefault PROC NEAR PUBLIC\r
    ; Inputs:\r
    ;   eax -> Return address\r
    ; Outputs:\r
@@ -115,10 +115,10 @@ SecPlatformInitDflt PROC NEAR PUBLIC
    xor   eax, eax\r
 exit:\r
    jmp   ebp\r
-SecPlatformInitDflt   ENDP\r
+SecPlatformInitDefault   ENDP\r
 \r
 ;------------------------------------------------------------------------------\r
-LoadUcodeDflt   PROC  NEAR PUBLIC\r
+LoadUcodeDefault   PROC  NEAR PUBLIC\r
    ; Inputs:\r
    ;   esp -> LOAD_UCODE_PARAMS pointer\r
    ; Register Usage:\r
@@ -300,7 +300,7 @@ done:
 exit:\r
    jmp   ebp\r
 \r
-LoadUcodeDflt   ENDP\r
+LoadUcodeDefault   ENDP\r
 \r
 EstablishStackFsp    PROC    NEAR    PRIVATE\r
   ;\r

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
index 995aef6088e9f160a5be03cfa1305a7041546e98..973aec4c19be50fe08dc2543d180cf0ce0701efd 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
@@ -183,7 +183,7 @@ ASM_GLOBAL    ASM_PFX(Pei2LoaderSwitchStack)
 .equ          DATA_LEN_AT_STACK_TOP, (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)\r
 \r
 #------------------------------------------------------------------------------\r
-# FspSelfCheckDflt\r
+# FspSelfCheckDefault\r
 # Inputs:\r
 #   eax -> Return address\r
 # Outputs:\r
@@ -192,20 +192,20 @@ ASM_GLOBAL    ASM_PFX(Pei2LoaderSwitchStack)
 #   eax is cleared and ebp is used for return address.\r
 #   All others reserved.\r
 #------------------------------------------------------------------------------\r
-ASM_GLOBAL ASM_PFX(FspSelfCheckDflt)\r
-ASM_PFX(FspSelfCheckDflt):\r
+ASM_GLOBAL ASM_PFX(FspSelfCheckDefault)\r
+ASM_PFX(FspSelfCheckDefault):\r
    #\r
    # Save return address to EBP\r
    #\r
    movl  %eax, %ebp\r
    xorl  %eax, %eax\r
 \r
-FspSelfCheckDfltExit:\r
+FspSelfCheckDefaultExit:\r
    jmp   *%ebp\r
 \r
 \r
 #------------------------------------------------------------------------------\r
-# SecPlatformInitDflt\r
+# SecPlatformInitDefault\r
 # Inputs:\r
 #   eax -> Return address\r
 # Outputs:\r
@@ -214,15 +214,15 @@ FspSelfCheckDfltExit:
 #   eax is cleared and ebp is used for return address.\r
 #   All others reserved.\r
 #------------------------------------------------------------------------------\r
-ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)\r
-ASM_PFX(SecPlatformInitDflt):\r
+ASM_GLOBAL ASM_PFX(SecPlatformInitDefault)\r
+ASM_PFX(SecPlatformInitDefault):\r
    #\r
    # Save return address to EBP\r
    #\r
    movl   %eax, %ebp\r
    xorl   %eax, %eax\r
 \r
-SecPlatformInitDfltExit:\r
+SecPlatformInitDefaultExit:\r
    jmp   *%ebp\r
 \r
 \r
@@ -550,7 +550,7 @@ ASM_PFX(TempRamInitApi):
   # CPUID/DeviceID check\r
   #\r
   movl    $TempRamInitApiL0, %eax\r
-  jmp     ASM_PFX(FspSelfCheckDflt)  # @note: ESP can not be changed.\r
+  jmp     ASM_PFX(FspSelfCheckDefault)  # @note: ESP can not be changed.\r
 TempRamInitApiL0:\r
   cmpl    $0x00, %eax\r
   jnz     NemInitExit\r