]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg/PlatformPei: set PCI IO port aperture dynamically
authorLaszlo Ersek <lersek@redhat.com>
Mon, 9 May 2016 20:39:44 +0000 (22:39 +0200)
committerLaszlo Ersek <lersek@redhat.com>
Tue, 17 May 2016 18:48:41 +0000 (20:48 +0200)
Make PcdPciIoBase and PcdPciIoSize dynamic PCDs, and set them in
MemMapInitialization(), where we produce our EFI_RESOURCE_IO descriptor
HOB. (The PCD is consumed by the core PciHostBridgeDxe driver, through our
PciHostBridgeLib instance.)

Take special care to keep the GCD IO space map unchanged on all platforms
OVMF runs on.

Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1333238
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
OvmfPkg/OvmfPkg.dec
OvmfPkg/OvmfPkgIa32.dsc
OvmfPkg/OvmfPkgIa32X64.dsc
OvmfPkg/OvmfPkgX64.dsc
OvmfPkg/PlatformPei/Platform.c

index ce76f11e1b7eeeb3ea9ae755474f10d0f4819d48..54734f7f843aa480488983882d0db32e420cd682 100644 (file)
   gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd|0x0|UINT32|0x1f\r
 \r
-  ## The IO port aperture shared by all PCI root bridges.\r
-  #\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0xC000|UINT64|0x22\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x4000|UINT64|0x23\r
-\r
 [PcdsDynamic, PcdsDynamicEx]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UINT64|2\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x10\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0|UINT16|0x1b\r
   gUefiOvmfPkgTokenSpaceGuid.PcdQemuSmbiosValidated|FALSE|BOOLEAN|0x21\r
 \r
+  ## The IO port aperture shared by all PCI root bridges.\r
+  #\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x22\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x23\r
+\r
   ## The 32-bit MMIO aperture shared by all PCI root bridges.\r
   #\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT64|0x24\r
index c874134c06a7d4b1b83004617c60361b2f52fa3d..c8053a1d1f5dc8327b58e1ad07b034c49a391d7f 100644 (file)
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|FALSE\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0\r
 \r
index 369da816d65d6ee213968837518a4536daf54d1d..e4e426025d391bbaf54ffd2074ae34163257ac08 100644 (file)
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|FALSE\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0\r
index 518e648bc9c3e1152a3220de5ff5eb992e77eede..53ab9601f494c85ae502234e15995db255c3dd06 100644 (file)
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable|FALSE\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId|0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase|0x0\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size|0x0\r
   gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base|0x0\r
index a5654a51183bf36c2a8d68e78b0f91c23ad77e6d..b03b577013beb39456e03aaed797a9d8d940e20f 100644 (file)
@@ -156,6 +156,12 @@ MemMapInitialization (
   VOID\r
   )\r
 {\r
+  UINT64 PciIoBase;\r
+  UINT64 PciIoSize;\r
+\r
+  PciIoBase = 0xC000;\r
+  PciIoSize = 0x4000;\r
+\r
   //\r
   // Create Memory Type Information HOB\r
   //\r
@@ -165,17 +171,6 @@ MemMapInitialization (
     sizeof(mDefaultMemoryTypeInformation)\r
     );\r
 \r
-  //\r
-  // Add PCI IO Port space available for PCI resource allocations.\r
-  //\r
-  BuildResourceDescriptorHob (\r
-    EFI_RESOURCE_IO,\r
-    EFI_RESOURCE_ATTRIBUTE_PRESENT     |\r
-    EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
-    PcdGet64 (PcdPciIoBase),\r
-    PcdGet64 (PcdPciIoSize)\r
-    );\r
-\r
   //\r
   // Video memory + Legacy BIOS region\r
   //\r
@@ -250,6 +245,19 @@ MemMapInitialization (
     }\r
     AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r
   }\r
+\r
+  //\r
+  // Add PCI IO Port space available for PCI resource allocations.\r
+  //\r
+  BuildResourceDescriptorHob (\r
+    EFI_RESOURCE_IO,\r
+    EFI_RESOURCE_ATTRIBUTE_PRESENT     |\r
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
+    PciIoBase,\r
+    PciIoSize\r
+    );\r
+  PcdSet64 (PcdPciIoBase, PciIoBase);\r
+  PcdSet64 (PcdPciIoSize, PciIoSize);\r
 }\r
 \r
 EFI_STATUS\r