Add a function to ArmLib that provides access to the Cache Writeback
Granule (CWG) field in CTR_EL0. This information is required when
performing non-coherent DMA.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18758
6f19259b-4bc3-4df7-8a09-
765794883524
VOID\r
);\r
\r
+UINTN\r
+EFIAPI\r
+ArmCacheWritebackGranule (\r
+ VOID\r
+ );\r
+\r
UINTN\r
EFIAPI\r
ArmIsArchTimerImplemented (\r
{\r
return 4 << (ArmCacheInfo () & 0xf); // CTR_EL0.IminLine\r
}\r
+\r
+UINTN\r
+EFIAPI\r
+ArmCacheWritebackGranule (\r
+ VOID\r
+ )\r
+{\r
+ UINTN CWG;\r
+\r
+ CWG = (ArmCacheInfo () >> 24) & 0xf; // CTR_EL0.CWG\r
+\r
+ if (CWG == 0) {\r
+ return SIZE_2KB;\r
+ }\r
+\r
+ return 4 << CWG;\r
+}\r