/** @file\r
Support for the latest PCI standard.\r
\r
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
(C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR> \r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
\r
#include <IndustryStandard/Pci30.h>\r
\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ ECAM (Enhanced Configuration Access Mechanism) address. The unused upper bits\r
+ of Bus, Device, Function and Register are stripped prior to the generation of\r
+ the address.\r
+\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..4095.\r
+\r
+ @return The encode ECAM address.\r
+\r
+**/\r
+#define PCI_ECAM_ADDRESS(Bus,Device,Function,Offset) \\r
+ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
#pragma pack(1)\r
///\r
/// PCI Express Capability Structure\r
configuration cycles must be through the 256 MB PCI Express MMIO window whose base address\r
is defined by PcdPciExpressBaseAddress.\r
\r
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@return The encode PCI address.\r
\r
**/\r
-#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
- (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) PCI_ECAM_ADDRESS ((Bus), (Device), (Function), (Offset))\r
\r
/**\r
Registers a PCI device so PCI configuration registers may be accessed after \r