--- /dev/null
+/** @file\r
+ This file declares PciCfg PPI used to access PCI configuration space in PEI\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: PciCfg.h\r
+\r
+ @par Revision Reference:\r
+ This PPI is defined in PEI CIS\r
+ Version 0.91.\r
+\r
+**/\r
+\r
+#ifndef __PEI_PCI_CFG_H__\r
+#define __PEI_PCI_CFG_H__\r
+\r
+#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \\r
+ { \\r
+ 0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \\r
+ }\r
+\r
+typedef struct _EFI_PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI;\r
+\r
+#define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \\r
+ (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \\r
+ ) & 0x00000000ffffffff\r
+\r
+/**\r
+ PCI read and write operation.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_PCI_CFG_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+\r
+/**\r
+ PCI read-modify-write operation.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param SetBits Value of the bits to set.\r
+ @param ClearBits Value of the bits to clear.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_PCI_CFG_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN SetBits,\r
+ IN UINTN ClearBits\r
+ );\r
+\r
+/**\r
+ @par Ppi Description:\r
+ The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r
+ controllers behind a PCI root bridge controller.\r
+\r
+ @param Read\r
+ PCI read services. See the Read() function description.\r
+\r
+ @param Write\r
+ PCI write services. See the Write() function description.\r
+\r
+ @param Modify\r
+ PCI read-modify-write services. See the Modify() function description.\r
+\r
+**/\r
+struct _EFI_PEI_PCI_CFG_PPI {\r
+ EFI_PEI_PCI_CFG_PPI_IO Read;\r
+ EFI_PEI_PCI_CFG_PPI_IO Write;\r
+ EFI_PEI_PCI_CFG_PPI_RW Modify;\r
+};\r
+\r
+extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;\r
+\r
+#endif\r