Keep NASM file only for new added modules.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-# PeiCoreEntry.S\r
-#\r
-# Abstract:\r
-#\r
-# Find and call SecStartup\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)\r
-ASM_PFX(CallPeiCoreEntryPoint):\r
- #\r
- # Obtain the hob list pointer\r
- #\r
- movl 0x4(%esp), %eax\r
- #\r
- # Obtain the stack information\r
- # ECX: start of range\r
- # EDX: end of range\r
- #\r
- movl 0x8(%esp), %ecx\r
- movl 0xC(%esp), %edx\r
-\r
- #\r
- # Platform init\r
- #\r
- pushal\r
- pushl %edx\r
- pushl %ecx\r
- pushl %eax\r
- call ASM_PFX(PlatformInit)\r
- popl %eax\r
- popl %eax\r
- popl %eax\r
- popal\r
-\r
- #\r
- # Set stack top pointer\r
- #\r
- movl %edx, %esp\r
-\r
- #\r
- # Push the hob list pointer\r
- #\r
- pushl %eax\r
-\r
- #\r
- # Save the value\r
- # ECX: start of range\r
- # EDX: end of range\r
- #\r
- movl %esp, %ebp\r
- pushl %ecx\r
- pushl %edx\r
-\r
- #\r
- # Push processor count to stack first, then BIST status (AP then BSP)\r
- #\r
- movl $1, %eax\r
- cpuid\r
- shr $16, %ebx\r
- andl $0x000000FF, %ebx\r
- cmp $1, %bl\r
- jae PushProcessorCount\r
-\r
- #\r
- # Some processors report 0 logical processors. Effectively 0 = 1.\r
- # So we fix up the processor count\r
- #\r
- inc %ebx\r
-\r
-PushProcessorCount:\r
- pushl %ebx\r
-\r
- #\r
- # We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST\r
- # for all processor threads\r
- #\r
- xorl %ecx, %ecx\r
- movb %bl, %cl\r
-PushBist:\r
- movd %mm0, %eax\r
- pushl %eax\r
- loop PushBist\r
-\r
- # Save Time-Stamp Counter\r
- movd %mm5, %eax\r
- pushl %eax\r
-\r
- movd %mm6, %eax\r
- pushl %eax\r
-\r
- #\r
- # Pass entry point of the PEI core\r
- #\r
- movl $0xFFFFFFE0, %edi\r
- pushl %ds:(%edi)\r
-\r
- #\r
- # Pass BFV into the PEI Core\r
- #\r
- movl $0xFFFFFFFC, %edi\r
- pushl %ds:(%edi)\r
-\r
- #\r
- # Pass stack size into the PEI Core\r
- #\r
- movl -4(%ebp), %ecx\r
- movl -8(%ebp), %edx\r
- pushl %ecx # RamBase\r
-\r
- subl %ecx, %edx\r
- pushl %edx # RamSize\r
-\r
- #\r
- # Pass Control into the PEI Core\r
- #\r
- call ASM_PFX(SecStartup)\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; PeiCoreEntry.asm\r
-;\r
-; Abstract:\r
-;\r
-; Find and call SecStartup\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-.686p\r
-.xmm\r
-.model flat, c\r
-.code\r
-\r
-EXTRN SecStartup:NEAR\r
-EXTRN PlatformInit:NEAR\r
-\r
-CallPeiCoreEntryPoint PROC PUBLIC\r
- ;\r
- ; Obtain the hob list pointer\r
- ;\r
- mov eax, [esp+4]\r
- ;\r
- ; Obtain the stack information\r
- ; ECX: start of range\r
- ; EDX: end of range\r
- ;\r
- mov ecx, [esp+8]\r
- mov edx, [esp+0Ch]\r
-\r
- ;\r
- ; Platform init\r
- ;\r
- pushad\r
- push edx\r
- push ecx\r
- push eax\r
- call PlatformInit\r
- pop eax\r
- pop eax\r
- pop eax\r
- popad\r
-\r
- ;\r
- ; Set stack top pointer\r
- ;\r
- mov esp, edx\r
-\r
- ;\r
- ; Push the hob list pointer\r
- ;\r
- push eax\r
-\r
- ;\r
- ; Save the value\r
- ; ECX: start of range\r
- ; EDX: end of range\r
- ;\r
- mov ebp, esp\r
- push ecx\r
- push edx\r
-\r
- ;\r
- ; Push processor count to stack first, then BIST status (AP then BSP)\r
- ;\r
- mov eax, 1\r
- cpuid\r
- shr ebx, 16\r
- and ebx, 0000000FFh\r
- cmp bl, 1\r
- jae PushProcessorCount\r
-\r
- ;\r
- ; Some processors report 0 logical processors. Effectively 0 = 1.\r
- ; So we fix up the processor count\r
- ;\r
- inc ebx\r
-\r
-PushProcessorCount:\r
- push ebx\r
-\r
- ;\r
- ; We need to implement a long-term solution for BIST capture. For now, we just copy BSP BIST\r
- ; for all processor threads\r
- ;\r
- xor ecx, ecx\r
- mov cl, bl\r
-PushBist:\r
- movd eax, mm0\r
- push eax\r
- loop PushBist\r
-\r
- ; Save Time-Stamp Counter\r
- movd eax, mm5\r
- push eax\r
-\r
- movd eax, mm6\r
- push eax\r
-\r
- ;\r
- ; Pass entry point of the PEI core\r
- ;\r
- mov edi, 0FFFFFFE0h\r
- push DWORD PTR ds:[edi]\r
-\r
- ;\r
- ; Pass BFV into the PEI Core\r
- ;\r
- mov edi, 0FFFFFFFCh\r
- push DWORD PTR ds:[edi]\r
-\r
- ;\r
- ; Pass stack size into the PEI Core\r
- ;\r
- mov ecx, [ebp - 4]\r
- mov edx, [ebp - 8]\r
- push ecx ; RamBase\r
-\r
- sub edx, ecx\r
- push edx ; RamSize\r
-\r
- ;\r
- ; Pass Control into the PEI Core\r
- ;\r
- call SecStartup\r
-CallPeiCoreEntryPoint ENDP\r
-\r
-END\r
+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Module Name:\r
-#\r
-# SecEntry.S\r
-#\r
-# Abstract:\r
-#\r
-# This is the code that goes from real-mode to protected mode.\r
-# It consumes the reset vector, calls TempRamInit API from FSP binary.\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-#include "Fsp.h"\r
-\r
-ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress)\r
-\r
-ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)\r
-ASM_PFX(_TEXT_REALMODE):\r
-#----------------------------------------------------------------------------\r
-#\r
-# Procedure: _ModuleEntryPoint\r
-#\r
-# Input: None\r
-#\r
-# Output: None\r
-#\r
-# Destroys: Assume all registers\r
-#\r
-# Description:\r
-#\r
-# Transition to non-paged flat-model protected mode from a\r
-# hard-coded GDT that provides exactly two descriptors.\r
-# This is a bare bones transition to protected mode only\r
-# used for a while in PEI and possibly DXE.\r
-#\r
-# After enabling protected mode, a far jump is executed to\r
-# transfer to PEI using the newly loaded GDT.\r
-#\r
-# Return: None\r
-#\r
-# MMX Usage:\r
-# MM0 = BIST State\r
-# MM5 = Save time-stamp counter value high32bit\r
-# MM6 = Save time-stamp counter value low32bit.\r
-#\r
-#----------------------------------------------------------------------------\r
-\r
-.align 4\r
-ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)\r
-ASM_PFX(_ModuleEntryPoint):\r
- fninit # clear any pending Floating point exceptions\r
- #\r
- # Store the BIST value in mm0\r
- #\r
- movd %eax, %mm0\r
-\r
- #\r
- # Save time-stamp counter value\r
- # rdtsc load 64bit time-stamp counter to EDX:EAX\r
- #\r
- rdtsc\r
- movd %edx, %mm5\r
- movd %ecx, %mm6\r
-\r
- #\r
- # Load the GDT table in GdtDesc\r
- #\r
- movl $GdtDesc, %esi\r
- .byte 0x66\r
- lgdt %cs:(%si)\r
-\r
- #\r
- # Transition to 16 bit protected mode\r
- #\r
- movl %cr0, %eax # Get control register 0\r
- orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)\r
- movl %eax, %cr0 # Activate protected mode\r
-\r
- movl %cr4, %eax # Get control register 4\r
- orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)\r
- movl %eax, %cr4\r
-\r
- #\r
- # Now we're in 16 bit protected mode\r
- # Set up the selectors for 32 bit protected mode entry\r
- #\r
- movw SYS_DATA_SEL, %ax\r
- movw %ax, %ds\r
- movw %ax, %es\r
- movw %ax, %fs\r
- movw %ax, %gs\r
- movw %ax, %ss\r
-\r
- #\r
- # Transition to Flat 32 bit protected mode\r
- # The jump to a far pointer causes the transition to 32 bit mode\r
- #\r
- movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi\r
- jmp *%cs:(%si)\r
-\r
-ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)\r
-ASM_PFX(_TEXT_PROTECTED_MODE):\r
-\r
-#----------------------------------------------------------------------------\r
-#\r
-# Procedure: ProtectedModeEntryPoint\r
-#\r
-# Input: None\r
-#\r
-# Output: None\r
-#\r
-# Destroys: Assume all registers\r
-#\r
-# Description:\r
-#\r
-# This function handles:\r
-# Call two basic APIs from FSP binary\r
-# Initializes stack with some early data (BIST, PEI entry, etc)\r
-#\r
-# Return: None\r
-#\r
-#----------------------------------------------------------------------------\r
-\r
-.align 4\r
-ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)\r
-ASM_PFX(ProtectedModeEntryPoint):\r
-\r
- # Find the fsp info header\r
- movl ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress), %edi\r
-\r
- movl FVH_SIGINATURE_OFFSET(%edi), %eax\r
- cmp $FVH_SIGINATURE_VALID_VALUE, %eax\r
- jnz FspHeaderNotFound\r
-\r
- xorl %eax, %eax\r
- movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax\r
- cmp %ax, 0\r
- jnz FspFvExtHeaderExist\r
-\r
- xorl %eax, %eax\r
- movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header\r
- addl %eax, %edi\r
- jmp FspCheckFfsHeader\r
-\r
-FspFvExtHeaderExist:\r
- addl %eax, %edi\r
- movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header\r
- addl %eax, %edi\r
-\r
- # Round up to 8 byte alignment\r
- movl %edi, %eax\r
- andb $0x07, %al\r
- jz FspCheckFfsHeader\r
-\r
- and $0xFFFFFFF8, %edi\r
- add $0x08, %edi\r
-\r
-FspCheckFfsHeader:\r
- # Check the ffs guid\r
- movl (%edi), %eax\r
- cmp $FSP_HEADER_GUID_DWORD1, %eax\r
- jnz FspHeaderNotFound\r
-\r
- movl 0x4(%edi), %eax\r
- cmp $FSP_HEADER_GUID_DWORD2, %eax\r
- jnz FspHeaderNotFound\r
-\r
- movl 0x08(%edi), %eax\r
- cmp $FSP_HEADER_GUID_DWORD3, %eax\r
- jnz FspHeaderNotFound\r
-\r
- movl 0x0c(%edi), %eax\r
- cmp $FSP_HEADER_GUID_DWORD4, %eax\r
- jnz FspHeaderNotFound\r
-\r
- add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header\r
-\r
- # Check the section type as raw section\r
- movb SECTION_HEADER_TYPE_OFFSET(%edi), %al\r
- cmp $0x19, %al\r
- jnz FspHeaderNotFound\r
-\r
- addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header\r
- jmp FspHeaderFound\r
-\r
-FspHeaderNotFound:\r
- jmp .\r
-\r
-FspHeaderFound:\r
- # Get the fsp TempRamInit Api address\r
- movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax\r
- addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax\r
-\r
- # Setup the hardcode stack\r
- movl $TempRamInitStack, %esp\r
-\r
- # Call the fsp TempRamInit Api\r
- jmp *%eax\r
-\r
-TempRamInitDone:\r
- cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.\r
- je CallSecFspInit #If microcode not found, don't hang, but continue.\r
-\r
- cmp $0x0, %eax\r
- jnz FspApiFailed\r
-\r
- # ECX: start of range\r
- # EDX: end of range\r
-CallSecFspInit:\r
- xorl %eax, %eax\r
- movl %edx, %esp\r
-\r
- # Align the stack at DWORD\r
- addl $3, %esp\r
- andl $0xFFFFFFFC, %esp\r
-\r
- pushl %edx\r
- pushl %ecx\r
- pushl %eax # zero - no hob list yet\r
- call ASM_PFX(CallPeiCoreEntryPoint)\r
-\r
-FspApiFailed:\r
- jmp .\r
-\r
-.align 0x10\r
-TempRamInitStack:\r
- .long TempRamInitDone\r
- .long ASM_PFX(FsptUpdDataPtr)\r
-\r
-#\r
-# ROM-based Global-Descriptor Table for the Tiano PEI Phase\r
-#\r
-.align 16\r
-\r
-#\r
-# GDT[0]: 0x00: Null entry, never used.\r
-#\r
-.equ NULL_SEL, . - GDT_BASE # Selector [0]\r
-GDT_BASE:\r
-BootGdtTable: .long 0\r
- .long 0\r
-#\r
-# Linear data segment descriptor\r
-#\r
-.equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]\r
- .word 0xFFFF # limit 0xFFFFF\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0x92 # present, ring 0, data, expand-up, writable\r
- .byte 0xCF # page-granular, 32-bit\r
- .byte 0\r
-#\r
-# Linear code segment descriptor\r
-#\r
-.equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]\r
- .word 0xFFFF # limit 0xFFFFF\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0x9B # present, ring 0, data, expand-up, not-writable\r
- .byte 0xCF # page-granular, 32-bit\r
- .byte 0\r
-#\r
-# System data segment descriptor\r
-#\r
-.equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]\r
- .word 0xFFFF # limit 0xFFFFF\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0x93 # present, ring 0, data, expand-up, not-writable\r
- .byte 0xCF # page-granular, 32-bit\r
- .byte 0\r
-\r
-#\r
-# System code segment descriptor\r
-#\r
-.equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]\r
- .word 0xFFFF # limit 0xFFFFF\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0x9A # present, ring 0, data, expand-up, writable\r
- .byte 0xCF # page-granular, 32-bit\r
- .byte 0\r
-#\r
-# Spare segment descriptor\r
-#\r
-.equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]\r
- .word 0xFFFF # limit 0xFFFFF\r
- .word 0 # base 0\r
- .byte 0x0E # Changed from F000 to E000.\r
- .byte 0x9B # present, ring 0, code, expand-up, writable\r
- .byte 0x00 # byte-granular, 16-bit\r
- .byte 0\r
-#\r
-# Spare segment descriptor\r
-#\r
-.equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]\r
- .word 0xFFFF # limit 0xFFFF\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0x93 # present, ring 0, data, expand-up, not-writable\r
- .byte 0x00 # byte-granular, 16-bit\r
- .byte 0\r
-\r
-#\r
-# Spare segment descriptor\r
-#\r
-.equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]\r
- .word 0 # limit 0\r
- .word 0 # base 0\r
- .byte 0\r
- .byte 0 # present, ring 0, data, expand-up, writable\r
- .byte 0 # page-granular, 32-bit\r
- .byte 0\r
-.equ GDT_SIZE, . - BootGdtTable # Size, in bytes\r
-\r
-#\r
-# GDT Descriptor\r
-#\r
-GdtDesc: # GDT descriptor\r
- .word GDT_SIZE - 1 # GDT limit\r
- .long BootGdtTable # GDT base address\r
-\r
-ASM_PFX(ProtectedModeEntryLinearAddress):\r
-ProtectedModeEntryLinearOffset:\r
- .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code\r
- .word LINEAR_CODE_SEL\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; SecEntry.asm\r
-;\r
-; Abstract:\r
-;\r
-; This is the code that goes from real-mode to protected mode.\r
-; It consumes the reset vector, calls TempRamInit API from FSP binary.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-#include "Fsp.h"\r
-\r
-.686p\r
-.xmm\r
-.model small, c\r
-\r
-EXTRN CallPeiCoreEntryPoint:NEAR\r
-EXTRN FsptUpdDataPtr:FAR\r
-\r
-; Pcds\r
-EXTRN PcdGet32 (PcdFsptBaseAddress):DWORD\r
-\r
-_TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'\r
- ASSUME CS:_TEXT_REALMODE, DS:_TEXT_REALMODE\r
-\r
-;----------------------------------------------------------------------------\r
-;\r
-; Procedure: _ModuleEntryPoint\r
-;\r
-; Input: None\r
-;\r
-; Output: None\r
-;\r
-; Destroys: Assume all registers\r
-;\r
-; Description:\r
-;\r
-; Transition to non-paged flat-model protected mode from a\r
-; hard-coded GDT that provides exactly two descriptors.\r
-; This is a bare bones transition to protected mode only\r
-; used for a while in PEI and possibly DXE.\r
-;\r
-; After enabling protected mode, a far jump is executed to\r
-; transfer to PEI using the newly loaded GDT.\r
-;\r
-; Return: None\r
-;\r
-; MMX Usage:\r
-; MM0 = BIST State\r
-; MM5 = Save time-stamp counter value high32bit\r
-; MM6 = Save time-stamp counter value low32bit.\r
-;\r
-;----------------------------------------------------------------------------\r
-\r
-align 4\r
-_ModuleEntryPoint PROC NEAR C PUBLIC\r
- fninit ; clear any pending Floating point exceptions\r
- ;\r
- ; Store the BIST value in mm0\r
- ;\r
- movd mm0, eax\r
-\r
- ;\r
- ; Save time-stamp counter value\r
- ; rdtsc load 64bit time-stamp counter to EDX:EAX\r
- ;\r
- rdtsc\r
- movd mm5, edx\r
- movd mm6, eax\r
-\r
- ;\r
- ; Load the GDT table in GdtDesc\r
- ;\r
- mov esi, OFFSET GdtDesc\r
- DB 66h\r
- lgdt fword ptr cs:[si]\r
-\r
- ;\r
- ; Transition to 16 bit protected mode\r
- ;\r
- mov eax, cr0 ; Get control register 0\r
- or eax, 00000003h ; Set PE bit (bit #0) & MP bit (bit #1)\r
- mov cr0, eax ; Activate protected mode\r
-\r
- mov eax, cr4 ; Get control register 4\r
- or eax, 00000600h ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)\r
- mov cr4, eax\r
-\r
- ;\r
- ; Now we're in 16 bit protected mode\r
- ; Set up the selectors for 32 bit protected mode entry\r
- ;\r
- mov ax, SYS_DATA_SEL\r
- mov ds, ax\r
- mov es, ax\r
- mov fs, ax\r
- mov gs, ax\r
- mov ss, ax\r
-\r
- ;\r
- ; Transition to Flat 32 bit protected mode\r
- ; The jump to a far pointer causes the transition to 32 bit mode\r
- ;\r
- mov esi, offset ProtectedModeEntryLinearAddress\r
- jmp fword ptr cs:[si]\r
-\r
-_ModuleEntryPoint ENDP\r
-_TEXT_REALMODE ENDS\r
-\r
-_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'\r
- ASSUME CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE\r
-\r
-;----------------------------------------------------------------------------\r
-;\r
-; Procedure: ProtectedModeEntryPoint\r
-;\r
-; Input: None\r
-;\r
-; Output: None\r
-;\r
-; Destroys: Assume all registers\r
-;\r
-; Description:\r
-;\r
-; This function handles:\r
-; Call two basic APIs from FSP binary\r
-; Initializes stack with some early data (BIST, PEI entry, etc)\r
-;\r
-; Return: None\r
-;\r
-;----------------------------------------------------------------------------\r
-\r
-align 4\r
-ProtectedModeEntryPoint PROC NEAR PUBLIC\r
-\r
- ; Find the fsp info header\r
- mov edi, PcdGet32 (PcdFsptBaseAddress)\r
-\r
- mov eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]\r
- cmp eax, FVH_SIGINATURE_VALID_VALUE\r
- jnz FspHeaderNotFound\r
-\r
- xor eax, eax\r
- mov ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]\r
- cmp ax, 0\r
- jnz FspFvExtHeaderExist\r
-\r
- xor eax, eax\r
- mov ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET] ; Bypass Fv Header\r
- add edi, eax\r
- jmp FspCheckFfsHeader\r
-\r
-FspFvExtHeaderExist:\r
- add edi, eax\r
- mov eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET] ; Bypass Ext Fv Header\r
- add edi, eax\r
-\r
- ; Round up to 8 byte alignment\r
- mov eax, edi\r
- and al, 07h\r
- jz FspCheckFfsHeader\r
-\r
- and edi, 0FFFFFFF8h\r
- add edi, 08h\r
-\r
-FspCheckFfsHeader:\r
- ; Check the ffs guid\r
- mov eax, dword ptr [edi]\r
- cmp eax, FSP_HEADER_GUID_DWORD1\r
- jnz FspHeaderNotFound\r
-\r
- mov eax, dword ptr [edi + 4]\r
- cmp eax, FSP_HEADER_GUID_DWORD2\r
- jnz FspHeaderNotFound\r
-\r
- mov eax, dword ptr [edi + 8]\r
- cmp eax, FSP_HEADER_GUID_DWORD3\r
- jnz FspHeaderNotFound\r
-\r
- mov eax, dword ptr [edi + 0Ch]\r
- cmp eax, FSP_HEADER_GUID_DWORD4\r
- jnz FspHeaderNotFound\r
-\r
- add edi, FFS_HEADER_SIZE_VALUE ; Bypass the ffs header\r
-\r
- ; Check the section type as raw section\r
- mov al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]\r
- cmp al, 019h\r
- jnz FspHeaderNotFound\r
-\r
- add edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header\r
- jmp FspHeaderFound\r
-\r
-FspHeaderNotFound:\r
- jmp $\r
-\r
-FspHeaderFound:\r
- ; Get the fsp TempRamInit Api address\r
- mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]\r
- add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]\r
-\r
- ; Setup the hardcode stack\r
- mov esp, OFFSET TempRamInitStack\r
-\r
- ; Call the fsp TempRamInit Api\r
- jmp eax\r
-\r
-TempRamInitDone:\r
- cmp eax, 8000000Eh ;Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.\r
- je CallSecFspInit ;If microcode not found, don't hang, but continue.\r
-\r
- cmp eax, 0 ;Check if EFI_SUCCESS retuned.\r
- jnz FspApiFailed\r
-\r
- ; ECX: start of range\r
- ; EDX: end of range\r
-CallSecFspInit:\r
- xor eax, eax\r
- mov esp, edx\r
-\r
- ; Align the stack at DWORD\r
- add esp, 3\r
- and esp, 0FFFFFFFCh\r
-\r
- push edx\r
- push ecx\r
- push eax ; zero - no hob list yet\r
- call CallPeiCoreEntryPoint\r
-\r
-FspApiFailed:\r
- jmp $\r
-\r
-align 10h\r
-TempRamInitStack:\r
- DD OFFSET TempRamInitDone\r
- DD OFFSET FsptUpdDataPtr ; TempRamInitParams\r
-\r
-ProtectedModeEntryPoint ENDP\r
-\r
-;\r
-; ROM-based Global-Descriptor Table for the Tiano PEI Phase\r
-;\r
-align 16\r
-PUBLIC BootGdtTable\r
-\r
-;\r
-; GDT[0]: 0x00: Null entry, never used.\r
-;\r
-NULL_SEL EQU $ - GDT_BASE ; Selector [0]\r
-GDT_BASE:\r
-BootGdtTable DD 0\r
- DD 0\r
-;\r
-; Linear data segment descriptor\r
-;\r
-LINEAR_SEL EQU $ - GDT_BASE ; Selector [0x8]\r
- DW 0FFFFh ; limit 0xFFFFF\r
- DW 0 ; base 0\r
- DB 0\r
- DB 092h ; present, ring 0, data, expand-up, writable\r
- DB 0CFh ; page-granular, 32-bit\r
- DB 0\r
-;\r
-; Linear code segment descriptor\r
-;\r
-LINEAR_CODE_SEL EQU $ - GDT_BASE ; Selector [0x10]\r
- DW 0FFFFh ; limit 0xFFFFF\r
- DW 0 ; base 0\r
- DB 0\r
- DB 09Bh ; present, ring 0, data, expand-up, not-writable\r
- DB 0CFh ; page-granular, 32-bit\r
- DB 0\r
-;\r
-; System data segment descriptor\r
-;\r
-SYS_DATA_SEL EQU $ - GDT_BASE ; Selector [0x18]\r
- DW 0FFFFh ; limit 0xFFFFF\r
- DW 0 ; base 0\r
- DB 0\r
- DB 093h ; present, ring 0, data, expand-up, not-writable\r
- DB 0CFh ; page-granular, 32-bit\r
- DB 0\r
-\r
-;\r
-; System code segment descriptor\r
-;\r
-SYS_CODE_SEL EQU $ - GDT_BASE ; Selector [0x20]\r
- DW 0FFFFh ; limit 0xFFFFF\r
- DW 0 ; base 0\r
- DB 0\r
- DB 09Ah ; present, ring 0, data, expand-up, writable\r
- DB 0CFh ; page-granular, 32-bit\r
- DB 0\r
-;\r
-; Spare segment descriptor\r
-;\r
-SYS16_CODE_SEL EQU $ - GDT_BASE ; Selector [0x28]\r
- DW 0FFFFh ; limit 0xFFFFF\r
- DW 0 ; base 0\r
- DB 0Eh ; Changed from F000 to E000.\r
- DB 09Bh ; present, ring 0, code, expand-up, writable\r
- DB 00h ; byte-granular, 16-bit\r
- DB 0\r
-;\r
-; Spare segment descriptor\r
-;\r
-SYS16_DATA_SEL EQU $ - GDT_BASE ; Selector [0x30]\r
- DW 0FFFFh ; limit 0xFFFF\r
- DW 0 ; base 0\r
- DB 0\r
- DB 093h ; present, ring 0, data, expand-up, not-writable\r
- DB 00h ; byte-granular, 16-bit\r
- DB 0\r
-\r
-;\r
-; Spare segment descriptor\r
-;\r
-SPARE5_SEL EQU $ - GDT_BASE ; Selector [0x38]\r
- DW 0 ; limit 0\r
- DW 0 ; base 0\r
- DB 0\r
- DB 0 ; present, ring 0, data, expand-up, writable\r
- DB 0 ; page-granular, 32-bit\r
- DB 0\r
-GDT_SIZE EQU $ - BootGdtTable ; Size, in bytes\r
-\r
-;\r
-; GDT Descriptor\r
-;\r
-GdtDesc: ; GDT descriptor\r
- DW GDT_SIZE - 1 ; GDT limit\r
- DD OFFSET BootGdtTable ; GDT base address\r
-\r
-\r
-ProtectedModeEntryLinearAddress LABEL FWORD\r
-ProtectedModeEntryLinearOffset LABEL DWORD\r
- DD OFFSET ProtectedModeEntryPoint ; Offset of our 32 bit code\r
- DW LINEAR_CODE_SEL\r
-\r
-_TEXT_PROTECTED_MODE ENDS\r
-END\r
+++ /dev/null
-#------------------------------------------------------------------------------\r
-#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php.\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-# Abstract:\r
-#\r
-# Switch the stack from temporary memory to permenent memory.\r
-#\r
-#------------------------------------------------------------------------------\r
-\r
-\r
-#------------------------------------------------------------------------------\r
-# VOID\r
-# EFIAPI\r
-# SecSwitchStack (\r
-# UINT32 TemporaryMemoryBase,\r
-# UINT32 PermanentMemoryBase\r
-# )#\r
-#------------------------------------------------------------------------------\r
-ASM_GLOBAL ASM_PFX (SecSwitchStack)\r
-ASM_PFX(SecSwitchStack):\r
- #\r
- # Save standard registers so they can be used to change stack\r
- #\r
- pushl %eax\r
- pushl %ebx\r
- pushl %ecx\r
- pushl %edx\r
-\r
- #\r
- # !!CAUTION!! this function address's is pushed into stack after\r
- # migration of whole temporary memory, so need save it to permanent\r
- # memory at first!\r
- #\r
- movl 20(%esp), %ebx # Save the first parameter\r
- movl 24(%esp), %ecx # Save the second parameter\r
-\r
- #\r
- # Save this function's return address into permanent memory at first.\r
- # Then, Fixup the esp point to permanent memory\r
- #\r
- movl %esp, %eax\r
- subl %ebx, %eax\r
- addl %ecx, %eax\r
- movl 0(%esp), %edx # copy pushed register's value to permanent memory\r
- movl %edx, 0(%eax)\r
- movl 4(%esp), %edx\r
- movl %edx, 4(%eax)\r
- movl 8(%esp), %edx\r
- movl %edx, 8(%eax)\r
- movl 12(%esp), %edx\r
- movl %edx, 12(%eax)\r
- movl 16(%esp), %edx # Update this function's return address into permanent memory\r
- movl %edx, 16(%eax)\r
- movl %eax, %esp # From now, esp is pointed to permanent memory\r
-\r
- #\r
- # Fixup the ebp point to permanent memory\r
- #\r
- movl %ebp, %eax\r
- subl %ebx, %eax\r
- addl %ecx, %eax\r
- movl %eax, %ebp # From now, ebp is pointed to permanent memory\r
-\r
- popl %edx\r
- popl %ecx\r
- popl %ebx\r
- popl %eax\r
- ret\r
-\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Abstract:\r
-;\r
-; Switch the stack from temporary memory to permenent memory.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
- .586p\r
- .model flat,C\r
- .code\r
-\r
-;------------------------------------------------------------------------------\r
-; VOID\r
-; EFIAPI\r
-; SecSwitchStack (\r
-; UINT32 TemporaryMemoryBase,\r
-; UINT32 PermanentMemoryBase\r
-; );\r
-;------------------------------------------------------------------------------\r
-SecSwitchStack PROC\r
- ;\r
- ; Save three register: eax, ebx, ecx\r
- ;\r
- push eax\r
- push ebx\r
- push ecx\r
- push edx\r
-\r
- ;\r
- ; !!CAUTION!! this function address's is pushed into stack after\r
- ; migration of whole temporary memory, so need save it to permanent\r
- ; memory at first!\r
- ;\r
-\r
- mov ebx, [esp + 20] ; Save the first parameter\r
- mov ecx, [esp + 24] ; Save the second parameter\r
-\r
- ;\r
- ; Save this function's return address into permanent memory at first.\r
- ; Then, Fixup the esp point to permanent memory\r
- ;\r
- mov eax, esp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov edx, dword ptr [esp] ; copy pushed register's value to permanent memory\r
- mov dword ptr [eax], edx\r
- mov edx, dword ptr [esp + 4]\r
- mov dword ptr [eax + 4], edx\r
- mov edx, dword ptr [esp + 8]\r
- mov dword ptr [eax + 8], edx\r
- mov edx, dword ptr [esp + 12]\r
- mov dword ptr [eax + 12], edx\r
- mov edx, dword ptr [esp + 16] ; Update this function's return address into permanent memory\r
- mov dword ptr [eax + 16], edx\r
- mov esp, eax ; From now, esp is pointed to permanent memory\r
-\r
- ;\r
- ; Fixup the ebp point to permanent memory\r
- ;\r
- mov eax, ebp\r
- sub eax, ebx\r
- add eax, ecx\r
- mov ebp, eax ; From now, ebp is pointed to permanent memory\r
-\r
- pop edx\r
- pop ecx\r
- pop ebx\r
- pop eax\r
- ret\r
-SecSwitchStack ENDP\r
-\r
- END\r
PlatformInit.c\r
\r
[Sources.IA32]\r
- Ia32/SecEntry.asm\r
- Ia32/PeiCoreEntry.asm\r
- Ia32/Stack.asm\r
Ia32/Fsp.h\r
- Ia32/SecEntry.S\r
- Ia32/PeiCoreEntry.S\r
- Ia32/Stack.S\r
Ia32/SecEntry.nasm\r
Ia32/PeiCoreEntry.nasm\r
Ia32/Stack.nasm\r
projects / mirror_edk2.git / commitdiff