THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
-**/ \r
+**/\r
\r
#include "PciHostBridge.h"\r
\r
EISA_PNP_ID(0x0A03),\r
0\r
},\r
- \r
+\r
{\r
END_DEVICE_PATH_TYPE,\r
END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
UINTN Loop2;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridge;\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
- \r
+\r
if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {\r
DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));\r
return EFI_ABORTED;\r
}\r
\r
mDriverImageHandle = ImageHandle;\r
- \r
+\r
mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);\r
mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);\r
\r
if (HostBridge == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];\r
InitializeListHead (&HostBridge->Head);\r
\r
Status = gBS->InstallMultipleProtocolInterfaces (\r
- &HostBridge->HostBridgeHandle, \r
+ &HostBridge->HostBridgeHandle,\r
&gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,\r
NULL\r
);\r
FreePool (HostBridge);\r
return EFI_DEVICE_ERROR;\r
}\r
- \r
+\r
//\r
// Create Root Bridge Device Handle in this Host Bridge\r
//\r
- \r
+\r
for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {\r
PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));\r
if (PrivateData == NULL) {\r
PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];\r
\r
RootBridgeConstructor (\r
- &PrivateData->Io, \r
- HostBridge->HostBridgeHandle, \r
- RootBridgeAttribute[Loop1][Loop2], \r
+ &PrivateData->Io,\r
+ HostBridge->HostBridgeHandle,\r
+ RootBridgeAttribute[Loop1][Loop2],\r
&mResAperture[Loop1][Loop2]\r
);\r
- \r
+\r
Status = gBS->InstallMultipleProtocolInterfaces(\r
- &PrivateData->Handle, \r
+ &PrivateData->Handle,\r
&gEfiDevicePathProtocolGuid, PrivateData->DevicePath,\r
&gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,\r
NULL\r
FreePool(PrivateData);\r
return EFI_DEVICE_ERROR;\r
}\r
- \r
+\r
InsertTailList (&HostBridge->Head, &PrivateData->Link);\r
}\r
- } \r
+ }\r
\r
return EFI_SUCCESS;\r
}\r
UINTN BitsOfAlignment;\r
EFI_STATUS Status;\r
EFI_STATUS ReturnStatus;\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
- \r
+\r
switch (Phase) {\r
\r
case EfiPciHostBridgeBeginEnumeration:\r
if (HostBridgeInstance->CanRestarted) {\r
//\r
- // Reset the Each Root Bridge \r
+ // Reset the Each Root Bridge\r
//\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
for (Index = TypeIo; Index < TypeMax; Index++) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
HostBridgeInstance->ResourceSubmited = FALSE;\r
HostBridgeInstance->CanRestarted = TRUE;\r
} else {\r
//\r
// Can not restart\r
- // \r
+ //\r
return EFI_NOT_READY;\r
- } \r
+ }\r
break;\r
\r
case EfiPciHostBridgeEndEnumeration:\r
ReturnStatus = EFI_SUCCESS;\r
if (HostBridgeInstance->ResourceSubmited) {\r
//\r
- // Take care of the resource dependencies between the root bridges \r
+ // Take care of the resource dependencies between the root bridges\r
//\r
List = HostBridgeInstance->Head.ForwardLink;\r
\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
for (Index = TypeIo; Index < TypeBus; Index++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
- \r
+\r
AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
- \r
+\r
//\r
// Get the number of '1' in Alignment.\r
//\r
BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);\r
- \r
+\r
switch (Index) {\r
\r
- case TypeIo: \r
+ case TypeIo:\r
//\r
// It is impossible for this chipset to align 0xFFFF for IO16\r
// So clear it\r
if (BitsOfAlignment >= 16) {\r
BitsOfAlignment = 0;\r
}\r
- \r
+\r
BaseAddress = mResAperture[0][0].IoLimit;\r
Status = gDS->AllocateIoSpace (\r
EfiGcdAllocateMaxAddressSearchTopDown,\r
- EfiGcdIoTypeIo, \r
+ EfiGcdIoTypeIo,\r
BitsOfAlignment,\r
AddrLen,\r
&BaseAddress,\r
mDriverImageHandle,\r
NULL\r
);\r
- \r
+\r
if (!EFI_ERROR (Status)) {\r
RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r
- RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated; \r
+ RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;\r
} else {\r
- ReturnStatus = Status; \r
+ ReturnStatus = Status;\r
if (Status != EFI_OUT_OF_RESOURCES) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
}\r
case TypeMem32:\r
//\r
// It is impossible for this chipset to align 0xFFFFFFFF for Mem32\r
- // So clear it \r
+ // So clear it\r
//\r
- \r
+\r
if (BitsOfAlignment >= 32) {\r
BitsOfAlignment = 0;\r
}\r
- \r
+\r
BaseAddress = mResAperture[0][0].MemLimit;\r
Status = gDS->AllocateMemorySpace (\r
EfiGcdAllocateMaxAddressSearchTopDown,\r
- EfiGcdMemoryTypeMemoryMappedIo, \r
+ EfiGcdMemoryTypeMemoryMappedIo,\r
BitsOfAlignment,\r
AddrLen,\r
&BaseAddress,\r
mDriverImageHandle,\r
NULL\r
);\r
- \r
+\r
if (!EFI_ERROR (Status)) {\r
// We were able to allocate the PCI memory\r
RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;\r
RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;\r
- \r
+\r
} else {\r
// Not able to allocate enough PCI memory\r
- ReturnStatus = Status; \r
- \r
+ ReturnStatus = Status;\r
+\r
if (Status != EFI_OUT_OF_RESOURCES) {\r
RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
- } \r
+ }\r
ASSERT (FALSE);\r
}\r
break;\r
- \r
- case TypePMem32: \r
- case TypeMem64: \r
+\r
+ case TypePMem32:\r
+ case TypeMem64:\r
case TypePMem64:\r
ReturnStatus = EFI_ABORTED;\r
- break; \r
+ break;\r
default:\r
ASSERT (FALSE);\r
break;\r
}; //end switch\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return ReturnStatus;\r
\r
} else {\r
BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;\r
switch (Index) {\r
\r
- case TypeIo: \r
- Status = gDS->FreeIoSpace (BaseAddress, AddrLen); \r
+ case TypeIo:\r
+ Status = gDS->FreeIoSpace (BaseAddress, AddrLen);\r
if (EFI_ERROR (Status)) {\r
ReturnStatus = Status;\r
}\r
break;\r
\r
case TypePMem64:\r
- break; \r
+ break;\r
\r
default:\r
ASSERT (FALSE);\r
RootBridgeInstance->ResAllocNode[Index].Status = ResNone;\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
HostBridgeInstance->ResourceSubmited = FALSE;\r
- HostBridgeInstance->CanRestarted = TRUE; \r
+ HostBridgeInstance->CanRestarted = TRUE;\r
return ReturnStatus;\r
\r
case EfiPciHostBridgeEndResourceAllocation:\r
default:\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
- return EFI_SUCCESS; \r
+\r
+ return EFI_SUCCESS;\r
}\r
\r
/**\r
\r
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
@param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.\r
- \r
+\r
@retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r
- specific Host bridge and return EFI_SUCCESS. \r
+ specific Host bridge and return EFI_SUCCESS.\r
@retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was\r
returned on a previous call to GetNextRootBridge().\r
IN OUT EFI_HANDLE *RootBridgeHandle\r
)\r
{\r
- BOOLEAN NoRootBridge; \r
- LIST_ENTRY *List; \r
+ BOOLEAN NoRootBridge;\r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- \r
+\r
NoRootBridge = TRUE;\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
- \r
+\r
+\r
while (List != &HostBridgeInstance->Head) {\r
NoRootBridge = FALSE;\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (List!=&HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
*RootBridgeHandle = RootBridgeInstance->Handle;\r
- return EFI_SUCCESS; \r
+ return EFI_SUCCESS;\r
} else {\r
return EFI_NOT_FOUND;\r
}\r
}\r
}\r
- \r
+\r
List = List->ForwardLink;\r
} //end while\r
- \r
+\r
if (NoRootBridge) {\r
return EFI_NOT_FOUND;\r
} else {\r
handles of all the root bridges that are associated with this host bridge must be obtained by calling\r
GetNextRootBridge(). The attributes are static in the sense that they do not change during or\r
after the enumeration process. The hardware may provide mechanisms to change the attributes on\r
- the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is \r
+ the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is\r
installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in\r
"Related Definitions" below. The caller uses these attributes to combine multiple resource requests.\r
- For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to \r
- include requests for the prefetchable memory in the nonprefetchable memory pool and not request any \r
+ For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to\r
+ include requests for the prefetchable memory in the nonprefetchable memory pool and not request any\r
prefetchable memory.\r
Attribute Description\r
------------------------------------ ----------------------------------------------------------------------\r
@param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type\r
EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r
@param[out] Attributes The pointer to attribte of root bridge, it is output parameter\r
- \r
+\r
@retval EFI_INVALID_PARAMETER Attribute pointer is NULL\r
@retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.\r
@retval EFI_SUCCESS Success to get attribute of interested root bridge.\r
OUT UINT64 *Attributes\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- \r
+\r
if (Attributes == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
}\r
List = List->ForwardLink;\r
}\r
- \r
+\r
//\r
- // RootBridgeHandle is not an EFI_HANDLE \r
+ // RootBridgeHandle is not an EFI_HANDLE\r
// that was returned on a previous call to GetNextRootBridge()\r
//\r
return EFI_INVALID_PARAMETER;\r
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI Root Bridge to be set up.\r
@param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.\r
- \r
+\r
@retval EFI_INVALID_PARAMETER Invalid Root bridge's handle\r
@retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.\r
@retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.\r
OUT VOID **Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
VOID *Buffer;\r
UINT8 *Temp;\r
UINT64 BusStart;\r
UINT64 BusEnd;\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
//\r
// Program the Hardware(if needed) if error return EFI_DEVICE_ERROR\r
//\r
- \r
+\r
Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r
if (Buffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
Temp = (UINT8 *)Buffer;\r
- \r
+\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;\r
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0; \r
+ ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;\r
- ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0; \r
+ ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;\r
((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;\r
- \r
+\r
Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;\r
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
- \r
- *Configuration = Buffer; \r
+\r
+ *Configuration = Buffer;\r
return EFI_SUCCESS;\r
}\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
@param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed\r
@param[in] Configuration The pointer to the PCI bus resource descriptor\r
- \r
+\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Configuration is NULL.\r
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r
@retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.\r
- @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than \r
+ @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than\r
bus descriptors.\r
@retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.\r
@retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r
IN VOID *Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINT8 *Ptr;\r
UINTN BusStart;\r
UINTN BusEnd;\r
UINTN BusLen;\r
- \r
+\r
if (Configuration == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
Ptr = Configuration;\r
- \r
+\r
//\r
// Check the Configuration is valid\r
//\r
if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {\r
return EFI_INVALID_PARAMETER;\r
}\r
if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
Ptr = Configuration;\r
- \r
+\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;\r
BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;\r
BusEnd = BusStart + BusLen - 1;\r
- \r
+\r
if (BusStart > BusEnd) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// Update the Bus Range\r
//\r
RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;\r
RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;\r
RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;\r
- \r
+\r
//\r
// Program the Root Bridge Hardware\r
//\r
- \r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.\r
@param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r
- \r
+\r
@retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Configuration is NULL.\r
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r
- @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are \r
- not supported by this PCI root bridge. This error will happen if the caller \r
+ @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are\r
+ not supported by this PCI root bridge. This error will happen if the caller\r
did not combine resources according to Attributes that were returned by\r
GetAllocAttributes().\r
@retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.\r
IN VOID *Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINT8 *Temp;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 AddrLen;\r
UINT64 Alignment;\r
- \r
+\r
//\r
// Check the input parameter: Configuration\r
//\r
if (Configuration == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
Temp = (UINT8 *)Configuration;\r
- while ( *Temp == 0x8A) { \r
+ while ( *Temp == 0x8A) {\r
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r
}\r
if (*Temp != 0x79) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
Temp = (UINT8 *)Configuration;\r
while (List != &HostBridgeInstance->Head) {\r
RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
switch (Ptr->ResType) {\r
\r
case 0:\r
- \r
+\r
//\r
// Check invalid Address Sapce Granularity\r
//\r
if (Ptr->AddrSpaceGranularity != 32) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// check the memory resource request is supported by PCI root bridge\r
//\r
Ptr->SpecificFlag == 0x06) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
AddrLen = Ptr->AddrLen;\r
Alignment = Ptr->AddrRangeMax;\r
if (Ptr->AddrSpaceGranularity == 32) {\r
} else {\r
RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;\r
RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;\r
- RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested; \r
+ RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;\r
HostBridgeInstance->ResourceSubmited = TRUE;\r
}\r
}\r
RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;\r
RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;\r
- HostBridgeInstance->ResourceSubmited = TRUE; \r
+ HostBridgeInstance->ResourceSubmited = TRUE;\r
break;\r
\r
default:\r
break;\r
};\r
- } \r
- \r
+ }\r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r
@param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r
- \r
+\r
@retval EFI_SUCCESS The requested parameters were returned.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
OUT VOID **Configuration\r
)\r
{\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
UINTN Index;\r
- UINTN Number; \r
- VOID *Buffer; \r
+ UINTN Number;\r
+ VOID *Buffer;\r
UINT8 *Temp;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
UINT64 ResStatus;\r
- \r
+\r
Buffer = NULL;\r
Number = 0;\r
//\r
//\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
- \r
+\r
//\r
// Enumerate the root bridges in this host bridge\r
//\r
for (Index = 0; Index < TypeBus; Index ++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
Number ++;\r
- } \r
+ }\r
}\r
- \r
+\r
if (Number == 0) {\r
EFI_ACPI_END_TAG_DESCRIPTOR *End;\r
\r
if (Buffer == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
- \r
+\r
Temp = Buffer;\r
for (Index = 0; Index < TypeBus; Index ++) {\r
if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
- \r
+\r
switch (Index) {\r
\r
case TypeIo:\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 1;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
Ptr->AddrRangeMax = 0;\r
case TypeMem32:\r
//\r
// Memory 32\r
- // \r
+ //\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrSpaceGranularity = 32;\r
Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
Ptr->AddrRangeMax = 0;\r
Ptr->AddrTranslationOffset = \\r
- (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; \r
+ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r
Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 6;\r
Ptr->AddrSpaceGranularity = 32;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 0;\r
Ptr->AddrSpaceGranularity = 64;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
\r
Ptr->Desc = 0x8A;\r
Ptr->Len = 0x2B;\r
Ptr->ResType = 0;\r
- Ptr->GenFlag = 0; \r
+ Ptr->GenFlag = 0;\r
Ptr->SpecificFlag = 6;\r
Ptr->AddrSpaceGranularity = 64;\r
Ptr->AddrRangeMin = 0;\r
Ptr->AddrRangeMax = 0;\r
- Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT; \r
+ Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;\r
Ptr->AddrLen = 0;\r
break;\r
};\r
- \r
+\r
Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
- } \r
+ }\r
}\r
- \r
- ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79; \r
+\r
+ ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;\r
((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
- \r
- *Configuration = Buffer; \r
- \r
+\r
+ *Configuration = Buffer;\r
+\r
return EFI_SUCCESS;\r
}\r
- \r
+\r
List = List->ForwardLink;\r
}\r
- \r
+\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI\r
configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for\r
the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r
- @param Phase The phase of the PCI device enumeration. \r
- \r
+ @param Phase The phase of the PCI device enumeration.\r
+\r
@retval EFI_SUCCESS The requested parameters were returned.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r
{\r
PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;\r
PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;\r
- LIST_ENTRY *List; \r
+ LIST_ENTRY *List;\r
\r
HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
List = HostBridgeInstance->Head.ForwardLink;\r
/** @file\r
- The Header file of the Pci Host Bridge Driver \r
+ The Header file of the Pci Host Bridge Driver\r
\r
Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are\r
licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
- \r
+\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
-**/ \r
+**/\r
\r
#ifndef _PCI_HOST_BRIDGE_H_\r
#define _PCI_HOST_BRIDGE_H_\r
EFI_HANDLE HostBridgeHandle;\r
UINTN RootBridgeNumber;\r
LIST_ENTRY Head;\r
- BOOLEAN ResourceSubmited; \r
- BOOLEAN CanRestarted; \r
+ BOOLEAN ResourceSubmited;\r
+ BOOLEAN CanRestarted;\r
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;\r
} PCI_HOST_BRIDGE_INSTANCE;\r
\r
#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \\r
CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)\r
- \r
+\r
//\r
// HostBridge Resource Allocation interface\r
//\r
\r
@param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
@param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.\r
- \r
+\r
@retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the\r
- specific Host bridge and return EFI_SUCCESS. \r
+ specific Host bridge and return EFI_SUCCESS.\r
@retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was\r
returned on a previous call to GetNextRootBridge().\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
IN OUT EFI_HANDLE *RootBridgeHandle\r
);\r
- \r
+\r
/**\r
Returns the allocation attributes of a PCI root bridge.\r
\r
handles of all the root bridges that are associated with this host bridge must be obtained by calling\r
GetNextRootBridge(). The attributes are static in the sense that they do not change during or\r
after the enumeration process. The hardware may provide mechanisms to change the attributes on\r
- the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is \r
+ the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is\r
installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in\r
"Related Definitions" below. The caller uses these attributes to combine multiple resource requests.\r
- For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to \r
- include requests for the prefetchable memory in the nonprefetchable memory pool and not request any \r
+ For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to\r
+ include requests for the prefetchable memory in the nonprefetchable memory pool and not request any\r
prefetchable memory.\r
Attribute Description\r
------------------------------------ ----------------------------------------------------------------------\r
@param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type\r
EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r
@param[out] Attributes The pointer to attribte of root bridge, it is output parameter\r
- \r
+\r
@retval EFI_INVALID_PARAMETER Attribute pointer is NULL\r
@retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.\r
@retval EFI_SUCCESS Success to get attribute of interested root bridge.\r
\r
-**/ \r
+**/\r
EFI_STATUS\r
EFIAPI\r
GetAttributes(\r
IN EFI_HANDLE RootBridgeHandle,\r
OUT UINT64 *Attributes\r
);\r
- \r
+\r
/**\r
Sets up the specified PCI root bridge for the bus enumeration process.\r
\r
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI Root Bridge to be set up.\r
@param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.\r
- \r
+\r
@retval EFI_INVALID_PARAMETER Invalid Root bridge's handle\r
@retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.\r
@retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.\r
IN EFI_HANDLE RootBridgeHandle,\r
OUT VOID **Configuration\r
);\r
- \r
+\r
/**\r
Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r
\r
@param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
@param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed\r
@param[in] Configuration The pointer to the PCI bus resource descriptor\r
- \r
+\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Configuration is NULL.\r
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r
@retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.\r
- @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than \r
+ @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than\r
bus descriptors.\r
@retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.\r
@retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r
IN EFI_HANDLE RootBridgeHandle,\r
IN VOID *Configuration\r
);\r
- \r
+\r
/**\r
Submits the I/O and memory resource requirements for the specified PCI root bridge.\r
\r
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.\r
@param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r
- \r
+\r
@retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Configuration is NULL.\r
@retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.\r
- @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are \r
- not supported by this PCI root bridge. This error will happen if the caller \r
+ @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are\r
+ not supported by this PCI root bridge. This error will happen if the caller\r
did not combine resources according to Attributes that were returned by\r
GetAllocAttributes().\r
@retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.\r
IN EFI_HANDLE RootBridgeHandle,\r
IN VOID *Configuration\r
);\r
- \r
+\r
/**\r
Returns the proposed resource settings for the specified PCI root bridge.\r
\r
@param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
@param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.\r
@param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r
- \r
+\r
@retval EFI_SUCCESS The requested parameters were returned.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI\r
configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for\r
the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r
- @param Phase The phase of the PCI device enumeration. \r
- \r
+ @param Phase The phase of the PCI device enumeration.\r
+\r
@retval EFI_SUCCESS The requested parameters were returned.\r
@retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
@retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r
\r
\r
//\r
-// Define resource status constant \r
+// Define resource status constant\r
//\r
#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL\r
#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL\r
\r
typedef struct {\r
UINT64 BusBase;\r
- UINT64 BusLimit; \r
- \r
- UINT64 MemBase; \r
- UINT64 MemLimit; \r
- \r
- UINT64 IoBase; \r
- UINT64 IoLimit; \r
+ UINT64 BusLimit;\r
+\r
+ UINT64 MemBase;\r
+ UINT64 MemLimit;\r
+\r
+ UINT64 IoBase;\r
+ UINT64 IoLimit;\r
UINT64 IoTranslation;\r
} PCI_ROOT_BRIDGE_RESOURCE_APERTURE;\r
\r
UINT64 RootBridgeAttrib;\r
UINT64 Attributes;\r
UINT64 Supports;\r
- \r
+\r
//\r
// Specific for this memory controller: Bus, I/O, Mem\r
//\r
PCI_RES_NODE ResAllocNode[6];\r
- \r
+\r
//\r
// Addressing for Memory and I/O and Bus arrange\r
//\r
UINT64 BusBase;\r
- UINT64 MemBase; \r
- UINT64 IoBase; \r
- UINT64 BusLimit; \r
- UINT64 MemLimit; \r
- UINT64 IoLimit; \r
+ UINT64 MemBase;\r
+ UINT64 IoBase;\r
+ UINT64 BusLimit;\r
+ UINT64 MemLimit;\r
+ UINT64 IoLimit;\r
UINT64 IoTranslation;\r
\r
EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
-**/ \r
+**/\r
\r
#include "PciHostBridge.h"\r
\r
\r
RESOURCE_CONFIGURATION Configuration = {\r
{{0x8A, 0x2B, 1, 0, 0, 0, 0, 0, 0, 0},\r
- {0x8A, 0x2B, 0, 0, 0, 32, 0, 0, 0, 0}, \r
+ {0x8A, 0x2B, 0, 0, 0, 32, 0, 0, 0, 0},\r
{0x8A, 0x2B, 0, 0, 6, 32, 0, 0, 0, 0},\r
{0x8A, 0x2B, 0, 0, 0, 64, 0, 0, 0, 0},\r
{0x8A, 0x2B, 0, 0, 6, 64, 0, 0, 0, 0},\r
//\r
\r
/**\r
- Polls an address in memory mapped I/O space until an exit condition is met, or \r
- a timeout occurs. \r
+ Polls an address in memory mapped I/O space until an exit condition is met, or\r
+ a timeout occurs.\r
\r
This function provides a standard way to poll a PCI memory location. A PCI memory read\r
operation is performed at the PCI memory address specified by Address for the width specified\r
@param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
be of poorer granularity.\r
@param[out] Result Pointer to the last value read from the memory location.\r
- \r
+\r
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
@retval EFI_INVALID_PARAMETER Width is invalid.\r
@retval EFI_INVALID_PARAMETER Result is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
-RootBridgeIoPollMem ( \r
+RootBridgeIoPollMem (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
IN UINT64 Delay,\r
OUT UINT64 *Result\r
);\r
- \r
+\r
/**\r
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
satisfied or after a defined duration.\r
@param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
be of poorer granularity.\r
@param[out] Result Pointer to the last value read from the memory location.\r
- \r
+\r
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
@retval EFI_INVALID_PARAMETER Width is invalid.\r
@retval EFI_INVALID_PARAMETER Result is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
-RootBridgeIoPollIo ( \r
+RootBridgeIoPollIo (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
IN UINT64 Delay,\r
OUT UINT64 *Result\r
);\r
- \r
+\r
/**\r
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
\r
Width size * Count, starting at Address.\r
@param[out] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
Width size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
size * Count, starting at Address.\r
@param[out] UserBuffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
size * Count, starting at Address.\r
@param[in] UserBuffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
responsible for aligning the SrcAddress if required.\r
@param[in] Count The number of memory operations to perform. Bytes moved is\r
Width size * Count, starting at DestAddress and SrcAddress.\r
- \r
+\r
@retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
moved is Width size * Count, starting at Address.\r
@param[out] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
moved is Width size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
@param[out] DeviceAddress The resulting map address for the bus master PCI controller to use\r
to access the system memory's HostAddress.\r
@param[out] Mapping The value to pass to Unmap() when the bus master DMA operation is complete.\r
- \r
+\r
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
@retval EFI_INVALID_PARAMETER Operation is invalid.\r
@retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
The Unmap() function completes the Map() operation and releases any corresponding resources.\r
If the operation was an EfiPciOperationBusMasterWrite or\r
EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.\r
- Any resources used for the mapping are freed. \r
+ Any resources used for the mapping are freed.\r
\r
@param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param[in] Mapping The mapping value returned from Map().\r
- \r
+\r
@retval EFI_SUCCESS The range was unmapped.\r
@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
/**\r
Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
EfiPciOperationBusMasterCommonBuffer64 mapping.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Type This parameter is not used and must be ignored.\r
@param MemoryType The type of memory to allocate, EfiBootServicesData or EfiRuntimeServicesData.\r
@param Pages The number of pages to allocate.\r
@param HostAddress A pointer to store the base system memory address of the allocated range.\r
@param Attributes The requested bit mask of attributes for the allocated range. Only\r
- the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, \r
+ the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED,\r
and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.\r
- \r
+\r
@retval EFI_SUCCESS The requested memory pages were allocated.\r
@retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
@retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pages The number of pages to free.\r
@param HostAddress The base system memory address of the allocated range.\r
- \r
+\r
@retval EFI_SUCCESS The requested memory pages were freed.\r
@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
was not allocated with AllocateBuffer().\r
a PCI read transaction from the PCI controller prior to calling Flush().\r
\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
- \r
+\r
@retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
bridge to system memory.\r
@retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
\r
/**\r
Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
- attributes that a PCI root bridge is currently using. \r
+ attributes that a PCI root bridge is currently using.\r
\r
The GetAttributes() function returns the mask of attributes that this PCI root bridge supports\r
and the mask of attributes that the PCI root bridge is currently using.\r
supports setting with SetAttributes().\r
@param Attributes A pointer to the mask of attributes that this PCI root bridge is\r
currently using.\r
- \r
+\r
@retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root\r
bridge supports is returned in Supports. If Attributes is\r
not NULL, then the attributes that the PCI root bridge is currently\r
by the attributes specified by Attributes.\r
@param[in, out] ResourceLength A pointer to the length of the resource range to be modified by the\r
attributes specified by Attributes.\r
- \r
+\r
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
@retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN UINT64 Attributes,\r
IN OUT UINT64 *ResourceBase,\r
- IN OUT UINT64 *ResourceLength \r
- ); \r
+ IN OUT UINT64 *ResourceLength\r
+ );\r
\r
/**\r
Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
ACPI 2.0 resource descriptors is allocated by this function. The\r
caller must treat the return buffer as read-only data, and the buffer\r
must not be freed by the caller.\r
- \r
+\r
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
@retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
//\r
PrivateData->BusBase = ResAperture->BusBase;\r
PrivateData->BusLimit = ResAperture->BusLimit;\r
- \r
+\r
//\r
// Specific for this chipset\r
//\r
PrivateData->ResAllocNode[Index].Length = 0;\r
PrivateData->ResAllocNode[Index].Status = ResNone;\r
}\r
- \r
+\r
PrivateData->RootBridgeAttrib = Attri;\r
- \r
+\r
PrivateData->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO | \\r
EFI_PCI_ATTRIBUTE_ISA_IO_16 | EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO | \\r
EFI_PCI_ATTRIBUTE_VGA_MEMORY | \\r
PrivateData->Attributes = PrivateData->Supports;\r
\r
Protocol->ParentHandle = HostBridgeHandle;\r
- \r
+\r
Protocol->PollMem = RootBridgeIoPollMem;\r
Protocol->PollIo = RootBridgeIoPollIo;\r
\r
/**\r
Check parameters for IO,MMIO,PCI read/write services of PCI Root Bridge IO.\r
\r
- The I/O operations are carried out exactly as requested. The caller is responsible \r
- for satisfying any alignment and I/O width restrictions that a PI System on a \r
- platform might require. For example on some platforms, width requests of \r
- EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will \r
+ The I/O operations are carried out exactly as requested. The caller is responsible\r
+ for satisfying any alignment and I/O width restrictions that a PI System on a\r
+ platform might require. For example on some platforms, width requests of\r
+ EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will\r
be handled by the driver.\r
- \r
+\r
@param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param[in] OperationType I/O operation type: IO/MMIO/PCI.\r
@param[in] Width Signifies the width of the I/O or Memory operation.\r
- @param[in] Address The base address of the I/O operation. \r
- @param[in] Count The number of I/O operations to perform. The number of \r
+ @param[in] Address The base address of the I/O operation.\r
+ @param[in] Count The number of I/O operations to perform. The number of\r
bytes moved is Width size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results.\r
For write operations, the source buffer from which to write data.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PI system.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
@retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.\r
- @retval EFI_UNSUPPORTED The address range specified by Address, Width, \r
+ @retval EFI_UNSUPPORTED The address range specified by Address, Width,\r
and Count is not valid for this PI system.\r
\r
**/\r
PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);\r
\r
//\r
- // Check to see if any address associated with this transfer exceeds the maximum \r
+ // Check to see if any address associated with this transfer exceeds the maximum\r
// allowed address. The maximum address implied by the parameters passed in is\r
// Address + Size * Count. If the following condition is met, then the transfer\r
// is not supported.\r
//\r
// Address + Size * Count > Limit + 1\r
//\r
- // Since Limit can be the maximum integer value supported by the CPU and Count \r
+ // Since Limit can be the maximum integer value supported by the CPU and Count\r
// can also be the maximum integer value supported by the CPU, this range\r
// check must be adjusted to avoid all oveflow conditions.\r
//\r
moved is Width size * Count, starting at Address.\r
@param[in, out] UserBuffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
}\r
}\r
}\r
- return EFI_SUCCESS; \r
+ return EFI_SUCCESS;\r
}\r
\r
/**\r
moved is Width size * Count, starting at Address.\r
@param[in, out] UserBuffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
moved is Width size * Count, starting at Address.\r
@param[in, out] UserBuffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
}\r
\r
/**\r
- Polls an address in memory mapped I/O space until an exit condition is met, or \r
- a timeout occurs. \r
+ Polls an address in memory mapped I/O space until an exit condition is met, or\r
+ a timeout occurs.\r
\r
This function provides a standard way to poll a PCI memory location. A PCI memory read\r
operation is performed at the PCI memory address specified by Address for the width specified\r
@param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
be of poorer granularity.\r
@param[out] Result Pointer to the last value read from the memory location.\r
- \r
+\r
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
@retval EFI_INVALID_PARAMETER Width is invalid.\r
@retval EFI_INVALID_PARAMETER Result is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
-RootBridgeIoPollMem ( \r
+RootBridgeIoPollMem (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
Status = This->Mem.Read (This, Width, Address, 1, Result);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
- } \r
+ }\r
if ((*Result & Mask) == Value) {\r
return EFI_SUCCESS;\r
}\r
\r
if (Delay == 0) {\r
return EFI_SUCCESS;\r
- \r
+\r
} else {\r
\r
//\r
NumberOfTicks += 1;\r
}\r
NumberOfTicks += 1;\r
- \r
+\r
while (NumberOfTicks != 0) {\r
\r
mMetronome->WaitForTick (mMetronome, 1);\r
- \r
+\r
Status = This->Mem.Read (This, Width, Address, 1, Result);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
if ((*Result & Mask) == Value) {\r
return EFI_SUCCESS;\r
}\r
}\r
return EFI_TIMEOUT;\r
}\r
- \r
+\r
/**\r
Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
satisfied or after a defined duration.\r
@param[in] Delay The number of 100 ns units to poll. Note that timer available may\r
be of poorer granularity.\r
@param[out] Result Pointer to the last value read from the memory location.\r
- \r
+\r
@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
@retval EFI_INVALID_PARAMETER Width is invalid.\r
@retval EFI_INVALID_PARAMETER Result is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
-RootBridgeIoPollIo ( \r
+RootBridgeIoPollIo (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
if ((UINT32)Width > EfiPciWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
Status = This->Io.Read (This, Width, Address, 1, Result);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
- } \r
+ }\r
if ((*Result & Mask) == Value) {\r
return EFI_SUCCESS;\r
}\r
\r
if (Delay == 0) {\r
return EFI_SUCCESS;\r
- \r
+\r
} else {\r
\r
//\r
NumberOfTicks += 1;\r
}\r
NumberOfTicks += 1;\r
- \r
+\r
while (NumberOfTicks != 0) {\r
\r
mMetronome->WaitForTick (mMetronome, 1);\r
- \r
+\r
Status = This->Io.Read (This, Width, Address, 1, Result);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
if ((*Result & Mask) == Value) {\r
return EFI_SUCCESS;\r
}\r
Width size * Count, starting at Address.\r
@param[out] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
Width size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
IN VOID *Buffer\r
)\r
{\r
- return RootBridgeIoMemRW (This, TRUE, Width, Address, Count, Buffer); \r
+ return RootBridgeIoMemRW (This, TRUE, Width, Address, Count, Buffer);\r
}\r
\r
/**\r
size * Count, starting at Address.\r
@param[out] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
OUT VOID *Buffer\r
)\r
{\r
- return RootBridgeIoIoRW (This, FALSE, Width, Address, Count, Buffer); \r
+ return RootBridgeIoIoRW (This, FALSE, Width, Address, Count, Buffer);\r
}\r
\r
/**\r
size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
IN VOID *Buffer\r
)\r
{\r
- return RootBridgeIoIoRW (This, TRUE, Width, Address, Count, Buffer); \r
+ return RootBridgeIoIoRW (This, TRUE, Width, Address, Count, Buffer);\r
}\r
\r
/**\r
responsible for aligning the SrcAddress if required.\r
@param[in] Count The number of memory operations to perform. Bytes moved is\r
Width size * Count, starting at DestAddress and SrcAddress.\r
- \r
+\r
@retval EFI_SUCCESS The data was copied from one memory region to another memory region.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
\r
if ((UINT32)Width > EfiPciWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
- } \r
+ }\r
\r
if (DestAddress == SrcAddress) {\r
return EFI_SUCCESS;\r
moved is Width size * Count, starting at Address.\r
@param[out] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
moved is Width size * Count, starting at Address.\r
@param[in] Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
- \r
+\r
@retval EFI_SUCCESS The data was read from or written to the PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
@retval EFI_INVALID_PARAMETER Buffer is NULL.\r
@param[out] DeviceAddress The resulting map address for the bus master PCI controller to use\r
to access the system memory's HostAddress.\r
@param[out] Mapping The value to pass to Unmap() when the bus master DMA operation is complete.\r
- \r
+\r
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
@retval EFI_INVALID_PARAMETER Operation is invalid.\r
@retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// Initialize the return values to their defaults\r
//\r
\r
//\r
// Common Buffer operations can not be remapped. If the common buffer\r
- // if above 4GB, then it is not possible to generate a mapping, so return \r
+ // if above 4GB, then it is not possible to generate a mapping, so return\r
// an error.\r
//\r
if (Operation == EfiPciOperationBusMasterCommonBuffer || Operation == EfiPciOperationBusMasterCommonBuffer64) {\r
// called later.\r
//\r
Status = gBS->AllocatePool (\r
- EfiBootServicesData, \r
- sizeof(MAP_INFO), \r
+ EfiBootServicesData,\r
+ sizeof(MAP_INFO),\r
(VOID **)&MapInfo\r
);\r
if (EFI_ERROR (Status)) {\r
// Allocate a buffer below 4GB to map the transfer to.\r
//\r
Status = gBS->AllocatePages (\r
- AllocateMaxAddress, \r
- EfiBootServicesData, \r
+ AllocateMaxAddress,\r
+ EfiBootServicesData,\r
MapInfo->NumberOfPages,\r
&MapInfo->MappedHostAddress\r
);\r
//\r
if (Operation == EfiPciOperationBusMasterRead || Operation == EfiPciOperationBusMasterRead64) {\r
CopyMem (\r
- (VOID *)(UINTN)MapInfo->MappedHostAddress, \r
+ (VOID *)(UINTN)MapInfo->MappedHostAddress,\r
(VOID *)(UINTN)MapInfo->HostAddress,\r
MapInfo->NumberOfBytes\r
);\r
The Unmap() function completes the Map() operation and releases any corresponding resources.\r
If the operation was an EfiPciOperationBusMasterWrite or\r
EfiPciOperationBusMasterWrite64, the data is committed to the target system memory.\r
- Any resources used for the mapping are freed. \r
+ Any resources used for the mapping are freed.\r
\r
@param[in] This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param[in] Mapping The mapping value returned from Map().\r
- \r
+\r
@retval EFI_SUCCESS The range was unmapped.\r
@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
//\r
if (MapInfo->Operation == EfiPciOperationBusMasterWrite || MapInfo->Operation == EfiPciOperationBusMasterWrite64) {\r
CopyMem (\r
- (VOID *)(UINTN)MapInfo->HostAddress, \r
+ (VOID *)(UINTN)MapInfo->HostAddress,\r
(VOID *)(UINTN)MapInfo->MappedHostAddress,\r
MapInfo->NumberOfBytes\r
);\r
/**\r
Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
EfiPciOperationBusMasterCommonBuffer64 mapping.\r
- \r
+\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Type This parameter is not used and must be ignored.\r
@param MemoryType The type of memory to allocate, EfiBootServicesData or EfiRuntimeServicesData.\r
@param Pages The number of pages to allocate.\r
@param HostAddress A pointer to store the base system memory address of the allocated range.\r
@param Attributes The requested bit mask of attributes for the allocated range. Only\r
- the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED, \r
+ the attributes EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE, EFI_PCI_ATTRIBUTE_MEMORY_CACHED,\r
and EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE may be used with this function.\r
- \r
+\r
@retval EFI_SUCCESS The requested memory pages were allocated.\r
@retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
@retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
if (HostAddress == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
- \r
+\r
//\r
// The only valid memory types are EfiBootServicesData and EfiRuntimeServicesData\r
//\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pages The number of pages to free.\r
@param HostAddress The base system memory address of the allocated range.\r
- \r
+\r
@retval EFI_SUCCESS The requested memory pages were freed.\r
@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
was not allocated with AllocateBuffer().\r
a PCI read transaction from the PCI controller prior to calling Flush().\r
\r
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
- \r
+\r
@retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
bridge to system memory.\r
@retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
\r
/**\r
Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
- attributes that a PCI root bridge is currently using. \r
+ attributes that a PCI root bridge is currently using.\r
\r
The GetAttributes() function returns the mask of attributes that this PCI root bridge supports\r
and the mask of attributes that the PCI root bridge is currently using.\r
supports setting with SetAttributes().\r
@param Attributes A pointer to the mask of attributes that this PCI root bridge is\r
currently using.\r
- \r
+\r
@retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root\r
bridge supports is returned in Supports. If Attributes is\r
not NULL, then the attributes that the PCI root bridge is currently\r
// Set the return value for Supported and Attributes\r
//\r
if (Supported != NULL) {\r
- *Supported = PrivateData->Supports; \r
+ *Supported = PrivateData->Supports;\r
}\r
\r
if (Attributes != NULL) {\r
*Attributes = PrivateData->Attributes;\r
}\r
- \r
+\r
return EFI_SUCCESS;\r
}\r
\r
by the attributes specified by Attributes.\r
@param[in, out] ResourceLength A pointer to the length of the resource range to be modified by the\r
attributes specified by Attributes.\r
- \r
+\r
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
@retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
IN UINT64 Attributes,\r
IN OUT UINT64 *ResourceBase,\r
- IN OUT UINT64 *ResourceLength \r
+ IN OUT UINT64 *ResourceLength\r
)\r
{\r
PCI_ROOT_BRIDGE_INSTANCE *PrivateData;\r
- \r
+\r
PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(This);\r
- \r
+\r
if (Attributes != 0) {\r
if ((Attributes & (~(PrivateData->Supports))) != 0) {\r
return EFI_UNSUPPORTED;\r
}\r
}\r
- \r
+\r
//\r
// This is a generic driver for a PC-AT class system. It does not have any\r
- // chipset specific knowlegde, so none of the attributes can be set or \r
- // cleared. Any attempt to set attribute that are already set will succeed, \r
+ // chipset specific knowlegde, so none of the attributes can be set or\r
+ // cleared. Any attempt to set attribute that are already set will succeed,\r
// and any attempt to set an attribute that is not supported will fail.\r
//\r
if (Attributes & (~PrivateData->Attributes)) {\r
ACPI 2.0 resource descriptors is allocated by this function. The\r
caller must treat the return buffer as read-only data, and the buffer\r
must not be freed by the caller.\r
- \r
+\r
@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in Resources.\r
@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be retrieved.\r
@retval EFI_INVALID_PARAMETER Invalid pointer of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL\r
UINTN Index;\r
\r
PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);\r
- \r
+\r
for (Index = 0; Index < TypeMax; Index++) {\r
if (PrivateData->ResAllocNode[Index].Status == ResAllocated) {\r
Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base;\r
Configuration.SpaceDesp[Index].AddrRangeMax = PrivateData->ResAllocNode[Index].Base + PrivateData->ResAllocNode[Index].Length - 1;\r
Configuration.SpaceDesp[Index].AddrLen = PrivateData->ResAllocNode[Index].Length;\r
- } \r
- } \r
- \r
- *Resources = &Configuration; \r
+ }\r
+ }\r
+\r
+ *Resources = &Configuration;\r
return EFI_SUCCESS;\r
}\r
\r
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