UefiCpuPkg VTF0: Rename README to ReadMe.txt, add nasm version

* Rename README to ReadMe.txt
* Document that nasm 2.03 or newer is required for building VTF0

Signed-off-by: ydong10
Reviewed-by: jljusten
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12384 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/UefiCpuPkg/ResetVector/Vtf0/README b/UefiCpuPkg/ResetVector/Vtf0/README
deleted file mode 100644 (file)
index 22fb0f0..0000000
--- a/UefiCpuPkg/ResetVector/Vtf0/README
+++ /dev/null
@@ -1,41 +0,0 @@
-\r
-=== HOW TO USE VTF0 ===\r
-\r
-Add this line to your FDF FV section:\r
-INF  RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
-(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')\r
-\r
-In your FDF FFS file rules sections add:\r
-[Rule.Common.SEC.RESET_VECTOR]\r
-  FILE RAW = $(NAMED_GUID) {\r
-    RAW RAW                |.raw\r
-  }\r
-\r
-=== VTF0 Boot Flow ===\r
-\r
-1. Transition to IA32 flat mode\r
-2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary\r
-3. Locate SEC image\r
-4. X64 VTF0 transitions to X64 mode\r
-5. Call SEC image entry point\r
-\r
-== VTF0 SEC input parameters ==\r
-\r
-All inputs to SEC image are register based:\r
-EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)\r
-DI      - 'BP': boot-strap processor, or 'AP': application processor\r
-EBP/RBP - Pointer to the start of the Boot Firmware Volume\r
-\r
-=== HOW TO BUILD VTF0 ===\r
-\r
-Dependencies:\r
-* Python 2.5~2.7\r
-* Nasm with x86-64 support\r
-\r
-To rebuild the VTF0 binaries:\r
-1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0\r
-2. nasm and python should be in executable path\r
-3. Run this command:\r
-   python Build.py\r
-4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin\r
-\r

diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
new file mode 100644 (file)
index 0000000..e6e5b54
--- /dev/null
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -0,0 +1,41 @@
+\r
+=== HOW TO USE VTF0 ===\r
+\r
+Add this line to your FDF FV section:\r
+INF  RuleOverride=RESET_VECTOR USE = IA32 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
+(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')\r
+\r
+In your FDF FFS file rules sections add:\r
+[Rule.Common.SEC.RESET_VECTOR]\r
+  FILE RAW = $(NAMED_GUID) {\r
+    RAW RAW                |.raw\r
+  }\r
+\r
+=== VTF0 Boot Flow ===\r
+\r
+1. Transition to IA32 flat mode\r
+2. Locate BFV (Boot Firmware Volume) by checking every 4kb boundary\r
+3. Locate SEC image\r
+4. X64 VTF0 transitions to X64 mode\r
+5. Call SEC image entry point\r
+\r
+== VTF0 SEC input parameters ==\r
+\r
+All inputs to SEC image are register based:\r
+EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)\r
+DI      - 'BP': boot-strap processor, or 'AP': application processor\r
+EBP/RBP - Pointer to the start of the Boot Firmware Volume\r
+\r
+=== HOW TO BUILD VTF0 ===\r
+\r
+Dependencies:\r
+* Python 2.5~2.7\r
+* Nasm 2.03 or newer\r
+\r
+To rebuild the VTF0 binaries:\r
+1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0\r
+2. nasm and python should be in executable path\r
+3. Run this command:\r
+   python Build.py\r
+4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin\r
+\r