/** @file\r
- This PEIM will be invoked twice by pei core. In 1st entry, it will call FspInit API.\r
- In 2nd entry, it will parse the hoblist from fsp and report them into pei core.\r
- This file contains the main entrypoint of the PEIM.\r
+ This PEIM initialize FSP.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include "FspInitPei.h"\r
\r
-/**\r
- FSP Init continuation function.\r
- Control will be returned to this callback function after FspInit API call.\r
-\r
- @param[in] Status Status of the FSP INIT API\r
- @param[in] HobListPtr Pointer to the HOB data structure defined in the PI specification.\r
-\r
-**/\r
-VOID\r
-ContinuationFunc (\r
- IN FSP_STATUS Status,\r
- IN VOID *HobListPtr\r
- )\r
-{\r
- EFI_BOOT_MODE BootMode;\r
- UINT64 StackSize;\r
- EFI_PHYSICAL_ADDRESS StackBase;\r
-\r
- DEBUG ((DEBUG_INFO, "ContinuationFunc - %r\n", Status));\r
- DEBUG ((DEBUG_INFO, "HobListPtr - 0x%x\n", HobListPtr));\r
-\r
- if (Status != FSP_SUCCESS) {\r
- CpuDeadLoop ();\r
- }\r
-\r
- //\r
- // Can not call any PeiServices\r
- //\r
- BootMode = GetBootMode ();\r
-\r
- GetStackInfo (BootMode, TRUE, &StackBase, &StackSize);\r
- DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));\r
- DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));\r
- CallPeiCoreEntryPoint (\r
- HobListPtr,\r
- (VOID *)(UINTN)StackBase,\r
- (VOID *)(UINTN)(StackBase + StackSize)\r
- );\r
-}\r
-\r
-/**\r
- Call FspInit API.\r
-\r
- @param[in] FspHeader FSP header pointer.\r
-**/\r
-VOID\r
-SecFspInit (\r
- IN FSP_INFO_HEADER *FspHeader\r
- )\r
-{\r
- FSP_INIT_PARAMS FspInitParams;\r
- FSP_INIT_RT_COMMON_BUFFER FspRtBuffer;\r
- UINT8 FspUpdRgn[FixedPcdGet32 (PcdMaxUpdRegionSize)];\r
- UINT32 UpdRegionSize;\r
- EFI_BOOT_MODE BootMode;\r
- UINT64 StackSize;\r
- EFI_PHYSICAL_ADDRESS StackBase;\r
- FSP_STATUS FspStatus;\r
-\r
- DEBUG ((DEBUG_INFO, "SecFspInit enter\n"));\r
-\r
- PeiServicesGetBootMode (&BootMode);\r
- DEBUG ((DEBUG_INFO, "BootMode - 0x%x\n", BootMode));\r
-\r
- GetStackInfo (BootMode, FALSE, &StackBase, &StackSize);\r
- DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));\r
- DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));\r
-\r
- ZeroMem (&FspRtBuffer, sizeof(FspRtBuffer));\r
- FspRtBuffer.StackTop = (UINT32 *)(UINTN)(StackBase + StackSize);\r
-\r
- FspRtBuffer.BootMode = BootMode;\r
-\r
- /* Platform override any UPD configs */\r
- UpdRegionSize = GetUpdRegionSize();\r
- DEBUG ((DEBUG_INFO, "UpdRegionSize - 0x%x\n", UpdRegionSize));\r
- DEBUG ((DEBUG_INFO, "sizeof(FspUpdRgn) - 0x%x\n", sizeof(FspUpdRgn)));\r
- ASSERT(sizeof(FspUpdRgn) >= UpdRegionSize);\r
- ZeroMem (FspUpdRgn, UpdRegionSize);\r
- FspRtBuffer.UpdDataRgnPtr = UpdateFspUpdConfigs (FspUpdRgn);\r
-\r
- ZeroMem (&FspInitParams, sizeof(FspInitParams));\r
- FspInitParams.NvsBufferPtr = GetNvsBuffer ();\r
- DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspInitParams.NvsBufferPtr));\r
- FspInitParams.RtBufferPtr = (VOID *)&FspRtBuffer;\r
- FspInitParams.ContinuationFunc = (CONTINUATION_PROC)ContinuationFunc;\r
-\r
- SaveSecContext (GetPeiServicesTablePointer ());\r
-\r
- DEBUG ((DEBUG_INFO, "FspInitParams - 0x%x\n", &FspInitParams));\r
- DEBUG ((DEBUG_INFO, " NvsBufferPtr - 0x%x\n", FspInitParams.NvsBufferPtr));\r
- DEBUG ((DEBUG_INFO, " RtBufferPtr - 0x%x\n", FspInitParams.RtBufferPtr));\r
- DEBUG ((DEBUG_INFO, " StackTop - 0x%x\n", FspRtBuffer.StackTop));\r
- DEBUG ((DEBUG_INFO, " BootMode - 0x%x\n", FspRtBuffer.BootMode));\r
- DEBUG ((DEBUG_INFO, " UpdDataRgnPtr - 0x%x\n", FspRtBuffer.UpdDataRgnPtr));\r
- DEBUG ((DEBUG_INFO, " ContinuationFunc - 0x%x\n", FspInitParams.ContinuationFunc));\r
-\r
- FspStatus = CallFspInit (FspHeader, &FspInitParams);\r
- //\r
- // Should never return\r
- //\r
- DEBUG((DEBUG_ERROR, "FSP Init failed, status: 0x%x\n", FspStatus));\r
- CpuDeadLoop ();\r
-}\r
-\r
/**\r
This is the entrypoint of PEIM\r
\r
)\r
{\r
FSP_INFO_HEADER *FspHeader;\r
- EFI_STATUS Status;\r
- FSP_INIT_DONE_PPI *FspInitDone;\r
- VOID *FspHobList;\r
- EFI_BOOT_MODE BootMode;\r
+ UINT8 PcdFspApiVersion;\r
\r
DEBUG ((DEBUG_INFO, "FspPeiEntryPoint\n"));\r
+ PcdFspApiVersion = 1;\r
\r
- Status = PeiServicesLocatePpi (\r
- &gFspInitDonePpiGuid,\r
- 0,\r
- NULL,\r
- (VOID **) &FspInitDone\r
- );\r
- if (EFI_ERROR (Status)) {\r
- //\r
- // 1st entry\r
- //\r
- DEBUG ((DEBUG_INFO, "1st entry\n"));\r
- FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r
- DEBUG ((DEBUG_INFO, "FspHeader - 0x%x\n", FspHeader));\r
- if (FspHeader == NULL) {\r
- return EFI_DEVICE_ERROR;\r
- }\r
+ FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r
+ DEBUG ((DEBUG_INFO, "FspHeader - 0x%x\n", FspHeader));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
\r
- SecFspInit (FspHeader);\r
+ if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r
+ (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r
+ (FspHeader->ApiEntryNum >= 6) &&\r
+ (FspHeader->FspMemoryInitEntryOffset != 0) &&\r
+ (FspHeader->TempRamExitEntryOffset != 0) &&\r
+ (FspHeader->FspSiliconInitEntryOffset != 0) ) {\r
+ PcdFspApiVersion = FSP_HEADER_REVISION_2;\r
+ }\r
+ DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r
\r
- //\r
- // Never return here\r
- //\r
- CpuDeadLoop ();\r
+ if (PcdFspApiVersion == FSP_HEADER_REVISION_1) {\r
+ PeiFspInitV1 (FspHeader);\r
} else {\r
- //\r
- // 2nd entry\r
- //\r
- DEBUG ((DEBUG_INFO, "2nd entry\n"));\r
- Status = FspInitDone->GetFspHobList (PeiServices, FspInitDone, &FspHobList);\r
- DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));\r
- FspHobProcess (FspHobList);\r
-\r
- PeiServicesGetBootMode (&BootMode);\r
- if (BootMode == BOOT_ON_S3_RESUME) {\r
- Status = PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc);\r
- ASSERT_EFI_ERROR (Status);\r
- }\r
+ PeiFspInitV2 (FspHeader);\r
}\r
\r
return EFI_SUCCESS;\r
/** @file\r
This is PEIM header file.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include <Ppi/FspInitDone.h>\r
#include <Ppi/EndOfPeiPhase.h>\r
+#include <Ppi/MemoryDiscovered.h>\r
+#include <Ppi/TemporaryRamDone.h>\r
\r
extern EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc;\r
\r
+EFI_STATUS\r
+PeiFspInitV1 (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ );\r
+\r
+EFI_STATUS\r
+PeiFspInitV2 (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ );\r
+\r
#endif\r
## @file\r
# FSP PEI Module\r
#\r
-# This PEIM will be invoked twice by pei core. In 1st entry, it will call FspInit API.\r
-# In 2nd entry, it will parse the hoblist from fsp and report them into pei core.\r
-# including install the memory as required.\r
+# This PEIM initialize FSP.\r
+# In FSP API V1 mode, it will be invoked twice by pei core. In 1st entry, it will\r
+# call FspInit API. In 2nd entry, it will parse the hoblist from fsp and report\r
+# them into pei core.\r
+# In FSP API V2 mode, it will be invoked only once. It will call FspMemoryInit API,\r
+# register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
+# notify to call FspSiliconInit API.\r
#\r
# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
[Sources]\r
FspInitPei.c\r
FspInitPei.h\r
+ FspInitPeiV1.c\r
+ FspInitPeiV2.c\r
FspNotifyS3.c\r
SecMain.c\r
SecMain.h\r
FindPeiCore.c\r
- SecFspInitDone.c\r
\r
[Packages]\r
MdePkg/MdePkg.dec\r
gTopOfTemporaryRamPpiGuid ## PRODUCES\r
gFspInitDonePpiGuid ## PRODUCES\r
gEfiEndOfPeiSignalPpiGuid ## PRODUCES\r
+ gEfiTemporaryRamDonePpiGuid ## PRODUCES\r
+ gEfiPeiMemoryDiscoveredPpiGuid ## PRODUCES\r
\r
[FixedPcd]\r
gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported ## CONSUMES\r
gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase ## CONSUMES\r
gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize ## CONSUMES\r
gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize ## CONSUMES\r
+ gFspWrapperTokenSpaceGuid.PcdFspApiVersion ## CONSUMES\r
\r
[Depex]\r
gEfiPeiMasterBootModePpiGuid\r
--- /dev/null
+/** @file\r
+ In FSP API V1 mode, it will be invoked twice by pei core. In 1st entry, it will\r
+ call FspInit API. In 2nd entry, it will parse the hoblist from fsp and report\r
+ them into pei core.\r
+\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include "FspInitPei.h"\r
+\r
+/**\r
+ FSP Init continuation function.\r
+ Control will be returned to this callback function after FspInit API call.\r
+\r
+ @param[in] Status Status of the FSP INIT API\r
+ @param[in] HobListPtr Pointer to the HOB data structure defined in the PI specification.\r
+\r
+**/\r
+VOID\r
+ContinuationFunc (\r
+ IN EFI_STATUS Status,\r
+ IN VOID *HobListPtr\r
+ )\r
+{\r
+ EFI_BOOT_MODE BootMode;\r
+ UINT64 StackSize;\r
+ EFI_PHYSICAL_ADDRESS StackBase;\r
+\r
+ DEBUG ((DEBUG_INFO, "ContinuationFunc - %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "HobListPtr - 0x%x\n", HobListPtr));\r
+\r
+ if (Status != EFI_SUCCESS) {\r
+ CpuDeadLoop ();\r
+ }\r
+\r
+ //\r
+ // Can not call any PeiServices\r
+ //\r
+ BootMode = GetBootMode ();\r
+\r
+ GetStackInfo (BootMode, TRUE, &StackBase, &StackSize);\r
+ DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));\r
+ DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));\r
+ CallPeiCoreEntryPoint (\r
+ HobListPtr,\r
+ (VOID *)(UINTN)StackBase,\r
+ (VOID *)(UINTN)(StackBase + StackSize)\r
+ );\r
+}\r
+\r
+/**\r
+ Call FspInit API.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+**/\r
+VOID\r
+PeiFspInit (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ )\r
+{\r
+ FSP_INIT_PARAMS FspInitParams;\r
+ FSP_INIT_RT_COMMON_BUFFER FspRtBuffer;\r
+ UINT8 FspUpdRgn[FixedPcdGet32 (PcdMaxUpdRegionSize)];\r
+ UINT32 UpdRegionSize;\r
+ EFI_BOOT_MODE BootMode;\r
+ UINT64 StackSize;\r
+ EFI_PHYSICAL_ADDRESS StackBase;\r
+ EFI_STATUS Status;\r
+\r
+ DEBUG ((DEBUG_INFO, "PeiFspInit enter\n"));\r
+\r
+ PeiServicesGetBootMode (&BootMode);\r
+ DEBUG ((DEBUG_INFO, "BootMode - 0x%x\n", BootMode));\r
+\r
+ GetStackInfo (BootMode, FALSE, &StackBase, &StackSize);\r
+ DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));\r
+ DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));\r
+\r
+ ZeroMem (&FspRtBuffer, sizeof(FspRtBuffer));\r
+ FspRtBuffer.StackTop = (UINT32 *)(UINTN)(StackBase + StackSize);\r
+\r
+ FspRtBuffer.BootMode = BootMode;\r
+\r
+ /* Platform override any UPD configs */\r
+ UpdRegionSize = GetUpdRegionSize();\r
+ DEBUG ((DEBUG_INFO, "UpdRegionSize - 0x%x\n", UpdRegionSize));\r
+ DEBUG ((DEBUG_INFO, "sizeof(FspUpdRgn) - 0x%x\n", sizeof(FspUpdRgn)));\r
+ ASSERT(sizeof(FspUpdRgn) >= UpdRegionSize);\r
+ ZeroMem (FspUpdRgn, UpdRegionSize);\r
+ FspRtBuffer.UpdDataRgnPtr = UpdateFspUpdConfigs (FspUpdRgn);\r
+\r
+ ZeroMem (&FspInitParams, sizeof(FspInitParams));\r
+ FspInitParams.NvsBufferPtr = GetNvsBuffer ();\r
+ DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspInitParams.NvsBufferPtr));\r
+ FspInitParams.RtBufferPtr = (VOID *)&FspRtBuffer;\r
+ FspInitParams.ContinuationFunc = (CONTINUATION_PROC)ContinuationFunc;\r
+\r
+ SaveSecContext (GetPeiServicesTablePointer ());\r
+\r
+ DEBUG ((DEBUG_INFO, "FspInitParams - 0x%x\n", &FspInitParams));\r
+ DEBUG ((DEBUG_INFO, " NvsBufferPtr - 0x%x\n", FspInitParams.NvsBufferPtr));\r
+ DEBUG ((DEBUG_INFO, " RtBufferPtr - 0x%x\n", FspInitParams.RtBufferPtr));\r
+ DEBUG ((DEBUG_INFO, " StackTop - 0x%x\n", FspRtBuffer.StackTop));\r
+ DEBUG ((DEBUG_INFO, " BootMode - 0x%x\n", FspRtBuffer.BootMode));\r
+ DEBUG ((DEBUG_INFO, " UpdDataRgnPtr - 0x%x\n", FspRtBuffer.UpdDataRgnPtr));\r
+ DEBUG ((DEBUG_INFO, " ContinuationFunc - 0x%x\n", FspInitParams.ContinuationFunc));\r
+\r
+ Status = CallFspInit (FspHeader, &FspInitParams);\r
+ //\r
+ // Should never return\r
+ //\r
+ DEBUG((DEBUG_ERROR, "FSP Init failed, status: 0x%x\n", Status));\r
+ CpuDeadLoop ();\r
+}\r
+\r
+/**\r
+ Do FSP initialization based on FspApi version 1.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+\r
+ @return FSP initialization status.\r
+**/\r
+EFI_STATUS\r
+PeiFspInitV1 (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ FSP_INIT_DONE_PPI *FspInitDone;\r
+ VOID *FspHobList;\r
+ EFI_BOOT_MODE BootMode;\r
+ \r
+ Status = PeiServicesLocatePpi (\r
+ &gFspInitDonePpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **) &FspInitDone\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ //\r
+ // 1st entry\r
+ //\r
+ DEBUG ((DEBUG_INFO, "1st entry\n"));\r
+\r
+ PeiFspInit (FspHeader);\r
+ //\r
+ // Never return here, for FspApi version 1.\r
+ //\r
+ CpuDeadLoop ();\r
+ } else {\r
+ //\r
+ // 2nd entry for FspApi version 1 only.\r
+ //\r
+ DEBUG ((DEBUG_INFO, "2nd entry\n"));\r
+\r
+ Status = FspInitDone->GetFspHobList (GetPeiServicesTablePointer (), FspInitDone, &FspHobList);\r
+ ASSERT_EFI_ERROR (Status);\r
+ DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));\r
+ FspHobProcess (FspHobList);\r
+ \r
+ //\r
+ // Register EndOfPei Notify for S3 to run FspNotifyPhase\r
+ //\r
+ PeiServicesGetBootMode (&BootMode);\r
+ if (BootMode == BOOT_ON_S3_RESUME) {\r
+ Status = PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc);\r
+ ASSERT_EFI_ERROR (Status);\r
+ }\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}
\ No newline at end of file
--- /dev/null
+/** @file\r
+ In FSP API V2 mode, it will be invoked only once. It will call FspMemoryInit API,\r
+ register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
+ notify to call FspSiliconInit API.\r
+\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include "FspInitPei.h"\r
+\r
+/**\r
+ Return Hob list produced by FSP.\r
+\r
+ @param[in] PeiServices The pointer to the PEI Services Table.\r
+ @param[in] This The pointer to this instance of this PPI.\r
+ @param[out] FspHobList The pointer to Hob list produced by FSP.\r
+\r
+ @return EFI_SUCCESS FReturn Hob list produced by FSP successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspInitDoneGetFspHobListV2 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN FSP_INIT_DONE_PPI *This,\r
+ OUT VOID **FspHobList\r
+ );\r
+\r
+FSP_INIT_DONE_PPI mFspInitDonePpiV2 = {\r
+ FspInitDoneGetFspHobListV2\r
+};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR mPeiFspInitDonePpiV2 = {\r
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
+ &gFspInitDonePpiGuid,\r
+ &mFspInitDonePpiV2\r
+};\r
+\r
+/**\r
+ This function is called after PEI core discover memory and finish migration.\r
+\r
+ @param[in] PeiServices Pointer to PEI Services Table.\r
+ @param[in] NotifyDesc Pointer to the descriptor for the Notification event that\r
+ caused this function to execute.\r
+ @param[in] Ppi Pointer to the PPI data associated with this function.\r
+\r
+ @retval EFI_STATUS Always return EFI_SUCCESS\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiMemoryDiscoveredNotify (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,\r
+ IN VOID *Ppi\r
+ );\r
+\r
+EFI_PEI_NOTIFY_DESCRIPTOR mPeiMemoryDiscoveredNotifyDesc = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiPeiMemoryDiscoveredPpiGuid,\r
+ PeiMemoryDiscoveredNotify\r
+};\r
+\r
+/**\r
+ TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
+ by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
+\r
+ @retval EFI_SUCCESS Use of Temporary RAM was disabled.\r
+ @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiTemporaryRamDone (\r
+ VOID\r
+ );\r
+\r
+EFI_PEI_TEMPORARY_RAM_DONE_PPI mPeiTemporaryRamDonePpi = {\r
+ PeiTemporaryRamDone\r
+};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR mPeiTemporaryRamDoneDesc = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiTemporaryRamDonePpiGuid,\r
+ &mPeiTemporaryRamDonePpi\r
+};\r
+\r
+/**\r
+ Return Hob list produced by FSP.\r
+\r
+ @param[in] PeiServices The pointer to the PEI Services Table.\r
+ @param[in] This The pointer to this instance of this PPI.\r
+ @param[out] FspHobList The pointer to Hob list produced by FSP.\r
+\r
+ @return EFI_SUCCESS FReturn Hob list produced by FSP successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspInitDoneGetFspHobListV2 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN FSP_INIT_DONE_PPI *This,\r
+ OUT VOID **FspHobList\r
+ )\r
+{\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+\r
+ GuidHob = GetFirstGuidHob (&gFspInitDonePpiGuid);\r
+ if (GuidHob != NULL) {\r
+ *FspHobList = *(VOID **)GET_GUID_HOB_DATA (GuidHob);\r
+ return EFI_SUCCESS;\r
+ } else {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+}\r
+\r
+/**\r
+ Call FspMemoryInit API.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+\r
+ @return Status returned by FspMemoryInit API.\r
+**/\r
+EFI_STATUS\r
+PeiFspMemoryInit (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ )\r
+{\r
+ FSP_MEMORY_INIT_PARAMS FspMemoryInitParams;\r
+ FSP_INIT_RT_COMMON_BUFFER FspRtBuffer;\r
+ UINT8 FspUpdRgn[FixedPcdGet32 (PcdMaxUpdRegionSize)];\r
+ UINT32 UpdRegionSize;\r
+ EFI_BOOT_MODE BootMode;\r
+ UINT64 StackSize;\r
+ EFI_PHYSICAL_ADDRESS StackBase;\r
+ EFI_STATUS Status;\r
+ VOID *FspHobList;\r
+ VOID *HobData;\r
+\r
+ DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n"));\r
+\r
+ PeiServicesGetBootMode (&BootMode);\r
+ DEBUG ((DEBUG_INFO, "BootMode - 0x%x\n", BootMode));\r
+\r
+ GetStackInfo (BootMode, FALSE, &StackBase, &StackSize);\r
+ DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));\r
+ DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));\r
+\r
+ ZeroMem (&FspRtBuffer, sizeof(FspRtBuffer));\r
+ FspRtBuffer.StackTop = (UINT32 *)(UINTN)(StackBase + StackSize);\r
+\r
+ FspRtBuffer.BootMode = BootMode;\r
+\r
+ /* Platform override any UPD configs */\r
+ UpdRegionSize = GetUpdRegionSize();\r
+ DEBUG ((DEBUG_INFO, "UpdRegionSize - 0x%x\n", UpdRegionSize));\r
+ DEBUG ((DEBUG_INFO, "sizeof(FspUpdRgn) - 0x%x\n", sizeof(FspUpdRgn)));\r
+ ASSERT(sizeof(FspUpdRgn) >= UpdRegionSize);\r
+ ZeroMem (FspUpdRgn, UpdRegionSize);\r
+ FspRtBuffer.UpdDataRgnPtr = UpdateFspUpdConfigs (FspUpdRgn);\r
+\r
+ ZeroMem (&FspMemoryInitParams, sizeof(FspMemoryInitParams));\r
+ FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer ();\r
+ DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr));\r
+ FspMemoryInitParams.RtBufferPtr = (VOID *)&FspRtBuffer;\r
+ FspMemoryInitParams.HobListPtr = &FspHobList;\r
+\r
+ DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams));\r
+ DEBUG ((DEBUG_INFO, " NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr));\r
+ DEBUG ((DEBUG_INFO, " RtBufferPtr - 0x%x\n", FspMemoryInitParams.RtBufferPtr));\r
+ DEBUG ((DEBUG_INFO, " StackTop - 0x%x\n", FspRtBuffer.StackTop));\r
+ DEBUG ((DEBUG_INFO, " BootMode - 0x%x\n", FspRtBuffer.BootMode));\r
+ DEBUG ((DEBUG_INFO, " UpdDataRgnPtr - 0x%x\n", FspRtBuffer.UpdDataRgnPtr));\r
+ DEBUG ((DEBUG_INFO, " HobListPtr - 0x%x\n", FspMemoryInitParams.HobListPtr));\r
+\r
+ Status = CallFspMemoryInit (FspHeader, &FspMemoryInitParams);\r
+ DEBUG((DEBUG_INFO, "FspMemoryInit status: 0x%x\n", Status));\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ DEBUG ((DEBUG_INFO, " HobListPtr (returned) - 0x%x\n", FspHobList));\r
+\r
+ FspHobProcessForMemoryResource (FspHobList);\r
+\r
+ //\r
+ // FspHobList is not complete at this moment.\r
+ // Save FspHobList pointer to hob, so that it can be got later\r
+ //\r
+ HobData = BuildGuidHob (\r
+ &gFspInitDonePpiGuid,\r
+ sizeof (VOID *)\r
+ );\r
+ ASSERT (HobData != NULL);\r
+ CopyMem (HobData, &FspHobList, sizeof (FspHobList));\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ TemporaryRamDone() disables the use of Temporary RAM. If present, this service is invoked\r
+ by the PEI Foundation after the EFI_PEI_PERMANANT_MEMORY_INSTALLED_PPI is installed.\r
+\r
+ @retval EFI_SUCCESS Use of Temporary RAM was disabled.\r
+ @retval EFI_INVALID_PARAMETER Temporary RAM could not be disabled.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiTemporaryRamDone (\r
+ VOID\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ VOID *TempRamExitParam;\r
+ FSP_INFO_HEADER *FspHeader;\r
+\r
+ FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+ \r
+ DEBUG ((DEBUG_INFO, "PeiTemporaryRamDone enter\n"));\r
+ \r
+ TempRamExitParam = GetTempRamExitParam ();\r
+ Status = CallTempRamExit (FspHeader, TempRamExitParam);\r
+ DEBUG((DEBUG_INFO, "TempRamExit status: 0x%x\n", Status));\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ This function is called after PEI core discover memory and finish migration.\r
+\r
+ @param[in] PeiServices Pointer to PEI Services Table.\r
+ @param[in] NotifyDesc Pointer to the descriptor for the Notification event that\r
+ caused this function to execute.\r
+ @param[in] Ppi Pointer to the PPI data associated with this function.\r
+\r
+ @retval EFI_STATUS Always return EFI_SUCCESS\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiMemoryDiscoveredNotify (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,\r
+ IN VOID *Ppi\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ VOID *FspSiliconInitParam;\r
+ FSP_INFO_HEADER *FspHeader;\r
+ VOID *FspHobList;\r
+ EFI_HOB_GUID_TYPE *GuidHob;\r
+\r
+ FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+ \r
+ DEBUG ((DEBUG_INFO, "PeiMemoryDiscoveredNotify enter\n"));\r
+ \r
+ FspSiliconInitParam = GetFspSiliconInitParam ();\r
+ Status = CallFspSiliconInit (FspHeader, FspSiliconInitParam);\r
+ DEBUG((DEBUG_ERROR, "FspSiliconInit status: 0x%x\n", Status));\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ //\r
+ // Now FspHobList complete, process it\r
+ //\r
+ GuidHob = GetFirstGuidHob (&gFspInitDonePpiGuid);\r
+ ASSERT (GuidHob != NULL);\r
+ FspHobList = *(VOID **)GET_GUID_HOB_DATA (GuidHob);\r
+ DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));\r
+ FspHobProcessForOtherData (FspHobList);\r
+\r
+ //\r
+ // Install FspInitDonePpi so that any other driver can consume this info.\r
+ //\r
+ Status = PeiServicesInstallPpi (&mPeiFspInitDonePpiV2);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ Do FSP initialization based on FspApi version 2.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+\r
+ @return FSP initialization status.\r
+**/\r
+EFI_STATUS\r
+PeiFspInitV2 (\r
+ IN FSP_INFO_HEADER *FspHeader\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_BOOT_MODE BootMode;\r
+\r
+ Status = PeiFspMemoryInit (FspHeader);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ //\r
+ // Install TempramDonePpi to run TempRamExit\r
+ //\r
+ Status = PeiServicesInstallPpi (&mPeiTemporaryRamDoneDesc);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ //\r
+ // Register MemoryDiscovered Nofity to run FspSiliconInit\r
+ //\r
+ Status = PeiServicesNotifyPpi (&mPeiMemoryDiscoveredNotifyDesc);\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ //\r
+ // Register EndOfPei Notify for S3 to run FspNotifyPhase\r
+ //\r
+ PeiServicesGetBootMode (&BootMode);\r
+ if (BootMode == BOOT_ON_S3_RESUME) {\r
+ Status = PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc);\r
+ ASSERT_EFI_ERROR (Status);\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}
\ No newline at end of file
/** @file\r
In EndOfPei notify, it will call FspNotifyPhase API.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
)\r
{\r
NOTIFY_PHASE_PARAMS NotifyPhaseParams;\r
- FSP_STATUS FspStatus;\r
+ EFI_STATUS Status;\r
FSP_INFO_HEADER *FspHeader;\r
\r
FspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));\r
if (FspHeader == NULL) {\r
return EFI_DEVICE_ERROR;\r
}\r
-\r
+ \r
+ DEBUG ((DEBUG_INFO, "S3EndOfPeiNotify enter\n"));\r
+ \r
NotifyPhaseParams.Phase = EnumInitPhaseAfterPciEnumeration;\r
- FspStatus = CallFspNotifyPhase (FspHeader, &NotifyPhaseParams);\r
- if (FspStatus != FSP_SUCCESS) {\r
- DEBUG((DEBUG_ERROR, "FSP S3NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", FspStatus));\r
- } else {\r
- DEBUG((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration Success.\n"));\r
- }\r
+ Status = CallFspNotifyPhase (FspHeader, &NotifyPhaseParams);\r
+ DEBUG((DEBUG_INFO, "FSP S3NotifyPhase AfterPciEnumeration status: 0x%x\n", Status));\r
\r
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;\r
- FspStatus = CallFspNotifyPhase (FspHeader, &NotifyPhaseParams);\r
- if (FspStatus != FSP_SUCCESS) {\r
- DEBUG((DEBUG_ERROR, "FSP S3NotifyPhase ReadyToBoot failed, status: 0x%x\n", FspStatus));\r
- } else {\r
- DEBUG((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot Success.\n"));\r
- }\r
+ Status = CallFspNotifyPhase (FspHeader, &NotifyPhaseParams);\r
+ DEBUG((DEBUG_INFO, "FSP S3NotifyPhase ReadyToBoot status: 0x%x\n", Status));\r
\r
return EFI_SUCCESS;\r
}\r
+++ /dev/null
-/** @file\r
- Install FspInitDone PPI and GetFspHobList API.\r
-\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#include "SecMain.h"\r
-\r
-FSP_INIT_DONE_PPI gFspInitDonePpi = {\r
- FspInitDoneGetFspHobList\r
-};\r
-\r
-/**\r
- Return Hob list produced by FSP.\r
-\r
- @param[in] PeiServices The pointer to the PEI Services Table.\r
- @param[in] This The pointer to this instance of this PPI.\r
- @param[out] FspHobList The pointer to Hob list produced by FSP.\r
-\r
- @return EFI_SUCCESS FReturn Hob list produced by FSP successfully.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-FspInitDoneGetFspHobList (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN FSP_INIT_DONE_PPI *This,\r
- OUT VOID **FspHobList\r
- )\r
-{\r
- VOID *TopOfTemporaryRamPpi;\r
- EFI_STATUS Status;\r
-\r
- Status = (*PeiServices)->LocatePpi (\r
- PeiServices,\r
- &gTopOfTemporaryRamPpiGuid,\r
- 0,\r
- NULL,\r
- (VOID **) &TopOfTemporaryRamPpi\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return EFI_NOT_FOUND;\r
- }\r
-\r
- *FspHobList = (VOID *)(UINTN)(*(UINT32 *)((UINTN)TopOfTemporaryRamPpi - sizeof(UINT32)));\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
/** @file\r
C functions in SEC\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
},\r
};\r
\r
+FSP_INIT_DONE_PPI gFspInitDonePpi = {\r
+ FspInitDoneGetFspHobList\r
+};\r
+\r
//\r
// These are IDT entries pointing to 10:FFFFFFE4h.\r
//\r
//\r
return ;\r
}\r
+\r
+/**\r
+ Return Hob list produced by FSP.\r
+\r
+ @param[in] PeiServices The pointer to the PEI Services Table.\r
+ @param[in] This The pointer to this instance of this PPI.\r
+ @param[out] FspHobList The pointer to Hob list produced by FSP.\r
+\r
+ @return EFI_SUCCESS FReturn Hob list produced by FSP successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspInitDoneGetFspHobList (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN FSP_INIT_DONE_PPI *This,\r
+ OUT VOID **FspHobList\r
+ )\r
+{\r
+ VOID *TopOfTemporaryRamPpi;\r
+ EFI_STATUS Status;\r
+\r
+ Status = (*PeiServices)->LocatePpi (\r
+ PeiServices,\r
+ &gTopOfTemporaryRamPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **) &TopOfTemporaryRamPpi\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ *FspHobList = (VOID *)(UINTN)(*(UINT32 *)((UINTN)TopOfTemporaryRamPpi - sizeof(UINT32)));\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
/** @file\r
This driver will register two callbacks to call fsp's notifies.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
{\r
NOTIFY_PHASE_PARAMS NotifyPhaseParams;\r
EFI_STATUS Status;\r
- FSP_STATUS FspStatus;\r
VOID *Interface;\r
\r
//\r
}\r
\r
NotifyPhaseParams.Phase = EnumInitPhaseAfterPciEnumeration;\r
- FspStatus = CallFspNotifyPhase (mFspHeader, &NotifyPhaseParams);\r
- if (FspStatus != FSP_SUCCESS) {\r
- DEBUG((DEBUG_ERROR, "FSP NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", FspStatus));\r
+ Status = CallFspNotifyPhase (mFspHeader, &NotifyPhaseParams);\r
+ if (Status != EFI_SUCCESS) {\r
+ DEBUG((DEBUG_ERROR, "FSP NotifyPhase AfterPciEnumeration failed, status: 0x%x\n", Status));\r
} else {\r
DEBUG((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration Success.\n"));\r
}\r
)\r
{\r
NOTIFY_PHASE_PARAMS NotifyPhaseParams;\r
- FSP_STATUS FspStatus;\r
+ EFI_STATUS Status;\r
\r
gBS->CloseEvent (Event);\r
\r
NotifyPhaseParams.Phase = EnumInitPhaseReadyToBoot;\r
- FspStatus = CallFspNotifyPhase (mFspHeader, &NotifyPhaseParams);\r
- if (FspStatus != FSP_SUCCESS) {\r
- DEBUG((DEBUG_ERROR, "FSP NotifyPhase ReadyToBoot failed, status: 0x%x\n", FspStatus));\r
+ Status = CallFspNotifyPhase (mFspHeader, &NotifyPhaseParams);\r
+ if (Status != EFI_SUCCESS) {\r
+ DEBUG((DEBUG_ERROR, "FSP NotifyPhase ReadyToBoot failed, status: 0x%x\n", Status));\r
} else {\r
DEBUG((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot Success.\n"));\r
}\r
/** @file\r
Provide FSP API related function.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param[in] FspHeader FSP header pointer.\r
@param[in] FspInitParams Address pointer to the FSP_INIT_PARAMS structure.\r
\r
- @return FSP status returned by FspInit API.\r
+ @return EFI status returned by FspInit API.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
EFIAPI\r
CallFspInit (\r
IN FSP_INFO_HEADER *FspHeader,\r
@param[in] FspHeader FSP header pointer.\r
@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.\r
\r
- @return FSP status returned by FspNotifyPhase API.\r
+ @return EFI status returned by FspNotifyPhase API.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
EFIAPI\r
CallFspNotifyPhase (\r
IN FSP_INFO_HEADER *FspHeader,\r
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams\r
);\r
\r
+/**\r
+ Call FSP API - FspMemoryInit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] FspMemoryInitParams Address pointer to the FSP_MEMORY_INIT_PARAMS structure.\r
+\r
+ @return EFI status returned by FspMemoryInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspMemoryInit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParams\r
+ );\r
+\r
+/**\r
+ Call FSP API - TempRamExit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] TempRamExitParam Address pointer to the TempRamExit parameters structure.\r
+\r
+ @return EFI status returned by TempRamExit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallTempRamExit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT VOID *TempRamExitParam\r
+ );\r
+\r
+/**\r
+ Call FSP API - FspSiliconInit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] FspSiliconInitParam Address pointer to the Silicon Init parameters structure.\r
+\r
+ @return EFI status returned by FspSiliconInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspSiliconInit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT VOID *FspSiliconInitParam\r
+ );\r
+\r
#endif\r
IN VOID *FspHobList\r
);\r
\r
+/**\r
+ BIOS process FspBobList for Memory Resource Descriptor.\r
+\r
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.\r
+\r
+ @return If platform process the FSP hob list successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspHobProcessForMemoryResource (\r
+ IN VOID *FspHobList\r
+ );\r
+\r
+/**\r
+ BIOS process FspBobList for other data (not Memory Resource Descriptor).\r
+\r
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.\r
+\r
+ @return If platform process the FSP hob list successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspHobProcessForOtherData (\r
+ IN VOID *FspHobList\r
+ );\r
+\r
#endif\r
IN OUT VOID *FspUpdRgnPtr\r
);\r
\r
+/**\r
+ Get TempRamExit parameter.\r
+\r
+ @note At this point, memory is ready, PeiServices are available to use.\r
+\r
+ @return TempRamExit parameter.\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetTempRamExitParam (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Get FspSiliconInit parameter.\r
+\r
+ @note At this point, memory is ready, PeiServices are available to use.\r
+\r
+ @return FspSiliconInit parameter.\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetFspSiliconInitParam (\r
+ VOID\r
+ );\r
+\r
/**\r
Get S3 PEI memory information.\r
\r
Include\r
\r
[LibraryClasses]\r
+ ## @libraryclass Provide FSP API related function.\r
+ FspApiLib|IntelFspWrapperPkg/Include/Library/FspApiLib.h\r
+\r
+ ## @libraryclass Provide FSP hob process related function.\r
+ FspHobProcessLib|IntelFspWrapperPkg/Include/Library/FspHobProcessLib.h\r
+\r
+ ## @libraryclass Provide FSP platform information related function.\r
+ FspPlatformInfoLib|IntelFspWrapperPkg/Include/Library/FspPlatformInfoLib.h\r
+\r
+ ## @libraryclass Provide FSP wrapper platform sec related function.\r
+ FspPlatformSecLib|IntelFspWrapperPkg/Include/Library/FspPlatformSecLib.h\r
\r
[Guids]\r
#\r
gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r
## Indicate the PEI memory size platform want to report\r
gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
+\r
+ ## PcdFspApiVersion is to determine wrapper calling mechanism\r
+ # - FSP_API_REVISION_1 1\r
+ # - FSP_API_REVISION_2 2\r
+ gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000\r
IntelFspWrapperPkg/IntelFspWrapperPkg.dec\r
\r
[LibraryClasses]\r
+ BaseLib\r
\r
[Guids]\r
gFspHeaderFileGuid ## CONSUMES ## GUID\r
/** @file\r
Provide FSP API related function.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <Guid/FspHeaderFile.h>\r
\r
#include <Library/FspApiLib.h>\r
+#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
\r
/**\r
@param[in] Function The 32bit code entry to be executed.\r
@param[in] Param1 The first parameter to pass to 32bit code.\r
\r
- @return FSP_STATUS.\r
+ @return EFI_STATUS.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
Execute32BitCode (\r
IN UINT64 Function,\r
IN UINT64 Param1\r
@param[in] FspHeader FSP header pointer.\r
@param[in] FspInitParams Address pointer to the FSP_INIT_PARAMS structure.\r
\r
- @return FSP status returned by FspInit API.\r
+ @return EFI status returned by FspInit API.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
EFIAPI\r
CallFspInit (\r
IN FSP_INFO_HEADER *FspHeader,\r
IN FSP_INIT_PARAMS *FspInitParams\r
)\r
{\r
- FSP_FSP_INIT FspInitApi;\r
- FSP_STATUS FspStatus;\r
+ FSP_INIT FspInitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
\r
- FspInitApi = (FSP_FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r
- FspStatus = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);\r
+ FspInitApi = (FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);\r
+ SetInterruptState (InterruptState);\r
\r
- return FspStatus;\r
+ return Status;\r
}\r
\r
/**\r
@param[in] FspHeader FSP header pointer.\r
@param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.\r
\r
- @return FSP status returned by FspNotifyPhase API.\r
+ @return EFI status returned by FspNotifyPhase API.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
EFIAPI\r
CallFspNotifyPhase (\r
IN FSP_INFO_HEADER *FspHeader,\r
)\r
{\r
FSP_NOTIFY_PHASE NotifyPhaseApi;\r
- FSP_STATUS FspStatus;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
\r
NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
- FspStatus = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);\r
+ SetInterruptState (InterruptState);\r
\r
- return FspStatus;\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - FspMemoryInit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] FspMemoryInitParams Address pointer to the FSP_MEMORY_INIT_PARAMS structure.\r
+\r
+ @return EFI status returned by FspMemoryInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspMemoryInit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParams\r
+ )\r
+{\r
+ FSP_MEMORY_INIT FspMemoryInitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - TempRamExit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] TempRamExitParam Address pointer to the TempRamExit parameters structure.\r
+\r
+ @return EFI status returned by TempRamExit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallTempRamExit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT VOID *TempRamExitParam\r
+ )\r
+{\r
+ FSP_TEMP_RAM_EXIT TempRamExitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - FspSiliconInit.\r
+\r
+ @param[in] FspHeader FSP header pointer.\r
+ @param[in,out] FspSiliconInitParam Address pointer to the Silicon Init parameters structure.\r
+\r
+ @return EFI status returned by FspSiliconInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspSiliconInit (\r
+ IN FSP_INFO_HEADER *FspHeader,\r
+ IN OUT VOID *FspSiliconInitParam\r
+ )\r
+{\r
+ FSP_SILICON_INIT FspSiliconInitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
}\r
/** @file\r
Execute 32-bit code in Protected Mode.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <FspApi.h>\r
\r
typedef\r
-FSP_STATUS\r
-(FSPAPI *FSP_FUNCTION) (\r
+EFI_STATUS\r
+(EFIAPI *FSP_FUNCTION) (\r
IN VOID *Param1\r
);\r
\r
@param[in] Function The 32bit code entry to be executed.\r
@param[in] Param1 The first parameter to pass to 32bit code.\r
\r
- @return FSP_STATUS.\r
+ @return EFI_STATUS.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
Execute32BitCode (\r
IN UINT64 Function,\r
IN UINT64 Param1\r
)\r
{\r
FSP_FUNCTION EntryFunc;\r
- FSP_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
EntryFunc = (FSP_FUNCTION) (UINTN) (Function);\r
Status = EntryFunc ((VOID *)(UINTN)Param1);\r
Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit\r
back to long mode.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param[in] Function The 32bit code entry to be executed.\r
@param[in] Param1 The first parameter to pass to 32bit code.\r
\r
- @return FSP_STATUS.\r
+ @return EFI_STATUS.\r
**/\r
-FSP_STATUS\r
+EFI_STATUS\r
Execute32BitCode (\r
IN UINT64 Function,\r
IN UINT64 Param1\r
return NULL;\r
}\r
\r
+/**\r
+ Get TempRamExit parameter.\r
+\r
+ @note At this point, memory is ready, PeiServices are available to use.\r
+\r
+ @return TempRamExit parameter.\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetTempRamExitParam (\r
+ VOID\r
+ )\r
+{\r
+ return NULL;\r
+}\r
+\r
+/**\r
+ Get FspSiliconInit parameter.\r
+\r
+ @note At this point, memory is ready, PeiServices are available to use.\r
+\r
+ @return FspSiliconInit parameter.\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetFspSiliconInitParam (\r
+ VOID\r
+ )\r
+{\r
+ return NULL;\r
+}\r
+\r
/**\r
Get S3 PEI memory information.\r
\r
/** @file\r
Sample to provide FSP hob process related function.\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
}\r
\r
/**\r
- BIOS process FspBobList.\r
+ BIOS process FspBobList for Memory Resource Descriptor.\r
\r
@param[in] FspHobList Pointer to the HOB data structure produced by FSP.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
-FspHobProcess (\r
+FspHobProcessForMemoryResource (\r
IN VOID *FspHobList\r
)\r
{\r
}\r
}\r
\r
- //\r
- // NV Storage Hob\r
- //\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ BIOS process FspBobList for other data (not Memory Resource Descriptor).\r
+\r
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.\r
\r
+ @return If platform process the FSP hob list successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspHobProcessForOtherData (\r
+ IN VOID *FspHobList\r
+ )\r
+{\r
return EFI_SUCCESS;\r
}\r
+\r
+/**\r
+ BIOS process FspBobList.\r
+\r
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.\r
+\r
+ @return If platform process the FSP hob list successfully.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FspHobProcess (\r
+ IN VOID *FspHobList\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ Status = FspHobProcessForMemoryResource (FspHobList);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ Status = FspHobProcessForOtherData (FspHobList);\r
+\r
+ return Status;\r
+}\r
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