{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
switch (Width) {\r
case EfiPeiPciCfgWidthUint8:\r
* (UINT8 *) Buffer = PciRead8 (PciLibAddress);\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
switch (Width) {\r
case EfiPeiPciCfgWidthUint8:\r
PciWrite8 (PciLibAddress, *(UINT8 *) Buffer);\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
switch (Width) {\r
case EfiPeiPciCfgWidthUint8:\r
PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);\r
&gPciCfgPpi\r
};\r
\r
+\r
+/**\r
+ Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
+\r
+ @param Address PCI address with\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
+ \r
+ @return The PCI address with PCI_LIB_ADDRESS format.\r
+ \r
+**/\r
+UINTN\r
+PciCfgAddressConvert (\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
+ )\r
+{\r
+ if (Address->ExtendedRegister == 0) {\r
+ return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register);\r
+ }\r
+\r
+ return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
+}\r
+\r
/**\r
Reads from a given location in the PCI configuration space.\r
\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
PciAndThenOr8 (PciLibAddress, ~(*(UINT8 *)ClearBits), *((UINT8 *) SetBits));\r
\r
#include <IndustryStandard\Pci.h>\r
\r
-#define COMMON_TO_PCILIB_ADDRESS(A) (UINTN)PCI_LIB_ADDRESS( \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Bus, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Device, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Function, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Register \\r
- )\r
+\r
+/**\r
+ Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
+\r
+ @param Address PCI address with\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
+ \r
+ @return The PCI address with PCI_LIB_ADDRESS format.\r
+ \r
+**/\r
+UINTN\r
+PciCfgAddressConvert (\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
+ );\r
\r
\r
/**\r
BaseMemoryLib\r
PeiServicesTablePointerLib\r
CustomDecompressLib\r
- TianoDecompressLib\r
UefiDecompressLib\r
PeCoffLoaderLib\r
CacheMaintenanceLib\r
ReportStatusCodeLib|IntelFrameworkPkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf\r
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf\r
- SmBusLib|MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLib.inf\r
+ SmBusLib|MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.inf\r
\r
[LibraryClasses.common.DXE_CORE]\r
HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r
\r
#include <IndustryStandard\Pci.h>\r
\r
-#define COMMON_TO_PCILIB_ADDRESS(A) (UINTN)PCI_LIB_ADDRESS( \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Bus, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Device, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Function, \\r
- ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &A)->Register \\r
- )\r
+/**\r
+ Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
\r
+ @param Address PCI address with\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
+ \r
+ @return The PCI address with PCI_LIB_ADDRESS format.\r
+ \r
+**/\r
+STATIC\r
+UINTN\r
+PciCfgAddressConvert (\r
+ EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
+ )\r
+{\r
+ if (Address->ExtendedRegister == 0) {\r
+ return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register);\r
+ }\r
+\r
+ return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
+}\r
\r
/**\r
Reads from a given location in the PCI configuration space.\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
*((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
{\r
UINTN PciLibAddress;\r
\r
- PciLibAddress = COMMON_TO_PCILIB_ADDRESS (Address);\r
+ PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
if (Width == EfiPeiPciCfgWidthUint8) {\r
PciAndThenOr8 (PciLibAddress, ~(*(UINT8 *)ClearBits), *((UINT8 *) SetBits));\r
+++ /dev/null
-#/** @file\r
-# Component description file for Pei Smbus Library.\r
-#\r
-# SMBUS library that layers on top of the SMBUS PPI.\r
-# Copyright (c) 2006 - 2007, Intel Corporation\r
-#\r
-# All rights reserved. This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = PeiSmbusLibSmbus2Ppi\r
- FILE_GUID = 2A1E1C92-AABA-4d62-AC40-F3A4C3387356\r
- MODULE_TYPE = PEIM\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = SmbusLib|PEIM\r
- EDK_RELEASE_VERSION = 0x00020000\r
- EFI_SPECIFICATION_VERSION = 0x00020000\r
-\r
-\r
-#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
-#\r
-\r
-[Sources.common]\r
- SmbusLib.c\r
- PeiSmbusLib.c\r
- InternalSmbusLib.h\r
-\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
-\r
-\r
-[LibraryClasses]\r
- BaseMemoryLib\r
- PeiServicesTablePointerLib\r
- DebugLib\r
-\r
-[Ppis]\r
- gEfiPeiSmbus2PpiGuid # PPI ALWAYS_CONSUMED\r
-\r
-[Depex]\r
- gEfiPeiSmbus2PpiGuid \r
--- /dev/null
+#/** @file\r
+# Component description file for Pei Smbus Library.\r
+#\r
+# SMBUS library that layers on top of the SMBUS PPI.\r
+# Copyright (c) 2006 - 2007, Intel Corporation\r
+#\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = PeiSmbusLibSmbus2Ppi\r
+ FILE_GUID = 2A1E1C92-AABA-4d62-AC40-F3A4C3387356\r
+ MODULE_TYPE = PEIM\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = SmbusLib|PEIM\r
+ EDK_RELEASE_VERSION = 0x00020000\r
+ EFI_SPECIFICATION_VERSION = 0x00020000\r
+\r
+\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources.common]\r
+ SmbusLib.c\r
+ PeiSmbusLib.c\r
+ InternalSmbusLib.h\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+\r
+\r
+[LibraryClasses]\r
+ BaseMemoryLib\r
+ PeiServicesTablePointerLib\r
+ DebugLib\r
+\r
+[Ppis]\r
+ gEfiPeiSmbus2PpiGuid # PPI ALWAYS_CONSUMED\r
+\r
+[Depex]\r
+ gEfiPeiSmbus2PpiGuid \r
MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf\r
MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf\r
- MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLib.inf\r
+ MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.inf\r
MdePkg/Library/SerialPortLibNull/SerialPortLibNull.inf\r
MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf\r
MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf\r
PeCoffLoaderLib|MdeModulePkg/Library/DxePeCoffLoaderFromHobLib/DxePeCoffLoaderFromHobLib.inf\r
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf\r
DebugLib|IntelFrameworkPkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf\r
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf\r
\r
\r
[LibraryClasses.common.DXE_SMM_DRIVER]\r
PcdReportStatusCodePropertyMask|gEfiMdePkgTokenSpaceGuid|0x0f\r
PcdDebugPropertyMask|gEfiMdePkgTokenSpaceGuid|0x1f\r
PcdDebugClearMemoryValue|gEfiMdePkgTokenSpaceGuid|0xAF\r
- PcdDebugPrintErrorLevel|gEfiMdePkgTokenSpaceGuid|0x80000040\r
PcdPerformanceLibraryPropertyMask|gEfiMdePkgTokenSpaceGuid|0\r
PcdMaxPeiPcdCallBackNumberPerPcdEntry|gEfiMdeModulePkgTokenSpaceGuid|0x08\r
PcdVpdBaseAddress|gEfiMdeModulePkgTokenSpaceGuid|0x0\r
PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid|0\r
PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid|0\r
\r
+\r
+ PcdDebugPrintErrorLevel|gEfiMdePkgTokenSpaceGuid|0x80000040\r
################################################################################\r
#\r
# Components Section - list of all EDK II Modules needed by this Platform\r