MdePkg/Library/BaseLib: Enable VS2017/ARM64 builds

Required GCC assembly files are converted for the MSFT assembler

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm
new file mode 100644 (file)
index 0000000..17e993f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/CpuBreakpoint.asm
@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------\r
+;\r
+; CpuBreakpoint() for AArch64\r
+;\r
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+\r
+  EXPORT CpuBreakpoint\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+;/**\r
+;  Generates a breakpoint on the CPU.\r
+;\r
+;  Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
+;  that code can resume normal execution after the breakpoint.\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;CpuBreakpoint (\r
+;  VOID\r
+;  );\r
+;\r
+CpuBreakpoint\r
+    svc   0xdbdb    // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here.\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm
new file mode 100644 (file)
index 0000000..4984934
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.asm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------\r
+;\r
+; DisableInterrupts() for AArch64\r
+;\r
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+  EXPORT DisableInterrupts\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+DAIF_WR_IRQ_BIT     EQU     (1 << 1)\r
+\r
+;/**\r
+;  Disables CPU interrupts.\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;DisableInterrupts (\r
+;  VOID\r
+;  );\r
+;\r
+DisableInterrupts\r
+    msr  daifset, #DAIF_WR_IRQ_BIT\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm
new file mode 100644 (file)
index 0000000..ec3d6e4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.asm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------\r
+;\r
+; EnableInterrupts() for AArch64\r
+;\r
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+  EXPORT EnableInterrupts\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+DAIF_WR_IRQ_BIT     EQU     (1 << 1)\r
+\r
+;/**\r
+;  Enables CPU interrupts.\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;EnableInterrupts (\r
+;  VOID\r
+;  );\r
+;\r
+EnableInterrupts\r
+    msr  daifclr, #DAIF_WR_IRQ_BIT\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm
new file mode 100644 (file)
index 0000000..d64b0d5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.asm
@@ -0,0 +1,49 @@
+;------------------------------------------------------------------------------\r
+;\r
+; GetInterruptState() function for AArch64\r
+;\r
+; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+  EXPORT GetInterruptState\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+DAIF_RD_IRQ_BIT     EQU     (1 << 7)\r
+\r
+;/**\r
+;  Retrieves the current CPU interrupt state.\r
+;\r
+;  Returns TRUE is interrupts are currently enabled. Otherwise\r
+;  returns FALSE.\r
+;\r
+;  @retval TRUE  CPU interrupts are enabled.\r
+;  @retval FALSE CPU interrupts are disabled.\r
+;\r
+;**/\r
+;\r
+;BOOLEAN\r
+;EFIAPI\r
+;GetInterruptState (\r
+;  VOID\r
+; );\r
+;\r
+GetInterruptState\r
+    mrs    x0, daif\r
+    mov    w0, wzr\r
+    tst    x0, #DAIF_RD_IRQ_BIT   // Check IRQ mask; set Z=1 if clear/unmasked\r
+    bne    exit                   // if Z=1 (eq) return 1, else 0\r
+    mov    w0, #1\r
+exit\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/AArch64/MemoryFence.asm b/MdePkg/Library/BaseLib/AArch64/MemoryFence.asm
new file mode 100644 (file)
index 0000000..84dede6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/MemoryFence.asm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------\r
+;\r
+; MemoryFence() for AArch64\r
+;\r
+; Copyright (c) 2013, ARM Ltd. All rights reserved.\r
+;\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+  EXPORT MemoryFence\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+;/**\r
+;  Used to serialize load and store operations.\r
+;\r
+;  All loads and stores that proceed calls to this function are guaranteed to be\r
+;  globally visible when this function returns.\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;MemoryFence (\r
+;  VOID\r
+;  );\r
+;\r
+MemoryFence\r
+    // System wide Data Memory Barrier.\r
+    dmb sy\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm b/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm
new file mode 100644 (file)
index 0000000..e0a9715
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm
@@ -0,0 +1,101 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2009-2013, ARM Ltd.  All rights reserved.\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+  EXPORT SetJump\r
+  EXPORT InternalLongJump\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+#define GPR_LAYOUT                          \\r
+        REG_PAIR (x19, x20,  #0);           \\r
+        REG_PAIR (x21, x22, #16);           \\r
+        REG_PAIR (x23, x24, #32);           \\r
+        REG_PAIR (x25, x26, #48);           \\r
+        REG_PAIR (x27, x28, #64);           \\r
+        REG_PAIR (x29, x30, #80);/*FP, LR*/ \\r
+        REG_ONE  (x16,      #96) /*IP0*/\r
+\r
+#define FPR_LAYOUT                       \\r
+        REG_PAIR ( d8,  d9, #112);       \\r
+        REG_PAIR (d10, d11, #128);       \\r
+        REG_PAIR (d12, d13, #144);       \\r
+        REG_PAIR (d14, d15, #160);\r
+\r
+;/**\r
+;  Saves the current CPU context that can be restored with a call to LongJump() and returns 0.#\r
+;\r
+;  Saves the current CPU context in the buffer specified by JumpBuffer and returns 0.  The initial\r
+;  call to SetJump() must always return 0.  Subsequent calls to LongJump() cause a non-zero\r
+;  value to be returned by SetJump().\r
+;\r
+;  If JumpBuffer is NULL, then ASSERT().\r
+;  For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+;\r
+;  @param  JumpBuffer    A pointer to CPU context buffer.\r
+;\r
+;**/\r
+;\r
+;UINTN\r
+;EFIAPI\r
+;SetJump (\r
+;  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer  // X0\r
+;  );\r
+;\r
+SetJump\r
+        mov     x16, sp // use IP0 so save SP\r
+#define REG_PAIR(REG1, REG2, OFFS)      stp REG1, REG2, [x0, OFFS]\r
+#define REG_ONE(REG1, OFFS)             str REG1, [x0, OFFS]\r
+        GPR_LAYOUT\r
+        FPR_LAYOUT\r
+#undef REG_PAIR\r
+#undef REG_ONE\r
+        mov     w0, #0\r
+        ret\r
+\r
+;/**\r
+;  Restores the CPU context that was saved with SetJump().#\r
+;\r
+;  Restores the CPU context from the buffer specified by JumpBuffer.\r
+;  This function never returns to the caller.\r
+;  Instead is resumes execution based on the state of JumpBuffer.\r
+;\r
+;  @param  JumpBuffer    A pointer to CPU context buffer.\r
+;  @param  Value         The value to return when the SetJump() context is restored.\r
+;\r
+;**/\r
+;VOID\r
+;EFIAPI\r
+;InternalLongJump (\r
+;  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,  // X0\r
+;  IN      UINTN                     Value         // X1\r
+;  );\r
+;\r
+InternalLongJump\r
+#define REG_PAIR(REG1, REG2, OFFS)      ldp REG1, REG2, [x0, OFFS]\r
+#define REG_ONE(REG1, OFFS)             ldr REG1, [x0, OFFS]\r
+        GPR_LAYOUT\r
+        FPR_LAYOUT\r
+#undef REG_PAIR\r
+#undef REG_ONE\r
+        mov     sp, x16\r
+        cmp     w1, #0\r
+        mov     w0, #1\r
+        beq     exit\r
+        mov     w0, w1\r
+exit\r
+        // use br not ret, as ret is guaranteed to mispredict\r
+        br      x30\r
+\r
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED\r
+\r
+  END\r
+\r

diff --git a/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm b/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm
new file mode 100644 (file)
index 0000000..c1b2de0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/AArch64/SwitchStack.asm
@@ -0,0 +1,69 @@
+//------------------------------------------------------------------------------\r
+//\r
+// Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
+// Portions copyright (c) 2011 - 2013, ARM Limited. All rights reserved.<BR>\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution.  The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php.\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+  EXPORT InternalSwitchStackAsm\r
+  EXPORT CpuPause\r
+  AREA BaseLib_LowLevel, CODE, READONLY\r
+\r
+/**\r
+//\r
+//  This allows the caller to switch the stack and goes to the new entry point\r
+//\r
+// @param      EntryPoint   The pointer to the location to enter\r
+// @param      Context      Parameter to pass in\r
+// @param      Context2     Parameter2 to pass in\r
+// @param      NewStack     New Location of the stack\r
+//\r
+// @return     Nothing. Goes to the Entry Point passing in the new parameters\r
+//\r
+VOID\r
+EFIAPI\r
+InternalSwitchStackAsm (\r
+  SWITCH_STACK_ENTRY_POINT EntryPoint,\r
+  VOID  *Context,\r
+  VOID  *Context2,\r
+  VOID  *NewStack\r
+  );\r
+**/\r
+InternalSwitchStackAsm\r
+    mov   x29, #0\r
+    mov   x30, x0\r
+    mov   sp, x3\r
+    mov   x0, x1\r
+    mov   x1, x2\r
+    ret\r
+\r
+/**\r
+//\r
+//  Requests CPU to pause for a short period of time.\r
+//\r
+//  Requests CPU to pause for a short period of time. Typically used in MP\r
+//  systems to prevent memory starvation while waiting for a spin lock.\r
+//\r
+VOID\r
+EFIAPI\r
+CpuPause (\r
+  VOID\r
+  )\r
+**/\r
+CpuPause\r
+    nop\r
+    nop\r
+    nop\r
+    nop\r
+    nop\r
+    ret\r
+\r
+  END\r

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index 3c07e6bad977b7a1530051247a26d6b05274977e..80d00ebed75ba00e25a257d3542e00f92cf5cccc 100644 (file)
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -867,6 +867,14 @@
   AArch64/SetJumpLongJump.S         | GCC\r
   AArch64/CpuBreakpoint.S           | GCC\r
 \r
+  AArch64/MemoryFence.asm           | MSFT\r
+  AArch64/SwitchStack.asm           | MSFT\r
+  AArch64/EnableInterrupts.asm      | MSFT\r
+  AArch64/DisableInterrupts.asm     | MSFT\r
+  AArch64/GetInterruptsState.asm    | MSFT\r
+  AArch64/SetJumpLongJump.asm       | MSFT\r
+  AArch64/CpuBreakpoint.asm         | MSFT\r
+\r
 [Packages]\r
   MdePkg/MdePkg.dec\r
 \r