]> git.proxmox.com Git - mirror_edk2.git/commitdiff
Add flag to make UEFI run from DRAM or FLASH for FVPs
authorOlivier Martin <olivier.martin@arm.com>
Mon, 17 Feb 2014 16:01:41 +0000 (16:01 +0000)
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Mon, 17 Feb 2014 16:01:41 +0000 (16:01 +0000)
- By setting the 'ARM_FVP_RUN_NORFLASH' flag at compile time UEFI will
  be linked to run from NOR FLASH0 on FVPs.
- The RAM load location is currently set to 128MB from base of DRAM.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15245 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.dsc
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf

index e39ce19692f2ebd802978680807c58440da20bf1..789fb58b900f118eb0fde3b64953963efd2ec9e5 100644 (file)
   SKUID_IDENTIFIER               = DEFAULT\r
   FLASH_DEFINITION               = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf\r
 \r
+!ifndef ARM_FVP_RUN_NORFLASH\r
+  DEFINE EDK2_SKIP_PEICORE=1\r
+!endif\r
+\r
+\r
 !include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc\r
 \r
 [LibraryClasses.common]\r
   # Non-Trusted SRAM\r
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000\r
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000\r
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800\r
+  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000\r
 \r
   # System Memory (2GB)\r
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000\r
   #\r
   # PEI Phase modules\r
   #\r
+!ifdef EDK2_SKIP_PEICORE\r
+  # UEFI is placed in RAM by bootloader\r
+  ArmPlatformPkg/PrePi/PeiMPCore.inf {\r
+    <LibraryClasses>\r
+      ArmLib|ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf\r
+      ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf\r
+      ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf\r
+  }\r
+!else\r
+  # UEFI lives in FLASH and copies itself to RAM\r
   ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {\r
     <LibraryClasses>\r
       ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf\r
     <LibraryClasses>\r
       NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
   }\r
+!endif\r
 \r
   #\r
   # DXE\r
index 36bb06a371f5dc03209224103c9bf2ed9bc8b1d3..b9b7c45f75db1aa018a0de5c8ce4644f63d7f778 100644 (file)
@@ -54,7 +54,11 @@ gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
 FV = FVMAIN_SEC\r
 \r
 [FD.FVP_AARCH64_EFI]\r
+!ifdef ARM_FVP_RUN_NORFLASH\r
 BaseAddress   = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in Flash0.\r
+!else\r
+BaseAddress   = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # UEFI in DRAM + 128MB.\r
+!endif\r
 Size          = 0x04000000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the device (64MiB).\r
 ErasePolarity = 1\r
 \r
@@ -212,6 +216,9 @@ READ_STATUS        = TRUE
 READ_LOCK_CAP      = TRUE\r
 READ_LOCK_STATUS   = TRUE\r
 \r
+!if $(EDK2_SKIP_PEICORE) == 1\r
+  INF ArmPlatformPkg/PrePi/PeiMPCore.inf\r
+!else\r
   INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf\r
   INF MdeModulePkg/Core/Pei/PeiMain.inf\r
   INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
@@ -221,6 +228,7 @@ READ_LOCK_STATUS   = TRUE
   INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
+!endif\r
 \r
   FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r