PcAtChipsetPkg PciHostBridgeDxe: Fix build warning with GCC

Add default case to switch blocks to remove GCC compiler warning.
The default case code path should never be taken.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10592 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
index edbe4a03b2a1d9bf2031fda802633724c913c9bc..a33836569b2a47f0858df203e73a391669cbdf53 100644 (file)
--- a/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
+++ b/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c
@@ -914,6 +914,13 @@ RootBridgeIoMemRW (
         case EfiPciWidthUint64:\r
           MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer));\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     } else {\r
       switch (OperationWidth) {\r
@@ -929,6 +936,13 @@ RootBridgeIoMemRW (
         case EfiPciWidthUint64:\r
           *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address);\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     }\r
   }\r
@@ -989,6 +1003,13 @@ RootBridgeIoIoRW (
         case EfiPciWidthUint32:\r
           IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     } else {\r
       switch (OperationWidth) {\r
@@ -1001,6 +1022,13 @@ RootBridgeIoIoRW (
         case EfiPciWidthUint32:\r
           *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     }\r
   }\r
@@ -1074,6 +1102,13 @@ RootBridgeIoPciRW (
         case EfiPciWidthUint32:\r
           PciWrite32 (PcieRegAddr, *((UINT32 *)Uint8Buffer));\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     } else {\r
       switch (OperationWidth) {\r
@@ -1086,6 +1121,13 @@ RootBridgeIoPciRW (
         case EfiPciWidthUint32:\r
           *((UINT32 *)Uint8Buffer) = PciRead32 (PcieRegAddr);\r
           break;\r
+        default:\r
+          //\r
+          // The RootBridgeIoCheckParameter call above will ensure that this\r
+          // path is not taken.\r
+          //\r
+          ASSERT (FALSE);\r
+          break;\r
       }\r
     }\r
   }\r