UefiCpuPkg/FeaturesLib: don't init MCi_CTL/STATUS when MCA's disabled

Today's McaInitialize() doesn't check State value before initialize
MCi_CTL and MCi_STATUS.
The patch fixes this issue by only initializing the two kinds of
MSRs when State is enabled.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index 58dc45aedaf0469490684b370eec8c2022fef1a0..cc64dbbf0a1f2d3e6bc06d642bc353a77d133fd6 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -1,7 +1,7 @@
 /** @file\r
   Machine Check features.\r
 \r
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -140,25 +140,27 @@ McaInitialize (
   MSR_IA32_MCG_CAP_REGISTER  McgCap;\r
   UINT32                     BankIndex;\r
 \r
-  McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);\r
-  for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {\r
-    CPU_REGISTER_TABLE_WRITE64 (\r
-      ProcessorNumber,\r
-      Msr,\r
-      MSR_IA32_MC0_CTL + BankIndex * 4,\r
-      MAX_UINT64\r
-      );\r
-  }\r
-\r
-  if (PcdGetBool (PcdIsPowerOnReset)) {\r
-    for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {\r
+  if (State == TRUE) {\r
+    McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);\r
+    for (BankIndex = 0; BankIndex < (UINT32) McgCap.Bits.Count; BankIndex++) {\r
       CPU_REGISTER_TABLE_WRITE64 (\r
         ProcessorNumber,\r
         Msr,\r
-        MSR_IA32_MC0_STATUS + BankIndex * 4,\r
-        0\r
+        MSR_IA32_MC0_CTL + BankIndex * 4,\r
+        MAX_UINT64\r
         );\r
     }\r
+\r
+    if (PcdGetBool (PcdIsPowerOnReset)) {\r
+      for (BankIndex = 0; BankIndex < (UINTN) McgCap.Bits.Count; BankIndex++) {\r
+        CPU_REGISTER_TABLE_WRITE64 (\r
+          ProcessorNumber,\r
+          Msr,\r
+          MSR_IA32_MC0_STATUS + BankIndex * 4,\r
+          0\r
+          );\r
+      }\r
+    }\r
   }\r
 \r
   return RETURN_SUCCESS;\r