#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# It demos how to use EDKII PCD mechanism to make code more flexible.\r
#\r
-# Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# Note that if the feature is not enabled by setting PcdMemoryProfilePropertyMask,\r
# the application will not display memory profile information.\r
#\r
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# Note that if Variable Dxe/Smm driver doesn't enable the feature by setting PcdVariableCollectStatistics\r
# as TRUE, the application will not display variable statistical information.\r
#\r
-# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gAtaAtapiPassThruDriverBinding\r
# COMPONENT_NAME = gAtaAtapiPassThruComponentName\r
# in UEFI spec 2.2. It installs Block IO and Disk Info protocol for each ATA device\r
# it enumerates and identifies successfully.\r
#\r
-# Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gAtaBusDriverBinding\r
# COMPONENT_NAME = gAtaBusComponentName\r
## @file\r
# This driver enumerates I2C devices on I2C bus and produce I2C IO Protocol on I2C devices.\r
#\r
-# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
# This driver produce I2C Host Protocol on I2C controller handle, enumerate I2C\r
# devices on I2C bus and produce I2C IO Protocol on I2C devices.\r
#\r
-# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
## @file\r
# This driver produce I2C Host Protocol on I2C controller handle.\r
#\r
-# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gIsaBusDriverBinding\r
# COMPONENT_NAME = gIsaBusComponentName\r
# Ps2 Keyboard Driver for UEFI. The keyboard type implemented follows IBM\r
# compatible PS2 protocol using Scan Code Set 1.\r
#\r
-# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializePs2Keyboard\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gKeyboardControllerDriver;\r
# COMPONENT_NAME = gPs2KeyboardComponentName;\r
# COMPONENT_NAME2 = gPs2KeyboardComponentName2;\r
#\r
# This dirver provides support for PS2 based mice.\r
#\r
-# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
ENTRY_POINT = InitializePs2Mouse\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
# DRIVER_BINDING = gPS2MouseDriver;\r
# COMPONENT_NAME = gPs2MouseComponentName;\r
# COMPONENT_NAME2 = gPs2MouseComponentName2;\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gEhciDriverBinding\r
# COMPONENT_NAME = gEhciComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# for Atapi CD ROM device.\r
#\r
# This module discovers CDROM devices in Legacy and native mode and installs block IO ppis for them.\r
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gNvmExpressDriverBinding\r
# COMPONENT_NAME = gNvmExpressComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gPciBusDriverBinding\r
# COMPONENT_NAME = gPciBusComponentName\r
#\r
# Produces the Serial I/O protocol for standard UARTS using Super I/O or PCI I/O.\r
#\r
-# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gSerialControllerDriver\r
# COMPONENT_NAME = gPciSioSerialComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gSataControllerDriverBinding\r
# COMPONENT_NAME = gSataControllerComponentName\r
# It will produce EFI_SD_MMC_PASS_THRU_PROTOCOL to allow sending SD/MMC/eMMC cmds\r
# to specified devices from upper layer.\r
#\r
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gSdMmcPciHcDxeDriverBinding\r
# COMPONENT_NAME = gSdMmcPciHcDxeComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUfsHcDriverBinding\r
# COMPONENT_NAME = gUfsHcComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gUhciDriverBinding\r
# COMPONENT_NAME = gUhciComponentName\r
# It produces gPeiUsbHostControllerPpiGuid based on gPeiUsbControllerPpiGuid which is used\r
# to enable recovery function from USB Drivers.\r
#\r
-# Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gXhciDriverBinding\r
# COMPONENT_NAME = gXhciComponentName\r
# It produces gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid\r
# which is used to enable recovery function from USB Drivers.\r
#\r
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gSCSIBusDriverBinding\r
# COMPONENT_NAME = gScsiBusComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gScsiDiskDriverBinding\r
# COMPONENT_NAME = gScsiDiskComponentName\r
## @file\r
# Description file for the Embedded MMC (eMMC) Peim driver.\r
#\r
-# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# It produces BlockIo, BlockIo2 and StorageSecurity protocols to allow upper layer\r
# access the EMMC device.\r
#\r
-# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gEmmcDxeDriverBinding\r
# COMPONENT_NAME = gEmmcDxeComponentName\r
## @file\r
# Description file for the SD memory card Peim driver.\r
#\r
-# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# It produces BlockIo and BlockIo2 protocols to allow upper layer\r
# access the SD memory card device.\r
#\r
-# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gSdDxeDriverBinding\r
# COMPONENT_NAME = gSdDxeComponentName\r
## @file\r
# Description file for the Universal Flash Storage (UFS) Peim driver.\r
#\r
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUfsPassThruDriverBinding\r
# COMPONENT_NAME = gUfsPassThruComponentName\r
## @file\r
# The Usb mass storage device Peim driver is used to support recovery from USB device.\r
#\r
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = mUsbBusDriverBinding\r
# COMPONENT_NAME = mUsbBusComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gUsbKeyboardDriverBinding\r
# COMPONENT_NAME = gUsbKeyboardComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUSBMassDriverBinding\r
# COMPONENT_NAME = gUsbMassStorageComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUsbMouseAbsolutePointerDriverBinding\r
# COMPONENT_NAME = gUsbMouseAbsolutePointerComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUsbMouseDriverBinding\r
# COMPONENT_NAME = gUsbMouseComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only) AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only) AARCH64\r
#\r
\r
[Sources]\r
X64/VirtualMemory.c\r
X64/DxeLoadFunc.c\r
\r
-[Sources.IPF]\r
- Ipf/DxeLoadFunc.c\r
-\r
[Sources.EBC]\r
Ebc/DxeLoadFunc.c\r
\r
+++ /dev/null
-/** @file\r
- Ipf-specific functionality for DxeLoad.\r
-\r
-Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "DxeIpl.h"\r
-\r
-\r
-\r
-/**\r
- Transfers control to DxeCore.\r
-\r
- This function performs a CPU architecture specific operations to execute\r
- the entry point of DxeCore with the parameters of HobList.\r
- It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
-\r
- @param DxeCoreEntryPoint The entry point of DxeCore.\r
- @param HobList The start of HobList passed to DxeCore.\r
-\r
-**/\r
-VOID\r
-HandOffToDxeCore (\r
- IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
- IN EFI_PEI_HOB_POINTERS HobList\r
- )\r
-{\r
- VOID *BaseOfStack;\r
- VOID *TopOfStack;\r
- VOID *BspStore;\r
- EFI_STATUS Status;\r
-\r
- //\r
- // Allocate 128KB for the Stack\r
- //\r
- BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
- ASSERT (BaseOfStack != NULL);\r
-\r
- //\r
- // Allocate 16KB for the BspStore\r
- //\r
- BspStore = AllocatePages (EFI_SIZE_TO_PAGES (BSP_STORE_SIZE));\r
- ASSERT (BspStore != NULL);\r
- //\r
- // Build BspStoreHob\r
- //\r
- BuildBspStoreHob ((EFI_PHYSICAL_ADDRESS) (UINTN) BspStore, BSP_STORE_SIZE, EfiBootServicesData);\r
-\r
- //\r
- // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
- // for safety.\r
- //\r
- TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
- TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
-\r
- //\r
- // End of PEI phase signal\r
- //\r
- Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
- ASSERT_EFI_ERROR (Status);\r
-\r
- //\r
- // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
- //\r
- UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
-\r
- //\r
- // Transfer the control to the entry point of DxeCore.\r
- //\r
- SwitchStack (\r
- (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
- HobList.Raw,\r
- NULL,\r
- TopOfStack,\r
- BspStore\r
- );\r
-}\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
The variable data structures are related to EDK II-specific implementation of UEFI variables.\r
VariableFormat.h defines variable data headers and variable storage region headers.\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are licensed and made available under\r
the terms and conditions of the BSD License that accompanies this distribution.\r
The full text of the license may be found at\r
///\r
/// Alignment of variable name and data, according to the architecture:\r
/// * For IA-32 and Intel(R) 64 architectures: 1.\r
-/// * For IA-64 architecture: 8.\r
///\r
-#if defined (MDE_CPU_IPF)\r
-#define ALIGNMENT 8\r
-#else\r
#define ALIGNMENT 1\r
-#endif\r
\r
//\r
// GET_PAD_SIZE calculates the miminal pad bytes needed to make the current pad size satisfy the alignment requirement.\r
## @file\r
# Null Platform Hook Library instance.\r
#\r
-# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Null Reset System Library instance that only generates ASSERT() conditions.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Library used for sorting routines.\r
#\r
-# Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved. <BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
LIBRARY_CLASS = SortLib|DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Null instance of CPU Exception Handler Library with empty functions.\r
#\r
-# Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Null instance of Debug Agent Library with empty functions.\r
#\r
-# Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# NULL Dxe Capsule library instance.\r
# It can make core modules pass package level build.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# for memory allocation instead of using UEFI boot services in an indirect way.\r
# It is assumed that this library instance must be linked with DxeCore in this package.\r
#\r
-# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# for memory allocation/profile instead of using UEFI boot services or memory profile protocol in an indirect way.\r
# It is assumed that this library instance must be linked with DxeCore in this package.\r
#\r
-# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 387A2490-81FC-4E7C-8E0A-3E58C30FCD0B\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = NULL|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = NULL|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
CONSTRUCTOR = DxeCrc32GuidedSectionExtractLibConstructor\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 1D564EC9-9373-49a4-9E3F-E4D7B9974C84\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = DebugPrintErrorLevelLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = DebugPrintErrorLevelLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = DxeDebugPrintErrorLevelLibConstructor\r
DESTRUCTOR = DxeDebugPrintErrorLevelLibDestructor\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# This library instance provides DPC service by consuming EFI DPC Protocol.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
FILE_GUID = 38897D86-FF36-4472-AE64-1DB9AE715C81\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = DpcLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = DpcLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = DpcLibConstructor\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 6806C45F-13C4-4274-B8A3-055EF641A060\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = FileExplorerLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = FileExplorerLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = FileExplorerConstructor\r
\r
[Sources]\r
FILE_GUID = ABBAB4CD-EA88-45b9-8234-C8A7450531FC\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = HttpLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = HttpLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# This library instance provides IP services upon EFI IPv4/IPv6 Protocols.\r
#\r
-# Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
FILE_GUID = A302F877-8625-425c-B1EC-7487B62C4FDA\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = IpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = IpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = db6dcef3-9f4e-4340-9351-fc35aa8a5888\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = NetLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = NetLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 8B8B4CCC-65FC-41a5-8067-308B8E42CCF2\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PerformanceLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = PerformanceLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Library instance that implements Print Library class based on protocol gEfiPrint2ProtocolGuid.\r
#\r
-# Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = 55D460DB-8FEA-415a-B95D-70145AE0675C\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PrintLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = PrintLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = PrintLibConstructor\r
\r
[Sources]\r
#\r
# Retrieve status code and report status code in DXE phase.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = EBF144C8-70F5-4e09-ADE2-F41F5C59AFDA\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ReportStatusCodeLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE\r
+ LIBRARY_CLASS = ReportStatusCodeLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 7F61122C-19DF-47c3-BA0D-6C1149E30FA1\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = SecurityManagementLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = SecurityManagementLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = D4608509-1AB0-4cc7-827A-AB8E1E7BD3E6\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = TcpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = TcpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 7E615AA1-41EE-49d4-B7E9-1D7A60AA5C8D\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = UdpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = UdpIoLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# NULL Instance of FmpAuthentication Library.\r
#\r
-# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# LZMA SDK 16.04 was placed in the public domain on 2016-10-04.\r
# It was released on the http://www.7-zip.org/sdk.html website.\r
#\r
-# Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Null instance of PCI Host Bridge Library with empty functions.\r
#\r
-# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are licensed and made available\r
# under the terms and conditions of the BSD License which accompanies this\r
# The following information is for reference only and not required by the build\r
# tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
FILE_GUID = bda39d3a-451b-4350-8266-81ab10fa0523\r
MODULE_TYPE = PEIM\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = DebugLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = DebugLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
## @file\r
# DXE S3 boot script Library.\r
#\r
-# Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are\r
# licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = 57F9967B-26CD-4262-837A-55B8AA158254\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = S3BootScriptLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
+ LIBRARY_CLASS = S3BootScriptLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_DRIVER UEFI_APPLICATION\r
\r
\r
CONSTRUCTOR = S3BootScriptLibInitialize\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Null Platform Hook Library instance with dependency on gPeiSerialPortPpiGuid\r
#\r
-# Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = 621734D8-8B5E-4c01-B330-9F89A1081710\r
MODULE_TYPE = PEIM\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PlatformHookLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = PlatformHookLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE PEIM SEC PEI_CORE UEFI_APPLICATION UEFI_DRIVER\r
MODULE_UNI_FILE = PlatformHookLibSerialPortPpi.uni\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Sample platform variable cleanup library instance.\r
#\r
-# Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions\r
FILE_GUID = 9C9623EB-4EF3-44e0-A931-F3A340D1A0F9\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = PlatformVarCleanupLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = PlatformVarCleanupLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = PlatformVarCleanupLibConstructor\r
DESTRUCTOR = PlatformVarCleanupLibDestructor\r
\r
FILE_GUID = 07D25BBB-F832-41bb-BBA0-612E9F033067\r
MODULE_TYPE = DXE_RUNTIME_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ReportStatusCodeLib|DXE_RUNTIME_DRIVER DXE_SAL_DRIVER\r
+ LIBRARY_CLASS = ReportStatusCodeLib|DXE_RUNTIME_DRIVER\r
CONSTRUCTOR = ReportStatusCodeLibConstructor\r
DESTRUCTOR = ReportStatusCodeLibDestructor\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Provides NULL TPM measurement function.\r
#\r
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
FILE_GUID = 6DFD6E9F-9278-48D8-8F45-B6CFF2C2B69C\r
MODULE_TYPE = UEFI_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = TpmMeasurementLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = TpmMeasurementLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
MODULE_UNI_FILE = TpmMeasurementLibNull.uni\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF\r
+# VALID_ARCHITECTURES = IA32 X64\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# HII Library implementation using UEFI HII protocols and services.\r
#\r
-# Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
FILE_GUID = 3143687A-7C80-404e-B5FE-2D88980E1B1C\r
MODULE_TYPE = UEFI_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = HiiLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = HiiLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 894DC1B6-07A3-4a9d-8CDD-333580B3D4B1\r
MODULE_TYPE = UEFI_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = UefiHiiServicesLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = UefiHiiServicesLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
\r
CONSTRUCTOR = UefiHiiServicesLibConstructor\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
FILE_GUID = 9E8A380A-231E-41E4-AD40-5E706196B853\r
MODULE_TYPE = UEFI_DRIVER\r
VERSION_STRING = 1.0\r
- LIBRARY_CLASS = MemoryAllocationLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
- LIBRARY_CLASS = MemoryProfileLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = MemoryAllocationLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
+ LIBRARY_CLASS = MemoryProfileLib|DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER\r
CONSTRUCTOR = MemoryProfileLibConstructor\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# Library used for sorting routines.\r
#\r
-# Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved. <BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
LIBRARY_CLASS = SortLib|UEFI_APPLICATION UEFI_DRIVER UEFI_DRIVER DXE_RUNTIME_DRIVER DXE_DRIVER\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources.common]\r
## @file\r
# The default logo bitmap picture shown on setup screen, which is corresponding to gEfiDefaultBmpLogoGuid.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
\r
[Binaries]\r
PLATFORM_VERSION = 0.98\r
DSC_SPECIFICATION = 0x00010005\r
OUTPUT_DIRECTORY = Build/MdeModule\r
- SUPPORTED_ARCHITECTURES = IA32|IPF|X64|EBC|ARM|AARCH64\r
+ SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64\r
BUILD_TARGETS = DEBUG|RELEASE|NOOPT\r
SKUID_IDENTIFIER = DEFAULT\r
\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizePopulateCapsule|0x0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|28\r
\r
-[PcdsFixedAtBuild.IPF]\r
- gEfiMdePkgTokenSpaceGuid.PcdIoBlockBaseAddressForIpf|0x0ffffc000000\r
-\r
-###################################################################################################\r
-#\r
-# Components Section - list of the modules and components that will be processed by compilation\r
-# tools and the EDK II tools to generate PE32/PE32+/Coff image files.\r
-#\r
-# Note: The EDK II DSC file is not used to specify how compiled binary images get placed\r
-# into firmware volume images. This section is just a list of modules to compile from\r
-# source into UEFI-compliant binaries.\r
-# It is the FDF file that contains information on combining binary files into firmware\r
-# volume images, whose concept is beyond UEFI and is described in PI specification.\r
-# Binary modules do not need to be listed in this section, as they should be\r
-# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi),\r
-# Logo (Logo.bmp), and etc.\r
-# There may also be modules listed in this section that are not required in the FDF file,\r
-# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be\r
-# generated for it, but the binary will not be put into any firmware volume.\r
-#\r
-###################################################################################################\r
-\r
[Components]\r
MdeModulePkg/Application/HelloWorld/HelloWorld.inf\r
MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.inf\r
MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf\r
MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf\r
\r
-[Components.IA32, Components.X64, Components.IPF, Components.AARCH64]\r
+[Components.IA32, Components.X64, Components.AARCH64]\r
MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
MdeModulePkg/Universal/DebugSupportDxe/DebugSupportDxe.inf\r
MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
MdeModulePkg/Universal/EbcDxe/EbcDebugger.inf\r
MdeModulePkg/Universal/EbcDxe/EbcDebuggerConfig.inf\r
\r
-[Components.IA32, Components.X64, Components.IPF, Components.ARM, Components.AARCH64]\r
+[Components.IA32, Components.X64, Components.ARM, Components.AARCH64]\r
MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf\r
MdeModulePkg/Core/Dxe/DxeMain.inf {\r
<LibraryClasses>\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
\r
[Sources]\r
CapsuleService.c\r
CapsuleService.h\r
\r
-[Sources.Ia32, Sources.IPF, Sources.EBC]\r
+[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64]\r
SaveLongModeContext.c\r
CapsuleReset.c\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gConPlatformTextInDriverBinding\r
# COMPONENT_NAME = gConPlatformComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gConSplitterConInDriverBinding\r
# COMPONENT_NAME = gConSplitterConInComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gGraphicsConsoleDriverBinding\r
# COMPONENT_NAME = gGraphicsConsoleComponentName\r
# protocols based on Serial I/O protocol for serial devices including hotplug serial\r
# devices.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gTerminalDriverBinding\r
# COMPONENT_NAME = gTerminalComponentName\r
# This driver binds exclusively to a standard UART serial port on the controller handle,\r
# and initializes serial Io interface, publishs Debug Port and Device Path Protocol.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gDebugPortDriverBinding\r
# COMPONENT_NAME = gDebugPortComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF\r
+# VALID_ARCHITECTURES = IA32 X64\r
#\r
\r
[Sources]\r
X64/PlDebugSupportX64.c\r
X64/AsmFuncs.nasm\r
\r
-[Sources.IPF]\r
- Ipf/PlDebugSupport.h\r
- Ipf/PlDebugSupport.c\r
- Ipf/Ds64Macros.i\r
- Ipf/Common.i\r
- Ipf/AsmFuncs.s\r
-\r
-\r
[Packages]\r
MdePkg/MdePkg.dec\r
MdeModulePkg/MdeModulePkg.dec\r
+++ /dev/null
-/// @file\r
-/// Low level IPF routines used by the debug support driver\r
-///\r
-/// Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
-/// This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-///\r
-\r
-\r
-#include "Common.i"\r
-#include "Ds64Macros.i"\r
-\r
-ASM_GLOBAL PatchSaveBuffer\r
-ASM_GLOBAL IpfContextBuf\r
-ASM_GLOBAL CommonHandler\r
-ASM_GLOBAL ExternalInterruptCount\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// InstructionCacheFlush\r
-//\r
-// Description:\r
-// Flushes instruction cache for specified number of bytes\r
-//\r
- ASM_GLOBAL InstructionCacheFlush\r
- .proc InstructionCacheFlush\r
- .align 32\r
-InstructionCacheFlush::\r
- { .mii\r
- alloc r3=2, 0, 0, 0\r
- cmp4.leu p0,p6=32, r33;;\r
- (p6) mov r33=32;;\r
- }\r
- { .mii\r
- nop.m 0\r
- zxt4 r29=r33;;\r
- dep.z r30=r29, 0, 5;;\r
- }\r
- { .mii\r
- cmp4.eq p0,p7=r0, r30\r
- shr.u r28=r29, 5;;\r
- (p7) adds r28=1, r28;;\r
- }\r
- { .mii\r
- nop.m 0\r
- shl r27=r28, 5;;\r
- zxt4 r26=r27;;\r
- }\r
- { .mfb\r
- add r31=r26, r32\r
- nop.f 0\r
- nop.b 0\r
- }\r
-LoopBack: // $L143:\r
- { .mii\r
- fc r32\r
- adds r32=32, r32;;\r
- cmp.ltu p14,p15=r32, r31\r
- }\r
- { .mfb\r
- nop.m 0\r
- nop.f 0\r
- //(p14) br.cond.dptk.few $L143#;;\r
- (p14) br.cond.dptk.few LoopBack;;\r
- }\r
- { .mmi\r
- sync.i;;\r
- srlz.i\r
- nop.i 0;;\r
- }\r
- { .mfb\r
- nop.m 0\r
- nop.f 0\r
- br.ret.sptk.few b0;;\r
- }\r
- .endp InstructionCacheFlush\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// ChainHandler\r
-//\r
-// Description:\r
-// Chains an interrupt handler\r
-//\r
-// The purpose of this function is to enable chaining of the external interrupt.\r
-// Since there's no clean SAL abstraction for doing this, we must do it\r
-// surreptitiously.\r
-//\r
-// The reserved IVT entry at offset 0x3400 is coopted for use by this handler.\r
-// According to Itanium architecture, it is reserved. Strictly speaking, this is\r
-// not safe, as we're cheating and violating the Itanium architecture. However,\r
-// as long as we're the only ones cheating, we should be OK. Without hooks in\r
-// the SAL to enable IVT management, there aren't many good options.\r
-//\r
-// The strategy is to replace the first bundle of the external interrupt handler\r
-// with our own that will branch into a piece of code we've supplied and located\r
-// in the reserved IVT entry. Only the first bundle of the external interrupt\r
-// IVT entry is modified.\r
-//\r
-// The original bundle is moved and relocated to space\r
-// allocated within the reserved IVT entry. The next bundle following is\r
-// is generated to go a hard coded branch back to the second bundle of the\r
-// external interrupt IVT entry just in case the first bundle had no branch.\r
-//\r
-// Our new code will execute our handler, and then fall through to the\r
-// original bundle after restoring all context appropriately.\r
-//\r
-// The following is a representation of what the IVT memory map looks like with\r
-// our chained handler installed:\r
-//\r
-//\r
-//\r
-//\r
-//\r
-// This IVT entry is Failsafe bundle\r
-// reserved by the\r
-// Itanium architecture Original bundle 0\r
-// and is used for\r
-// for locating our\r
-// handler and the\r
-// original bundle Patch code...\r
-// zero of the ext\r
-// interrupt handler\r
-//\r
-// RSVD (3400) Unused\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-//\r
-// EXT_INT (3000) Bundle 0 Bundle zero - This one is\r
-// modified, all other bundles\r
-// in the EXT_INT entry are\r
-// untouched.\r
-//\r
-//\r
-// Arguments:\r
-//\r
-// Returns:\r
-//\r
-// Notes:\r
-//\r
-//\r
- ASM_GLOBAL ChainHandler\r
- .proc ChainHandler\r
-ChainHandler:\r
-\r
- NESTED_SETUP( 0,2+3,3,0 )\r
-\r
- mov r8=1 // r8 = success\r
- mov r2=cr.iva;;\r
-//\r
-// NOTE: There's a potential hazard here in that we're simply stealing a bunch of\r
-// bundles (memory) from the IVT and assuming there's no catastrophic side effect.\r
-//\r
-// First, save IVT area we're taking over with the patch so we can restore it later\r
-//\r
- addl out0=PATCH_ENTRY_OFFSET, r2 // out0 = source buffer\r
- movl out1=PatchSaveBuffer // out1 = destination buffer\r
- mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-// Next, copy the patch code into the IVT\r
- movl out0=PatchCode // out0 = source buffer of patch code\r
- addl out1=PATCH_OFFSET, r2 // out1 = destination buffer - in IVT\r
- mov out2=PATCH_CODE_SIZE;; \r
- shr out2=out2, 4;; // out2 = number of bundles to copy\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-\r
-// copy original bundle 0 from the external interrupt handler to the\r
-// appropriate place in the reserved IVT interrupt slot\r
- addl out0=EXT_INT_ENTRY_OFFSET, r2 // out0 = source buffer\r
- addl out1=RELOCATED_EXT_INT, r2 // out1 = destination buffer - in reserved IVT\r
- mov out2=1;; // out2 = copy 1 bundle\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-// Now relocate it there because it very likely had a branch instruction that\r
-// that must now be fixed up.\r
- addl out0=RELOCATED_EXT_INT, r2 // out0 = new runtime address of bundle - in reserved IVT\r
- addl out1=EXT_INT_ENTRY_OFFSET, r2;;// out1 = IP address of previous location\r
- mov out2=out0;; // out2 = IP address of new location\r
- br.call.sptk.few b0 = RelocateBundle\r
-\r
-// Now copy into the failsafe branch into the next bundle just in case\r
-// the original ext int bundle 0 bundle did not contain a branch instruction\r
- movl out0=FailsafeBranch // out0 = source buffer\r
- addl out1=FAILSAFE_BRANCH_OFFSET, r2 // out1 = destination buffer - in reserved IVT\r
- mov out2=1;; // out2 = copy 1 bundle\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-// Last, copy in our replacement for the external interrupt IVT entry bundle 0\r
- movl out0=PatchCodeNewBun0 // out0 = source buffer - our replacement bundle 0\r
- addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - bundle 0 of External interrupt entry\r
- mov out2=1;; // out2 = copy 1 bundle\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-ChainHandlerDone:\r
- NESTED_RETURN\r
-\r
- .endp ChainHandler\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// UnchainHandler\r
-//\r
-// Description:\r
-// Unchains an interrupt handler\r
-//\r
-// Arguments:\r
-//\r
-// Returns:\r
-//\r
-// Notes:\r
-//\r
-//\r
- ASM_GLOBAL UnchainHandler\r
- .proc UnchainHandler\r
-\r
-UnchainHandler:\r
-\r
- NESTED_SETUP( 0,2+3,3,0 )\r
-\r
- mov r8=1 // r8 = success\r
- mov r2=cr.iva;; // r2 = interrupt vector address\r
-\r
-// First copy original Ext Int bundle 0 back to it's proper home...\r
- addl out0=RELOCATED_EXT_INT, r2 // out0 = source - in reserved IVT\r
- addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - first bundle of Ext Int entry\r
- mov out2=1;; // out2 = copy 1 bundle\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-// Now, relocate it again...\r
- addl out0=EXT_INT_ENTRY_OFFSET, r2 // out1 = New runtime address\r
- addl out1=RELOCATED_EXT_INT, r2;; // out0 = IP address of previous location\r
- mov out2=out0;; // out2 = IP address of new location\r
- br.call.sptk.few b0 = RelocateBundle\r
-\r
-// Last, restore the patch area\r
- movl out0=PatchSaveBuffer // out0 = source buffer\r
- addl out1=PATCH_ENTRY_OFFSET, r2 // out1 = destination buffer\r
- mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry\r
- br.call.sptk.few b0 = CopyBundles\r
-\r
-UnchainHandlerDone:\r
- NESTED_RETURN\r
-\r
- .endp UnchainHandler\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// CopyBundles\r
-//\r
-// Description:\r
-// Copies instruction bundles - flushes icache as necessary\r
-//\r
-// Arguments:\r
-// in0 - Bundle source\r
-// in1 - Bundle destination\r
-// in2 - Bundle count\r
-//\r
-// Returns:\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
- .proc CopyBundles\r
-\r
-CopyBundles:\r
-\r
- NESTED_SETUP(3,2+1,0,0)\r
-\r
- shl in2=in2, 1;; // in2 = count of 8 byte blocks to copy\r
-\r
-CopyBundlesLoop:\r
-\r
- cmp.eq p14, p15 = 0, in2;; // Check if done\r
-(p14) br.sptk.few CopyBundlesDone;;\r
-\r
- ld8 loc2=[in0], 0x8;; // loc2 = source bytes\r
- st8 [in1]=loc2;; // [in1] = destination bytes\r
- fc in1;; // Flush instruction cache\r
- sync.i;; // Ensure local and remote data/inst caches in sync\r
- srlz.i;; // Ensure sync has been observed\r
- add in1=0x8, in1;; // in1 = next destination\r
- add in2=-1, in2;; // in2 = decrement 8 bytes blocks to copy\r
- br.sptk.few CopyBundlesLoop;;\r
-\r
-CopyBundlesDone:\r
- NESTED_RETURN\r
-\r
- .endp CopyBundles\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// RelocateBundle\r
-//\r
-// Description:\r
-// Relocates an instruction bundle by updating any ip-relative branch instructions.\r
-//\r
-// Arguments:\r
-// in0 - Runtime address of bundle\r
-// in1 - IP address of previous location of bundle\r
-// in2 - IP address of new location of bundle\r
-//\r
-// Returns:\r
-// in0 - 1 if successful or 0 if unsuccessful\r
-//\r
-// Notes:\r
-// This routine examines all slots in the given bundle that are destined for the\r
-// branch execution unit. If any of these slots contain an IP-relative branch\r
-// namely instructions B1, B2, B3, or B6, the slot is fixed-up with a new relative\r
-// address. Errors can occur if a branch cannot be reached.\r
-//\r
- .proc RelocateBundle\r
-\r
-RelocateBundle:\r
-\r
- NESTED_SETUP(3,2+4,3,0)\r
-\r
- mov loc2=SLOT0 // loc2 = slot index\r
- mov loc5=in0;; // loc5 = runtime address of bundle\r
- mov in0=1;; // in0 = success\r
-\r
-RelocateBundleNextSlot:\r
-\r
- cmp.ge p14, p15 = SLOT2, loc2;; // Check if maximum slot\r
-(p15) br.sptk.few RelocateBundleDone\r
-\r
- mov out0=loc5;; // out0 = runtime address of bundle\r
- br.call.sptk.few b0 = GetTemplate\r
- mov loc3=out0;; // loc3 = instruction template\r
- mov out0=loc5 // out0 = runtime address of bundle\r
- mov out1=loc2;; // out1 = instruction slot number\r
- br.call.sptk.few b0 = GetSlot\r
- mov loc4=out0;; // loc4 = instruction encoding\r
- mov out0=loc4 // out0 = instuction encoding\r
- mov out1=loc2 // out1 = instruction slot number\r
- mov out2=loc3;; // out2 = instruction template\r
- br.call.sptk.few b0 = IsSlotBranch\r
- cmp.eq p14, p15 = 1, out0;; // Check if branch slot\r
-(p15) add loc2=1,loc2 // Increment slot\r
-(p15) br.sptk.few RelocateBundleNextSlot\r
- mov out0=loc4 // out0 = instuction encoding\r
- mov out1=in1 // out1 = IP address of previous location\r
- mov out2=in2;; // out2 = IP address of new location\r
- br.call.sptk.few b0 = RelocateSlot\r
- cmp.eq p14, p15 = 1, out1;; // Check if relocated slot\r
-(p15) mov in0=0 // in0 = failure\r
-(p15) br.sptk.few RelocateBundleDone\r
- mov out2=out0;; // out2 = instruction encoding\r
- mov out0=loc5 // out0 = runtime address of bundle\r
- mov out1=loc2;; // out1 = instruction slot number\r
- br.call.sptk.few b0 = SetSlot\r
- add loc2=1,loc2;; // Increment slot\r
- br.sptk.few RelocateBundleNextSlot\r
-\r
-RelocateBundleDone:\r
- NESTED_RETURN\r
-\r
- .endp RelocateBundle\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// RelocateSlot\r
-//\r
-// Description:\r
-// Relocates an instruction bundle by updating any ip-relative branch instructions.\r
-//\r
-// Arguments:\r
-// in0 - Instruction encoding (41-bits, right justified)\r
-// in1 - IP address of previous location of bundle\r
-// in2 - IP address of new location of bundle\r
-//\r
-// Returns:\r
-// in0 - Instruction encoding (41-bits, right justified)\r
-// in1 - 1 if successful otherwise 0\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
- .proc RelocateSlot\r
-\r
-RelocateSlot:\r
- NESTED_SETUP(3,2+5,0,0)\r
- extr.u loc2=in0, 37, 4;; // loc2 = instruction opcode\r
- cmp.eq p14, p15 = 4, loc2;; // IP-relative branch (B1) or\r
- // IP-relative counted branch (B2)\r
-(p15) cmp.eq p14, p15 = 5, loc2;; // IP-relative call (B3)\r
-(p15) cmp.eq p14, p15 = 7, loc2;; // IP-relative predict (B6)\r
-(p15) mov in1=1 // Instruction did not need to be reencoded\r
-(p15) br.sptk.few RelocateSlotDone\r
- tbit.nz p14, p15 = in0, 36;; // put relative offset sign bit in p14\r
- extr.u loc2=in0, 13, 20;; // loc2 = relative offset in instruction\r
-(p14) movl loc3=0xfffffffffff00000;; // extend sign\r
-(p14) or loc2=loc2, loc3;;\r
- shl loc2=loc2,4;; // convert to byte offset instead of bundle offset\r
- add loc3=loc2, in1;; // loc3 = physical address of branch target\r
-(p14) sub loc2=r0,loc2;; // flip sign in loc2 if offset is negative\r
- sub loc4=loc3,in2;; // loc4 = relative offset from new ip to branch target\r
- cmp.lt p15, p14 = 0, loc4;; // get new sign bit\r
-(p14) sub loc5=r0,loc4 // get absolute value of offset\r
-(p15) mov loc5=loc4;;\r
- movl loc6=0x0FFFFFF;; // maximum offset in bytes for ip-rel branch\r
- cmp.gt p14, p15 = loc5, loc6;; // check to see we're not out of range for an ip-relative branch\r
-(p14) br.sptk.few RelocateSlotError\r
- cmp.lt p15, p14 = 0, loc4;; // store sign in p14 again\r
-(p14) dep in0=-1,in0,36,1 // store sign bit in instruction\r
-(p15) dep in0=0,in0,36,1\r
- shr loc4=loc4, 4;; // convert back to bundle offset\r
- dep in0=loc4,in0,13,16;; // put first 16 bits of new offset into instruction\r
- shr loc4=loc4,16;;\r
- dep in0=loc4,in0,13+16,4 // put last 4 bits of new offset into instruction\r
- mov in1=1;; // in1 = success\r
- br.sptk.few RelocateSlotDone;;\r
-\r
-RelocateSlotError:\r
- mov in1=0;; // in1 = failure\r
-\r
-RelocateSlotDone:\r
- NESTED_RETURN\r
-\r
- .endp RelocateSlot\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// IsSlotBranch\r
-//\r
-// Description:\r
-// Determines if the given instruction is a branch instruction.\r
-//\r
-// Arguments:\r
-// in0 - Instruction encoding (41-bits, right justified)\r
-// in1 - Instruction slot number\r
-// in2 - Bundle template\r
-//\r
-// Returns:\r
-// in0 - 1 if branch or 0 if not branch\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
-// IsSlotBranch recognizes all branch instructions by looking at the provided template.\r
-// The instruction encoding is only passed to this routine for future expansion.\r
-//\r
- .proc IsSlotBranch\r
-\r
-IsSlotBranch:\r
-\r
- NESTED_SETUP (3,2+0,0,0)\r
-\r
- mov in0=1;; // in0 = 1 which destroys the instruction\r
- andcm in2=in2,in0;; // in2 = even template to reduce compares\r
- mov in0=0;; // in0 = not a branch\r
- cmp.eq p14, p15 = 0x16, in2;; // Template 0x16 is BBB\r
-(p14) br.sptk.few IsSlotBranchTrue\r
- cmp.eq p14, p15 = SLOT0, in1;; // Slot 0 has no other possiblities\r
-(p14) br.sptk.few IsSlotBranchDone\r
- cmp.eq p14, p15 = 0x12, in2;; // Template 0x12 is MBB\r
-(p14) br.sptk.few IsSlotBranchTrue\r
- cmp.eq p14, p15 = SLOT1, in1;; // Slot 1 has no other possiblities\r
-(p14) br.sptk.few IsSlotBranchDone\r
- cmp.eq p14, p15 = 0x10, in2;; // Template 0x10 is MIB\r
-(p14) br.sptk.few IsSlotBranchTrue\r
- cmp.eq p14, p15 = 0x18, in2;; // Template 0x18 is MMB\r
-(p14) br.sptk.few IsSlotBranchTrue\r
- cmp.eq p14, p15 = 0x1C, in2;; // Template 0x1C is MFB\r
-(p14) br.sptk.few IsSlotBranchTrue\r
- br.sptk.few IsSlotBranchDone\r
-\r
-IsSlotBranchTrue:\r
- mov in0=1;; // in0 = branch\r
-\r
-IsSlotBranchDone:\r
- NESTED_RETURN\r
-\r
- .endp IsSlotBranch\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// GetTemplate\r
-//\r
-// Description:\r
-// Retrieves the instruction template for an instruction bundle\r
-//\r
-// Arguments:\r
-// in0 - Runtime address of bundle\r
-//\r
-// Returns:\r
-// in0 - Instruction template (5-bits, right-justified)\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
- .proc GetTemplate\r
-\r
-GetTemplate:\r
-\r
- NESTED_SETUP (1,2+2,0,0)\r
-\r
- ld8 loc2=[in0], 0x8 // loc2 = first 8 bytes of branch bundle\r
- movl loc3=MASK_0_4;; // loc3 = template mask\r
- and loc2=loc2,loc3;; // loc2 = template, right justified\r
- mov in0=loc2;; // in0 = template, right justified\r
-\r
- NESTED_RETURN\r
-\r
- .endp GetTemplate\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// GetSlot\r
-//\r
-// Description:\r
-// Gets the instruction encoding for an instruction slot and bundle\r
-//\r
-// Arguments:\r
-// in0 - Runtime address of bundle\r
-// in1 - Instruction slot (either 0, 1, or 2)\r
-//\r
-// Returns:\r
-// in0 - Instruction encoding (41-bits, right justified)\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
-// Slot0 - [in0 + 0x8] Bits 45-5\r
-// Slot1 - [in0 + 0x8] Bits 63-46 and [in0] Bits 22-0\r
-// Slot2 - [in0] Bits 63-23\r
-//\r
- .proc GetSlot\r
-\r
-GetSlot:\r
- NESTED_SETUP (2,2+3,0,0)\r
-\r
- ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of branch bundle\r
- ld8 loc3=[in0];; // loc3 = second 8 bytes of branch bundle\r
- cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified\r
- (p14) br.cond.sptk.few GetSlot2;; // get slot 2\r
- cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified\r
- (p14) br.cond.sptk.few GetSlot1;; // get slot 1\r
-\r
-GetSlot0:\r
- extr.u in0=loc2, 5, 45 // in0 = extracted slot 0\r
- br.sptk.few GetSlotDone;;\r
-\r
-GetSlot1:\r
- extr.u in0=loc2, 46, 18 // in0 = bits 63-46 of loc2 right-justified\r
- extr.u loc4=loc3, 0, 23;; // loc4 = bits 22-0 of loc3 right-justified\r
- dep in0=loc4, in0, 18, 15;;\r
- shr.u loc4=loc4,15;;\r
- dep in0=loc4, in0, 33, 8;; // in0 = extracted slot 1\r
- br.sptk.few GetSlotDone;;\r
-\r
-GetSlot2:\r
- extr.u in0=loc3, 23, 41;; // in0 = extracted slot 2\r
-\r
-GetSlotDone:\r
- NESTED_RETURN\r
-\r
- .endp GetSlot\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// SetSlot\r
-//\r
-// Description:\r
-// Sets the instruction encoding for an instruction slot and bundle\r
-//\r
-// Arguments:\r
-// in0 - Runtime address of bundle\r
-// in1 - Instruction slot (either 0, 1, or 2)\r
-// in2 - Instruction encoding (41-bits, right justified)\r
-//\r
-// Returns:\r
-//\r
-// Notes:\r
-// This procedure is a leaf routine\r
-//\r
- .proc SetSlot\r
-\r
-SetSlot:\r
- NESTED_SETUP (3,2+3,0,0)\r
-\r
- ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of bundle\r
- ld8 loc3=[in0];; // loc3 = second 8 bytes of bundle\r
- cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified\r
- (p14) br.cond.sptk.few SetSlot2;; // set slot 2\r
- cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified\r
- (p14) br.cond.sptk.few SetSlot1;; // set slot 1\r
-\r
-SetSlot0:\r
- dep loc2=0, loc2, 5, 41;; // remove old instruction from slot 0\r
- shl loc4=in2, 5;; // loc4 = new instruction ready to be inserted\r
- or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle\r
- add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle\r
- st8 [loc4]=loc2 // [loc4] = updated bundle\r
- br.sptk.few SetSlotDone;;\r
- ;;\r
-\r
-SetSlot1:\r
- dep loc2=0, loc2, 46, 18 // remove old instruction from slot 1\r
- dep loc3=0, loc3, 0, 23;;\r
- shl loc4=in2, 46;; // loc4 = partial instruction ready to be inserted\r
- or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle\r
- add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle\r
- st8 [loc4]=loc2;; // [loc4] = updated bundle\r
- shr.u loc4=in2, 18;; // loc4 = partial instruction ready to be inserted\r
- or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle\r
- st8 [in0]=loc3;; // [in0] = updated bundle\r
- br.sptk.few SetSlotDone;;\r
-\r
-SetSlot2:\r
- dep loc3=0, loc3, 23, 41;; // remove old instruction from slot 2\r
- shl loc4=in2, 23;; // loc4 = instruction ready to be inserted\r
- or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle\r
- st8 [in0]=loc3;; // [in0] = updated bundle\r
-\r
-SetSlotDone:\r
-\r
- NESTED_RETURN\r
- .endp SetSlot\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// GetIva\r
-//\r
-// Description:\r
-// C callable function to obtain the current value of IVA\r
-//\r
-// Returns:\r
-// Current value if IVA\r
-\r
- ASM_GLOBAL GetIva\r
- .proc GetIva\r
-GetIva:\r
- mov r8=cr2;;\r
- br.ret.sptk.many b0\r
-\r
- .endp GetIva\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// ProgramInterruptFlags\r
-//\r
-// Description:\r
-// C callable function to enable/disable interrupts\r
-//\r
-// Returns:\r
-// Previous state of psr.ic\r
-//\r
- ASM_GLOBAL ProgramInterruptFlags\r
- .proc ProgramInterruptFlags\r
-ProgramInterruptFlags:\r
- alloc loc0=1,2,0,0;;\r
- mov loc0=psr\r
- mov loc1=0x6000;;\r
- and r8=loc0, loc1 // obtain current psr.ic and psr.i state\r
- and in0=in0, loc1 // insure no extra bits set in input\r
- andcm loc0=loc0,loc1;; // clear original psr.i and psr.ic\r
- or loc0=loc0,in0;; // OR in new psr.ic value\r
- mov psr.l=loc0;; // write new psr\r
- srlz.d\r
- br.ret.sptk.many b0 // return\r
-\r
- .endp ProgramInterruptFlags\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// SpillContext\r
-//\r
-// Description:\r
-// Saves system context to context record.\r
-//\r
-// Arguments:\r
-// in0 = 512 byte aligned context record address\r
-// in1 = original B0\r
-// in2 = original ar.bsp\r
-// in3 = original ar.bspstore\r
-// in4 = original ar.rnat\r
-// in5 = original ar.pfs\r
-//\r
-// Notes:\r
-// loc0 - scratch\r
-// loc1 - scratch\r
-// loc2 - temporary application unat storage\r
-// loc3 - temporary exception handler unat storage\r
-\r
- .proc SpillContext\r
-\r
-SpillContext:\r
- alloc loc0=6,4,0,0;; // alloc 6 input, 4 locals, 0 outs\r
- mov loc2=ar.unat;; // save application context unat (spilled later)\r
- mov ar.unat=r0;; // set UNAT=0\r
- st8.spill [in0]=r0,8;;\r
- st8.spill [in0]=r1,8;; // save R1 - R31\r
- st8.spill [in0]=r2,8;;\r
- st8.spill [in0]=r3,8;;\r
- st8.spill [in0]=r4,8;;\r
- st8.spill [in0]=r5,8;;\r
- st8.spill [in0]=r6,8;;\r
- st8.spill [in0]=r7,8;;\r
- st8.spill [in0]=r8,8;;\r
- st8.spill [in0]=r9,8;;\r
- st8.spill [in0]=r10,8;;\r
- st8.spill [in0]=r11,8;;\r
- st8.spill [in0]=r12,8;;\r
- st8.spill [in0]=r13,8;;\r
- st8.spill [in0]=r14,8;;\r
- st8.spill [in0]=r15,8;;\r
- st8.spill [in0]=r16,8;;\r
- st8.spill [in0]=r17,8;;\r
- st8.spill [in0]=r18,8;;\r
- st8.spill [in0]=r19,8;;\r
- st8.spill [in0]=r20,8;;\r
- st8.spill [in0]=r21,8;;\r
- st8.spill [in0]=r22,8;;\r
- st8.spill [in0]=r23,8;;\r
- st8.spill [in0]=r24,8;;\r
- st8.spill [in0]=r25,8;;\r
- st8.spill [in0]=r26,8;;\r
- st8.spill [in0]=r27,8;;\r
- st8.spill [in0]=r28,8;;\r
- st8.spill [in0]=r29,8;;\r
- st8.spill [in0]=r30,8;;\r
- st8.spill [in0]=r31,8;;\r
- mov loc3=ar.unat;; // save debugger context unat (spilled later)\r
- stf.spill [in0]=f2,16;; // save f2 - f31\r
- stf.spill [in0]=f3,16;;\r
- stf.spill [in0]=f4,16;;\r
- stf.spill [in0]=f5,16;;\r
- stf.spill [in0]=f6,16;;\r
- stf.spill [in0]=f7,16;;\r
- stf.spill [in0]=f8,16;;\r
- stf.spill [in0]=f9,16;;\r
- stf.spill [in0]=f10,16;;\r
- stf.spill [in0]=f11,16;;\r
- stf.spill [in0]=f12,16;;\r
- stf.spill [in0]=f13,16;;\r
- stf.spill [in0]=f14,16;;\r
- stf.spill [in0]=f15,16;;\r
- stf.spill [in0]=f16,16;;\r
- stf.spill [in0]=f17,16;;\r
- stf.spill [in0]=f18,16;;\r
- stf.spill [in0]=f19,16;;\r
- stf.spill [in0]=f20,16;;\r
- stf.spill [in0]=f21,16;;\r
- stf.spill [in0]=f22,16;;\r
- stf.spill [in0]=f23,16;;\r
- stf.spill [in0]=f24,16;;\r
- stf.spill [in0]=f25,16;;\r
- stf.spill [in0]=f26,16;;\r
- stf.spill [in0]=f27,16;;\r
- stf.spill [in0]=f28,16;;\r
- stf.spill [in0]=f29,16;;\r
- stf.spill [in0]=f30,16;;\r
- stf.spill [in0]=f31,16;;\r
- mov loc0=pr;; // save predicates\r
- st8.spill [in0]=loc0,8;;\r
- st8.spill [in0]=in1,8;; // save b0 - b7... in1 already equals saved b0\r
- mov loc0=b1;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b2;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b3;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b4;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b5;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b6;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=b7;;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.rsc;; // save ar.rsc\r
- st8.spill [in0]=loc0,8;;\r
- st8.spill [in0]=in2,8;; // save ar.bsp (in2)\r
- st8.spill [in0]=in3,8;; // save ar.bspstore (in3)\r
- st8.spill [in0]=in4,8;; // save ar.rnat (in4)\r
- mov loc0=ar.fcr;; // save ar.fcr (ar21 - IA32 floating-point control register)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.eflag;; // save ar.eflag (ar24)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.csd;; // save ar.csd (ar25 - ia32 CS descriptor)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.ssd;; // save ar.ssd (ar26 - ia32 ss descriptor)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.cflg;; // save ar.cflg (ar27 - ia32 cr0 and cr4)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.fsr;; // save ar.fsr (ar28 - ia32 floating-point status register)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.fir;; // save ar.fir (ar29 - ia32 floating-point instruction register)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.fdr;; // save ar.fdr (ar30 - ia32 floating-point data register)\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.ccv;; // save ar.ccv\r
- st8.spill [in0]=loc0,8;;\r
- st8.spill [in0]=loc2,8;; // save ar.unat (saved to loc2 earlier)\r
- mov loc0=ar.fpsr;; // save floating point status register\r
- st8.spill [in0]=loc0,8;;\r
- st8.spill [in0]=in5,8;; // save ar.pfs\r
- mov loc0=ar.lc;; // save ar.lc\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ar.ec;; // save ar.ec\r
- st8.spill [in0]=loc0,8;;\r
-\r
- // save control registers\r
- mov loc0=cr.dcr;; // save dcr\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.itm;; // save itm\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.iva;; // save iva\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.pta;; // save pta\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.ipsr;; // save ipsr\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.isr;; // save isr\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.iip;; // save iip\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.ifa;; // save ifa\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.itir;; // save itir\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.iipa;; // save iipa\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.ifs;; // save ifs\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.iim;; // save iim\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=cr.iha;; // save iha\r
- st8.spill [in0]=loc0,8;;\r
-\r
- // save debug registers\r
- mov loc0=dbr[r0];; // save dbr0 - dbr7\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=1;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=2;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=3;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=4;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=5;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=6;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=7;;\r
- mov loc0=dbr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- mov loc0=ibr[r0];; // save ibr0 - ibr7\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=1;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=2;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=3;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=4;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=5;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=6;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- movl loc1=7;;\r
- mov loc0=ibr[loc1];;\r
- st8.spill [in0]=loc0,8;;\r
- st8.spill [in0]=loc3;;\r
-\r
- br.ret.sptk.few b0\r
-\r
- .endp SpillContext\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// FillContext\r
-//\r
-// Description:\r
-// Restores register context from context record.\r
-//\r
-// Arguments:\r
-// in0 = address of last element 512 byte aligned context record address\r
-// in1 = modified B0\r
-// in2 = modified ar.bsp\r
-// in3 = modified ar.bspstore\r
-// in4 = modified ar.rnat\r
-// in5 = modified ar.pfs\r
-//\r
-// Notes:\r
-// loc0 - scratch\r
-// loc1 - scratch\r
-// loc2 - temporary application unat storage\r
-// loc3 - temporary exception handler unat storage\r
-\r
- .proc FillContext\r
-FillContext:\r
- alloc loc0=6,4,0,0;; // alloc 6 inputs, 4 locals, 0 outs\r
- ld8.fill loc3=[in0],-8;; // int_nat (nat bits for R1-31)\r
- movl loc1=7;; // ibr7\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=6;; // ibr6\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=5;; // ibr5\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=4;; // ibr4\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=3;; // ibr3\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=2;; // ibr2\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- movl loc1=1;; // ibr1\r
- ld8.fill loc0=[in0],-8;;\r
- mov ibr[loc1]=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ibr0\r
- mov ibr[r0]=loc0;;\r
- movl loc1=7;; // dbr7\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=6;; // dbr6\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=5;; // dbr5\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=4;; // dbr4\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=3;; // dbr3\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=2;; // dbr2\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- movl loc1=1;; // dbr1\r
- ld8.fill loc0=[in0],-8;;\r
- mov dbr[loc1]=loc0;;\r
- ld8.fill loc0=[in0],-8;; // dbr0\r
- mov dbr[r0]=loc0;;\r
- ld8.fill loc0=[in0],-8;; // iha\r
- mov cr.iha=loc0;;\r
- ld8.fill loc0=[in0],-8;; // iim\r
- mov cr.iim=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ifs\r
- mov cr.ifs=loc0;;\r
- ld8.fill loc0=[in0],-8;; // iipa\r
- mov cr.iipa=loc0;;\r
- ld8.fill loc0=[in0],-8;; // itir\r
- mov cr.itir=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ifa\r
- mov cr.ifa=loc0;;\r
- ld8.fill loc0=[in0],-8;; // iip\r
- mov cr.iip=loc0;;\r
- ld8.fill loc0=[in0],-8;; // isr\r
- mov cr.isr=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ipsr\r
- mov cr.ipsr=loc0;;\r
- ld8.fill loc0=[in0],-8;; // pta\r
- mov cr.pta=loc0;;\r
- ld8.fill loc0=[in0],-8;; // iva\r
- mov cr.iva=loc0;;\r
- ld8.fill loc0=[in0],-8;; // itm\r
- mov cr.itm=loc0;;\r
- ld8.fill loc0=[in0],-8;; // dcr\r
- mov cr.dcr=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ec\r
- mov ar.ec=loc0;;\r
- ld8.fill loc0=[in0],-8;; // lc\r
- mov ar.lc=loc0;;\r
- ld8.fill in5=[in0],-8;; // ar.pfs\r
- ld8.fill loc0=[in0],-8;; // ar.fpsr\r
- mov ar.fpsr=loc0;;\r
- ld8.fill loc2=[in0],-8;; // ar.unat - restored later...\r
- ld8.fill loc0=[in0],-8;; // ar.ccv\r
- mov ar.ccv=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.fdr\r
- mov ar.fdr=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.fir\r
- mov ar.fir=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.fsr\r
- mov ar.fsr=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.cflg\r
- mov ar.cflg=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.ssd\r
- mov ar.ssd=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.csd\r
- mov ar.csd=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.eflag\r
- mov ar.eflag=loc0;;\r
- ld8.fill loc0=[in0],-8;; // ar.fcr\r
- mov ar.fcr=loc0;;\r
- ld8.fill in4=[in0],-8;; // ar.rnat\r
- ld8.fill in3=[in0],-8;; // bspstore\r
- ld8.fill in2=[in0],-8;; // bsp\r
- ld8.fill loc0=[in0],-8;; // ar.rsc\r
- mov ar.rsc=loc0;;\r
- ld8.fill loc0=[in0],-8;; // B7 - B0\r
- mov b7=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b6=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b5=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b4=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b3=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b2=loc0;;\r
- ld8.fill loc0=[in0],-8;;\r
- mov b1=loc0;;\r
- ld8.fill in1=[in0],-8;; // b0 is temporarily stored in in1\r
- ld8.fill loc0=[in0],-16;; // predicates\r
- mov pr=loc0;;\r
- ldf.fill f31=[in0],-16;;\r
- ldf.fill f30=[in0],-16;;\r
- ldf.fill f29=[in0],-16;;\r
- ldf.fill f28=[in0],-16;;\r
- ldf.fill f27=[in0],-16;;\r
- ldf.fill f26=[in0],-16;;\r
- ldf.fill f25=[in0],-16;;\r
- ldf.fill f24=[in0],-16;;\r
- ldf.fill f23=[in0],-16;;\r
- ldf.fill f22=[in0],-16;;\r
- ldf.fill f21=[in0],-16;;\r
- ldf.fill f20=[in0],-16;;\r
- ldf.fill f19=[in0],-16;;\r
- ldf.fill f18=[in0],-16;;\r
- ldf.fill f17=[in0],-16;;\r
- ldf.fill f16=[in0],-16;;\r
- ldf.fill f15=[in0],-16;;\r
- ldf.fill f14=[in0],-16;;\r
- ldf.fill f13=[in0],-16;;\r
- ldf.fill f12=[in0],-16;;\r
- ldf.fill f11=[in0],-16;;\r
- ldf.fill f10=[in0],-16;;\r
- ldf.fill f9=[in0],-16;;\r
- ldf.fill f8=[in0],-16;;\r
- ldf.fill f7=[in0],-16;;\r
- ldf.fill f6=[in0],-16;;\r
- ldf.fill f5=[in0],-16;;\r
- ldf.fill f4=[in0],-16;;\r
- ldf.fill f3=[in0],-16;;\r
- ldf.fill f2=[in0],-8;;\r
- mov ar.unat=loc3;; // restore unat (int_nat) before fill of general registers\r
- ld8.fill r31=[in0],-8;;\r
- ld8.fill r30=[in0],-8;;\r
- ld8.fill r29=[in0],-8;;\r
- ld8.fill r28=[in0],-8;;\r
- ld8.fill r27=[in0],-8;;\r
- ld8.fill r26=[in0],-8;;\r
- ld8.fill r25=[in0],-8;;\r
- ld8.fill r24=[in0],-8;;\r
- ld8.fill r23=[in0],-8;;\r
- ld8.fill r22=[in0],-8;;\r
- ld8.fill r21=[in0],-8;;\r
- ld8.fill r20=[in0],-8;;\r
- ld8.fill r19=[in0],-8;;\r
- ld8.fill r18=[in0],-8;;\r
- ld8.fill r17=[in0],-8;;\r
- ld8.fill r16=[in0],-8;;\r
- ld8.fill r15=[in0],-8;;\r
- ld8.fill r14=[in0],-8;;\r
- ld8.fill r13=[in0],-8;;\r
- ld8.fill r12=[in0],-8;;\r
- ld8.fill r11=[in0],-8;;\r
- ld8.fill r10=[in0],-8;;\r
- ld8.fill r9=[in0],-8;;\r
- ld8.fill r8=[in0],-8;;\r
- ld8.fill r7=[in0],-8;;\r
- ld8.fill r6=[in0],-8;;\r
- ld8.fill r5=[in0],-8;;\r
- ld8.fill r4=[in0],-8;;\r
- ld8.fill r3=[in0],-8;;\r
- ld8.fill r2=[in0],-8;;\r
- ld8.fill r1=[in0],-8;;\r
- mov ar.unat=loc2;; // restore application context unat\r
-\r
- br.ret.sptk.many b0\r
-\r
- .endp FillContext\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// HookHandler\r
-//\r
-// Description:\r
-// Common branch target from hooked IVT entries. Runs in interrupt context.\r
-// Responsible for saving and restoring context and calling common C\r
-// handler. Banked registers running on bank 0 at entry.\r
-//\r
-// Arguments:\r
-// All arguments are passed in banked registers:\r
-// B0_REG = Original B0\r
-// SCRATCH_REG1 = IVT entry index\r
-//\r
-// Returns:\r
-// Returns via rfi\r
-//\r
-// Notes:\r
-// loc0 - scratch\r
-// loc1 - scratch\r
-// loc2 - vector number / mask\r
-// loc3 - 16 byte aligned context record address\r
-// loc4 - temporary storage of last address in context record\r
-\r
-HookHandler:\r
- flushrs;; // Synch RSE with backing store\r
- mov SCRATCH_REG2=ar.bsp // save interrupted context bsp\r
- mov SCRATCH_REG3=ar.bspstore // save interrupted context bspstore\r
- mov SCRATCH_REG4=ar.rnat // save interrupted context rnat\r
- mov SCRATCH_REG6=cr.ifs;; // save IFS in case we need to chain...\r
- cover;; // creates new frame, moves old\r
- // CFM to IFS.\r
- alloc SCRATCH_REG5=0,5,6,0 // alloc 5 locals, 6 outs\r
- ;;\r
- // save banked registers to locals\r
- mov out1=B0_REG // out1 = Original B0\r
- mov out2=SCRATCH_REG2 // out2 = original ar.bsp\r
- mov out3=SCRATCH_REG3 // out3 = original ar.bspstore\r
- mov out4=SCRATCH_REG4 // out4 = original ar.rnat\r
- mov out5=SCRATCH_REG5 // out5 = original ar.pfs\r
- mov loc2=SCRATCH_REG1;; // loc2 = vector number + chain flag\r
- bsw.1;; // switch banked registers to bank 1\r
- srlz.d // explicit serialize required\r
- // now fill in context record structure\r
- movl loc3=IpfContextBuf // Insure context record is aligned\r
- add loc0=-0x200,r0;; // mask the lower 9 bits (align on 512 byte boundary)\r
- and loc3=loc3,loc0;;\r
- add loc3=0x200,loc3;; // move to next 512 byte boundary\r
- // loc3 now contains the 512 byte aligned context record\r
- // spill register context into context record\r
- mov out0=loc3;; // Context record base in out0\r
- // original B0 in out1 already\r
- // original ar.bsp in out2 already\r
- // original ar.bspstore in out3 already\r
- br.call.sptk.few b0=SpillContext;; // spill context\r
- mov loc4=out0 // save modified address\r
-\r
- // At this point, the context has been saved to the context record and we're\r
- // ready to call the C part of the handler...\r
-\r
- movl loc0=CommonHandler;; // obtain address of plabel\r
- ld8 loc1=[loc0];; // get entry point of CommonHandler\r
- mov b6=loc1;; // put it in a branch register\r
- adds loc1= 8, loc0;; // index to GP in plabel\r
- ld8 r1=[loc1];; // set up gp for C call\r
- mov loc1=0xfffff;; // mask off so only vector bits are present\r
- and out0=loc2,loc1;; // pass vector number (exception type)\r
- mov out1=loc3;; // pass context record address\r
- br.call.sptk.few b0=b6;; // call C handler\r
-\r
- // We've returned from the C call, so restore the context and either rfi\r
- // back to interrupted thread, or chain into the SAL if this was an external interrupt\r
- mov out0=loc4;; // pass address of last element in context record\r
- br.call.sptk.few b0=FillContext;; // Fill context\r
- mov b0=out1 // fill in b0\r
- mov ar.rnat=out4\r
- mov ar.pfs=out5\r
-\r
- // Loadrs is necessary because the debugger may have changed some values in\r
- // the backing store. The processor, however may not be aware that the\r
- // stacked registers need to be reloaded from the backing store. Therefore,\r
- // we explicitly cause the RSE to refresh the stacked register's contents\r
- // from the backing store.\r
- mov loc0=ar.rsc // get RSC value\r
- mov loc1=ar.rsc // save it so we can restore it\r
- movl loc3=0xffffffffc000ffff;; // create mask for clearing RSC.loadrs\r
- and loc0=loc0,loc3;; // create value for RSC with RSC.loadrs==0\r
- mov ar.rsc=loc0;; // modify RSC\r
- loadrs;; // invalidate register stack\r
- mov ar.rsc=loc1;; // restore original RSC\r
-\r
- bsw.0;; // switch banked registers back to bank 0\r
- srlz.d;; // explicit serialize required\r
- mov PR_REG=pr // save predicates - to be restored after chaining decision\r
- mov B0_REG=b0 // save b0 - required by chain code\r
- mov loc2=EXCPT_EXTERNAL_INTERRUPT;;\r
- cmp.eq p7,p0=SCRATCH_REG1,loc2;; // check to see if this is the timer tick\r
- (p7) br.cond.dpnt.few DO_CHAIN;;\r
-\r
-NO_CHAIN:\r
- mov pr=PR_REG;;\r
- rfi;; // we're outa here.\r
-\r
-DO_CHAIN:\r
- mov pr=PR_REG\r
- mov SCRATCH_REG1=cr.iva\r
- mov SCRATCH_REG2=PATCH_RETURN_OFFSET;;\r
- add SCRATCH_REG1=SCRATCH_REG1, SCRATCH_REG2;;\r
- mov b0=SCRATCH_REG1;;\r
- br.cond.sptk.few b0;;\r
-\r
-EndHookHandler:\r
-\r
-\r
-/////////////////////////////////////////////\r
-//\r
-// Name:\r
-// HookStub\r
-//\r
-// Description:\r
-// HookStub will be copied from it's loaded location into the IVT when\r
-// an IVT entry is hooked. The IVT entry does an indirect jump via B0 to\r
-// HookHandler, which in turn calls into the default C handler, which calls\r
-// the user-installed C handler. The calls return and HookHandler executes\r
-// an rfi.\r
-//\r
-// Notes:\r
-// Saves B0 to B0_REG\r
-// Saves IVT index to SCRATCH_REG1 (immediate value is fixed up when code is copied\r
-// to the IVT entry.\r
-\r
- ASM_GLOBAL HookStub\r
- .proc HookStub\r
-HookStub:\r
-\r
- mov B0_REG=b0\r
- movl SCRATCH_REG1=HookHandler;;\r
- mov b0=SCRATCH_REG1;;\r
- mov SCRATCH_REG1=0;;// immediate value is fixed up during install of handler to be the vector number\r
- br.cond.sptk.few b0\r
-\r
- .endp HookStub\r
-\r
-\r
-/////////////////////////////////////////////\r
-// The following code is moved into IVT entry 14 (offset 3400) which is reserved\r
-// in the Itanium architecture. The patch code is located at the end of the\r
-// IVT entry.\r
-\r
-PatchCode:\r
- mov SCRATCH_REG0=psr\r
- mov SCRATCH_REG6=cr.ipsr\r
- mov PR_REG=pr\r
- mov B0_REG=b0;;\r
-\r
- // turn off any virtual translations\r
- movl SCRATCH_REG1 = ~( MASK(PSR_DT,1) | MASK(PSR_RT,1));;\r
- and SCRATCH_REG1 = SCRATCH_REG0, SCRATCH_REG1;;\r
- mov psr.l = SCRATCH_REG1;;\r
- srlz.d\r
- tbit.z p14, p15 = SCRATCH_REG6, PSR_IS;; // Check to see if we were\r
- // interrupted from IA32\r
- // context. If so, bail out\r
- // and chain to SAL immediately\r
- (p15) br.cond.sptk.few Stub_IVT_Passthru;;\r
- // we only want to take 1 out of 32 external interrupts to minimize the\r
- // impact to system performance. Check our interrupt count and bail\r
- // out if we're not up to 32\r
- movl SCRATCH_REG1=ExternalInterruptCount;;\r
- ld8 SCRATCH_REG2=[SCRATCH_REG1];; // ExternalInterruptCount\r
- tbit.z p14, p15 = SCRATCH_REG2, 5;; // bit 5 set?\r
- (p14) add SCRATCH_REG2=1, SCRATCH_REG2;; // No? Then increment\r
- // ExternalInterruptCount\r
- // and Chain to SAL\r
- // immediately\r
- (p14) st8 [SCRATCH_REG1]=SCRATCH_REG2;;\r
- (p14) br.cond.sptk.few Stub_IVT_Passthru;;\r
- (p15) mov SCRATCH_REG2=0;; // Yes? Then reset\r
- // ExternalInterruptCount\r
- // and branch to\r
- // HookHandler\r
- (p15) st8 [SCRATCH_REG1]=SCRATCH_REG2;;\r
- mov pr=PR_REG\r
- movl SCRATCH_REG1=HookHandler;; // SCRATCH_REG1 = entrypoint of HookHandler\r
- mov b0=SCRATCH_REG1;; // b0 = entrypoint of HookHandler\r
- mov SCRATCH_REG1=EXCPT_EXTERNAL_INTERRUPT;;\r
- br.sptk.few b0;; // branch to HookHandler\r
-\r
-PatchCodeRet:\r
- // fake-up an rfi to get RSE back to being coherent and insure psr has\r
- // original contents when interrupt occured, then exit to SAL\r
- // at this point:\r
- // cr.ifs has been modified by previous "cover"\r
- // SCRATCH_REG6 has original cr.ifs\r
-\r
- mov SCRATCH_REG5=cr.ipsr\r
- mov SCRATCH_REG4=cr.iip;;\r
- mov cr.ipsr=SCRATCH_REG0\r
- mov SCRATCH_REG1=ip;;\r
- add SCRATCH_REG1=0x30, SCRATCH_REG1;;\r
- mov cr.iip=SCRATCH_REG1;;\r
- rfi;; // rfi to next instruction\r
-\r
-Stub_RfiTarget:\r
- mov cr.ifs=SCRATCH_REG6\r
- mov cr.ipsr=SCRATCH_REG5\r
- mov cr.iip=SCRATCH_REG4;;\r
-\r
-Stub_IVT_Passthru:\r
- mov pr=PR_REG // pr = saved predicate registers\r
- mov b0=B0_REG;; // b0 = saved b0\r
-EndPatchCode:\r
-\r
-\r
-/////////////////////////////////////////////\r
-// The following bundle is moved into IVT entry 14 (offset 0x3400) which is reserved\r
-// in the Itanium architecture. This bundle will be the last bundle and will\r
-// be located at offset 0x37F0 in the IVT.\r
-\r
-FailsafeBranch:\r
-{\r
- .mib\r
- nop.m 0\r
- nop.i 0\r
- br.sptk.few -(FAILSAFE_BRANCH_OFFSET - EXT_INT_ENTRY_OFFSET - 0x10)\r
-}\r
-\r
-\r
-/////////////////////////////////////////////\r
-// The following bundle is moved into IVT entry 13 (offset 0x3000) which is the\r
-// external interrupt. It branches to the patch code.\r
-\r
-PatchCodeNewBun0:\r
-{\r
- .mib\r
- nop.m 0\r
- nop.i 0\r
- br.cond.sptk.few PATCH_BRANCH\r
-}\r
+++ /dev/null
-/// @file\r
-/// This is set of useful macros.\r
-///\r
-/// Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
-/// This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-/// Module Name: Common.i\r
-///\r
-///\r
-\r
-\r
-#define NESTED_SETUP(i,l,o,r) \\r
- alloc loc1=ar##.##pfs,i,l,o,r ; \\r
- mov loc0=b0 ;;\r
-\r
-\r
-#define NESTED_RETURN \\r
- mov b0=loc0 ; \\r
- mov ar##.##pfs=loc1 ;; \\r
- br##.##ret##.##dpnt b0 ;;\r
-\r
-#define MASK(bp,value) (value << bp)\r
-\r
+++ /dev/null
-/// @file\r
-/// This is set of macros used in calculating offsets in the IVT.\r
-///\r
-/// Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
-/// This program and the accompanying materials\r
-/// are licensed and made available under the terms and conditions of the BSD License\r
-/// which accompanies this distribution. The full text of the license may be found at\r
-/// http://opensource.org/licenses/bsd-license.php\r
-///\r
-/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-///\r
-///\r
-\r
-\r
-#define EXCPT_EXTERNAL_INTERRUPT 12\r
-#define MASK_0_4 0x000000000000001F // mask bits 0 through 4\r
-#define SLOT0 0\r
-#define SLOT1 1\r
-#define SLOT2 2\r
-\r
-#define PSR_DT 17\r
-#define PSR_TB 26\r
-#define PSR_RT 27\r
-#define PSR_IS 34\r
-#define PSR_IT 36\r
-#define PSR_IC 13\r
-#define PSR_I 14\r
-#define PSR_SS 40\r
-#define PSR_BN 44\r
-#define PSR_RI_MASK 0x60000000000\r
-\r
-#define EXCPT_EXTERNAL_INTERRUPT 12\r
-\r
-#define SCRATCH_REG0 r23\r
-#define SCRATCH_REG1 r24\r
-#define SCRATCH_REG2 r25\r
-#define SCRATCH_REG3 r26\r
-#define SCRATCH_REG4 r27\r
-#define SCRATCH_REG5 r28\r
-#define SCRATCH_REG6 r29\r
-#define PR_REG r30\r
-#define B0_REG r31\r
-\r
-\r
-// EXT_INT_OFFSET is the offset of the external interrupt entry in the IVT\r
-#define EXT_INT_ENTRY_OFFSET 0x03000\r
-\r
-// PATCH_ENTRY_OFFSET is the offset into the IVT of the entry that is coopted (stolen)\r
-// for use by the handler. The entire entry is restored when the handler is\r
-// unloaded.\r
-#define PATCH_ENTRY_OFFSET 0x03400\r
-\r
-// PATCH_CODE_SIZE is the size of patch code\r
-#define PATCH_CODE_SIZE (EndPatchCode - PatchCode)\r
-\r
-// A hard coded branch back into the external interrupt IVT entry's second bundle\r
-// is put here, just in case the original bundle zero did not have a branch\r
-// This is the last bundle in the reserved IVT entry\r
-#define FAILSAFE_BRANCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - 0x10)\r
-\r
-// the original external interrupt IVT entry bundle zero is copied and relocated\r
-// here... also in the reserved IVT entry\r
-// This is the second-to-last bundle in the reserved IVT entry\r
-#define RELOCATED_EXT_INT (PATCH_ENTRY_OFFSET + 0x400 - 0x20)\r
-\r
-// The patch is actually stored at the end of IVT:PATCH_ENTRY. The PATCH_OFFSET\r
-// is the offset into IVT where the patch is actually stored. It is carefully\r
-// located so that when we run out of patch code, the next bundle is the\r
-// relocated bundle 0 from the original external interrupt handler\r
-#define PATCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCode ) - 0x20)\r
-\r
-#define PATCH_RETURN_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCodeRet ) - 0x20)\r
-\r
-// PATCH_BRANCH is used only in the new bundle that is placed at the beginning\r
-// of the external interrupt IVT entry.\r
-#define PATCH_BRANCH (PATCH_OFFSET - EXT_INT_ENTRY_OFFSET)\r
-\r
+++ /dev/null
-/** @file\r
- IPF specific functions to support Debug Support protocol.\r
-\r
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "PlDebugSupport.h"\r
-\r
-BOOLEAN mInHandler = FALSE;\r
-\r
-//\r
-// number of bundles to swap in ivt\r
-//\r
-#define NUM_BUNDLES_IN_STUB 5\r
-#define NUM_IVT_ENTRIES 64\r
-\r
-typedef struct {\r
- BUNDLE OrigBundles[NUM_BUNDLES_IN_STUB];\r
- CALLBACK_FUNC RegisteredCallback;\r
-} IVT_ENTRY;\r
-\r
-IVT_ENTRY IvtEntryTable[NUM_IVT_ENTRIES];\r
-\r
-//\r
-// IPF context record is overallocated by 512 bytes to guarantee a 512 byte alignment exists\r
-// within the buffer and still have a large enough buffer to hold a whole IPF context record.\r
-//\r
-UINT8 IpfContextBuf[sizeof (EFI_SYSTEM_CONTEXT_IPF) + 512];\r
-\r
-//\r
-// The PatchSaveBuffer is used to store the original bundles from the IVT where it is patched\r
-// with the common handler.\r
-//\r
-UINT8 PatchSaveBuffer[0x400];\r
-UINTN ExternalInterruptCount;\r
-\r
-\r
-/**\r
- IPF specific DebugSupport driver initialization.\r
-\r
- Must be public because it's referenced from DebugSupport.c\r
-\r
- @retval EFI_SUCCESS Always.\r
-\r
-**/\r
-EFI_STATUS\r
-PlInitializeDebugSupportDriver (\r
- VOID\r
- )\r
-{\r
- ZeroMem (IvtEntryTable, sizeof (IvtEntryTable));\r
- ExternalInterruptCount = 0;\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Unload handler that is called during UnloadImage() - deallocates pool memory\r
- used by the driver.\r
-\r
- Must be public because it's referenced from DebugSuport.c\r
-\r
- @param ImageHandle The firmware allocated handle for the EFI image.\r
-\r
- @retval EFI_SUCCESS Always.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PlUnloadDebugSupportDriver (\r
- IN EFI_HANDLE ImageHandle\r
- )\r
-{\r
- EFI_EXCEPTION_TYPE ExceptionType;\r
-\r
- for (ExceptionType = 0; ExceptionType < NUM_IVT_ENTRIES; ExceptionType++) {\r
- ManageIvtEntryTable (ExceptionType, NULL, NULL);\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- C routine that is called for all registered exceptions. This is the main\r
- exception dispatcher.\r
-\r
- Must be public because it's referenced from AsmFuncs.s.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param Context System Context.\r
-**/\r
-VOID\r
-CommonHandler (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN EFI_SYSTEM_CONTEXT Context\r
- )\r
-{\r
- DEBUG_CODE_BEGIN ();\r
- if (mInHandler) {\r
- DEBUG ((EFI_D_INFO, "ERROR: Re-entered debugger!\n"\r
- " ExceptionType == %X\n"\r
- " Context == %X\n"\r
- " Context.SystemContextIpf->CrIip == %LX\n"\r
- " Context.SystemContextIpf->CrIpsr == %LX\n"\r
- " mInHandler == %X\n",\r
- (INT32)ExceptionType,\r
- Context,\r
- Context.SystemContextIpf->CrIip,\r
- Context.SystemContextIpf->CrIpsr,\r
- mInHandler));\r
- }\r
- DEBUG_CODE_END ();\r
-\r
- ASSERT (!mInHandler);\r
- mInHandler = TRUE;\r
- if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {\r
- if (ExceptionType != EXCEPT_IPF_EXTERNAL_INTERRUPT) {\r
- IvtEntryTable[ExceptionType].RegisteredCallback (ExceptionType, Context.SystemContextIpf);\r
- } else {\r
- IvtEntryTable[ExceptionType].RegisteredCallback (Context.SystemContextIpf);\r
- }\r
- } else {\r
- ASSERT (0);\r
- }\r
-\r
- mInHandler = FALSE;\r
-}\r
-\r
-/**\r
- Given an integer number, return the physical address of the entry point in the IFT.\r
-\r
- @param HandlerIndex Index of the Handler\r
- @param EntryPoint IFT Entrypoint\r
-\r
-**/\r
-VOID\r
-GetHandlerEntryPoint (\r
- UINTN HandlerIndex,\r
- VOID **EntryPoint\r
- )\r
-{\r
- UINT8 *TempPtr;\r
-\r
- //\r
- // get base address of IVT\r
- //\r
- TempPtr = GetIva ();\r
-\r
- if (HandlerIndex < 20) {\r
- //\r
- // first 20 provide 64 bundles per vector\r
- //\r
- TempPtr += 0x400 * HandlerIndex;\r
- } else {\r
- //\r
- // the rest provide 16 bundles per vector\r
- //\r
- TempPtr += 0x5000 + 0x100 * (HandlerIndex - 20);\r
- }\r
-\r
- *EntryPoint = (VOID *) TempPtr;\r
-}\r
-\r
-/**\r
- This is the worker function that uninstalls and removes all handlers.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param NewBundles New Boundles.\r
- @param NewCallback A pointer to the new function to be registered.\r
-\r
- @retval EFI_ALEADY_STARTED Ivt already hooked.\r
- @retval EFI_SUCCESS Successfully uninstalled.\r
-\r
-**/\r
-EFI_STATUS\r
-ManageIvtEntryTable (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN BUNDLE NewBundles[NUM_BUNDLES_IN_STUB],\r
- IN CALLBACK_FUNC NewCallback\r
- )\r
-{\r
- BUNDLE *B0Ptr;\r
- UINT64 InterruptFlags;\r
- EFI_TPL OldTpl;\r
-\r
- //\r
- // Get address of bundle 0\r
- //\r
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);\r
-\r
- if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {\r
- //\r
- // we've already installed to this vector\r
- //\r
- if (NewCallback != NULL) {\r
- //\r
- // if the input handler is non-null, error\r
- //\r
- return EFI_ALREADY_STARTED;\r
- } else {\r
- //\r
- // else remove the previously installed handler\r
- //\r
- OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
- InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);\r
- if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {\r
- UnchainExternalInterrupt ();\r
- } else {\r
- UnhookEntry (ExceptionType);\r
- }\r
-\r
- ProgramInterruptFlags (InterruptFlags);\r
- gBS->RestoreTPL (OldTpl);\r
- //\r
- // re-init IvtEntryTable\r
- //\r
- ZeroMem (&IvtEntryTable[ExceptionType], sizeof (IVT_ENTRY));\r
- }\r
- } else {\r
- //\r
- // no user handler installed on this vector\r
- //\r
- if (NewCallback != NULL) {\r
- OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
- InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);\r
- if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {\r
- ChainExternalInterrupt (NewCallback);\r
- } else {\r
- HookEntry (ExceptionType, NewBundles, NewCallback);\r
- }\r
-\r
- ProgramInterruptFlags (InterruptFlags);\r
- gBS->RestoreTPL (OldTpl);\r
- }\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-/**\r
- Saves original IVT contents and inserts a few new bundles which are fixed up\r
- to store the ExceptionType and then call the common handler.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param NewBundles New Boundles.\r
- @param NewCallback A pointer to the new function to be hooked.\r
-\r
-**/\r
-VOID\r
-HookEntry (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN BUNDLE NewBundles[4],\r
- IN CALLBACK_FUNC NewCallback\r
- )\r
-{\r
- BUNDLE *FixupBundle;\r
- BUNDLE *B0Ptr;\r
-\r
- //\r
- // Get address of bundle 0\r
- //\r
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);\r
-\r
- //\r
- // copy original bundles from IVT to IvtEntryTable so we can restore them later\r
- //\r
- CopyMem (\r
- IvtEntryTable[ExceptionType].OrigBundles,\r
- B0Ptr,\r
- sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB\r
- );\r
- //\r
- // insert new B0\r
- //\r
- CopyMem (B0Ptr, NewBundles, sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB);\r
-\r
- //\r
- // fixup IVT entry so it stores its index and whether or not to chain...\r
- //\r
- FixupBundle = B0Ptr + 2;\r
- FixupBundle->High |= ExceptionType << 36;\r
-\r
- InstructionCacheFlush (B0Ptr, 5);\r
- IvtEntryTable[ExceptionType].RegisteredCallback = NewCallback;\r
-}\r
-\r
-/**\r
- Restores original IVT contents when unregistering a callback function.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
-\r
-**/\r
-VOID\r
-UnhookEntry (\r
- IN EFI_EXCEPTION_TYPE ExceptionType\r
- )\r
-{\r
- BUNDLE *B0Ptr;\r
-\r
- //\r
- // Get address of bundle 0\r
- //\r
- GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);\r
- //\r
- // restore original bundles in IVT\r
- //\r
- CopyMem (\r
- B0Ptr,\r
- IvtEntryTable[ExceptionType].OrigBundles,\r
- sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB\r
- );\r
- InstructionCacheFlush (B0Ptr, 5);\r
-}\r
-\r
-/**\r
- Sets up cache flush and calls assembly function to chain external interrupt.\r
-\r
- Records new callback in IvtEntryTable.\r
-\r
- @param NewCallback A pointer to the interrupt handle.\r
-\r
-**/\r
-VOID\r
-ChainExternalInterrupt (\r
- IN CALLBACK_FUNC NewCallback\r
- )\r
-{\r
- VOID *Start;\r
-\r
- Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);\r
- IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NewCallback;\r
- ChainHandler ();\r
- InstructionCacheFlush (Start, 0x400);\r
-}\r
-\r
-/**\r
- Sets up cache flush and calls assembly function to restore external interrupt.\r
- Removes registered callback from IvtEntryTable.\r
-\r
-**/\r
-VOID\r
-UnchainExternalInterrupt (\r
- VOID\r
- )\r
-{\r
- VOID *Start;\r
-\r
- Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);\r
- UnchainHandler ();\r
- InstructionCacheFlush (Start, 0x400);\r
- IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NULL;\r
-}\r
-\r
-/**\r
- Returns the maximum value that may be used for the ProcessorIndex parameter in\r
- RegisterPeriodicCallback() and RegisterExceptionCallback().\r
-\r
- Hard coded to support only 1 processor for now.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported\r
- processor index is returned. Always 0 returned.\r
-\r
- @retval EFI_SUCCESS Always returned with **MaxProcessorIndex set to 0.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-GetMaximumProcessorIndex (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- OUT UINTN *MaxProcessorIndex\r
- )\r
-{\r
- *MaxProcessorIndex = 0;\r
- return (EFI_SUCCESS);\r
-}\r
-\r
-/**\r
- Registers a function to be called back periodically in interrupt context.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor the callback function applies to.\r
- @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main\r
- periodic entry point of the debug agent.\r
-\r
- @retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
- function was previously registered.\r
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback\r
- function.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-RegisterPeriodicCallback (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN EFI_PERIODIC_CALLBACK PeriodicCallback\r
- )\r
-{\r
- return ManageIvtEntryTable (EXCEPT_IPF_EXTERNAL_INTERRUPT, NULL, PeriodicCallback);\r
-}\r
-\r
-/**\r
- Registers a function to be called when a given processor exception occurs.\r
-\r
- This code executes in boot services context.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor the callback function applies to.\r
- @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called\r
- when the processor exception specified by ExceptionType occurs.\r
- @param ExceptionType Specifies which processor exception to hook.\r
-\r
- @retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
- function was previously registered.\r
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback\r
- function.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-RegisterExceptionCallback (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN EFI_EXCEPTION_CALLBACK ExceptionCallback,\r
- IN EFI_EXCEPTION_TYPE ExceptionType\r
- )\r
-{\r
- return ManageIvtEntryTable (\r
- ExceptionType,\r
- (BUNDLE *) ((EFI_PLABEL *) HookStub)->EntryPoint,\r
- ExceptionCallback\r
- );\r
-}\r
-\r
-/**\r
- Invalidates processor instruction cache for a memory range. Subsequent execution in this range\r
- causes a fresh memory fetch to retrieve code to be executed.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.\r
- @param Start Specifies the physical base of the memory range to be invalidated.\r
- @param Length Specifies the minimum number of bytes in the processor's instruction\r
- cache to invalidate.\r
-\r
- @retval EFI_SUCCESS Always returned.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-InvalidateInstructionCache (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN VOID *Start,\r
- IN UINTN Length\r
- )\r
-{\r
- InstructionCacheFlush (Start, Length);\r
- return EFI_SUCCESS;\r
-}\r
+++ /dev/null
-/** @file\r
- IPF specific types, macros, and definitions for Debug Support Driver.\r
-\r
-Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef _PLDEBUG_SUPPORT_H_\r
-#define _PLDEBUG_SUPPORT_H_\r
-\r
-#include <Uefi.h>\r
-\r
-#include <Protocol/DebugSupport.h>\r
-#include <Protocol/LoadedImage.h>\r
-\r
-#include <Library/DebugLib.h>\r
-#include <Library/UefiDriverEntryPoint.h>\r
-#include <Library/BaseMemoryLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <Library/UefiBootServicesTableLib.h>\r
-\r
-#define DISABLE_INTERRUPTS 0UL\r
-\r
-#define EFI_ISA IsaIpf\r
-\r
-typedef struct {\r
- UINT64 Low;\r
- UINT64 High;\r
-} BUNDLE;\r
-\r
-typedef\r
-VOID\r
-(*CALLBACK_FUNC) (\r
- );\r
-\r
-/**\r
- IPF specific DebugSupport driver initialization.\r
-\r
- Must be public because it's referenced from DebugSupport.c\r
-\r
- @retval EFI_SUCCESS Always.\r
-\r
-**/\r
-EFI_STATUS\r
-PlInitializeDebugSupportDriver (\r
- VOID\r
- );\r
-\r
-/**\r
- Unload handler that is called during UnloadImage() - deallocates pool memory\r
- used by the driver.\r
-\r
- Must be public because it's referenced from DebugSuport.c\r
-\r
- @param ImageHandle The firmware allocated handle for the EFI image.\r
-\r
- @retval EFI_SUCCESS Always.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-PlUnloadDebugSupportDriver (\r
- IN EFI_HANDLE ImageHandle\r
- );\r
-\r
-/**\r
- C callable function to obtain the current value of IVA.\r
-\r
- @return Current value of IVA.\r
-\r
-**/\r
-VOID *\r
-GetIva (\r
- VOID\r
- );\r
-\r
-/**\r
- C callable function that HookStub will be copied from it's loaded location into the IVT when\r
- an IVT entry is hooked.\r
-\r
-**/\r
-VOID\r
-HookStub (\r
- VOID\r
- );\r
-\r
-/**\r
- C callable function to chain an interrupt handler.\r
-\r
-**/\r
-VOID\r
-ChainHandler (\r
- VOID\r
- );\r
-\r
-/**\r
- C callable function to unchain an interrupt handler.\r
-\r
-**/\r
-VOID\r
-UnchainHandler (\r
- VOID\r
- );\r
-\r
-/**\r
- C callable function to enable/disable interrupts.\r
-\r
- @param NewInterruptState New Interrupt State.\r
-\r
- @return Previous state of psr.ic.\r
-\r
-**/\r
-UINT64\r
-ProgramInterruptFlags (\r
- IN UINT64 NewInterruptState\r
- );\r
-\r
-/**\r
- Flushes instruction cache for specified number of bytes.\r
-\r
- @param StartAddress Cache Start Address.\r
- @param SizeInBytes Cache Size.\r
-\r
-**/\r
-VOID\r
-InstructionCacheFlush (\r
- IN VOID *StartAddress,\r
- IN UINTN SizeInBytes\r
- );\r
-\r
-/**\r
- Returns the maximum value that may be used for the ProcessorIndex parameter in\r
- RegisterPeriodicCallback() and RegisterExceptionCallback().\r
-\r
- Hard coded to support only 1 processor for now.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported\r
- processor index is returned. Always 0 returned.\r
-\r
- @retval EFI_SUCCESS Always returned with **MaxProcessorIndex set to 0.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-GetMaximumProcessorIndex (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- OUT UINTN *MaxProcessorIndex\r
- );\r
-\r
-/**\r
- Registers a function to be called back periodically in interrupt context.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor the callback function applies to.\r
- @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main\r
- periodic entry point of the debug agent.\r
-\r
- @retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
- function was previously registered.\r
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback\r
- function.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-RegisterPeriodicCallback (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN EFI_PERIODIC_CALLBACK PeriodicCallback\r
- );\r
-\r
-/**\r
- Registers a function to be called when a given processor exception occurs.\r
-\r
- This code executes in boot services context.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor the callback function applies to.\r
- @param ExceptionCallback A pointer to a function of type EXCEPTION_CALLBACK that is called\r
- when the processor exception specified by ExceptionType occurs.\r
- @param ExceptionType Specifies which processor exception to hook.\r
-\r
- @retval EFI_SUCCESS The function completed successfully.\r
- @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
- function was previously registered.\r
- @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback\r
- function.\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-RegisterExceptionCallback (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN EFI_EXCEPTION_CALLBACK ExceptionCallback,\r
- IN EFI_EXCEPTION_TYPE ExceptionType\r
- );\r
-\r
-/**\r
- Invalidates processor instruction cache for a memory range. Subsequent execution in this range\r
- causes a fresh memory fetch to retrieve code to be executed.\r
-\r
- @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
- @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.\r
- @param Start Specifies the physical base of the memory range to be invalidated.\r
- @param Length Specifies the minimum number of bytes in the processor's instruction\r
- cache to invalidate.\r
-\r
- @retval EFI_SUCCESS Always returned.\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-InvalidateInstructionCache (\r
- IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
- IN UINTN ProcessorIndex,\r
- IN VOID *Start,\r
- IN UINTN Length\r
- );\r
-\r
-/**\r
- C routine that is called for all registered exceptions. This is the main\r
- exception dispatcher.\r
-\r
- Must be public because it's referenced from AsmFuncs.s.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param Context System Context.\r
-**/\r
-VOID\r
-CommonHandler (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN EFI_SYSTEM_CONTEXT Context\r
- );\r
-\r
-/**\r
- This is the worker function that uninstalls and removes all handlers.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param NewBundles New Boundles.\r
- @param NewCallback A pointer to the new function to be registered.\r
-\r
- @retval EFI_ALEADY_STARTED Ivt already hooked.\r
- @retval EFI_SUCCESS Successfully uninstalled.\r
-\r
-**/\r
-EFI_STATUS\r
-ManageIvtEntryTable (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN BUNDLE NewBundles[4],\r
- IN CALLBACK_FUNC NewCallback\r
- );\r
-\r
-/**\r
- Saves original IVT contents and inserts a few new bundles which are fixed up\r
- to store the ExceptionType and then call the common handler.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
- @param NewBundles New Boundles.\r
- @param NewCallback A pointer to the new function to be hooked.\r
-\r
-**/\r
-VOID\r
-HookEntry (\r
- IN EFI_EXCEPTION_TYPE ExceptionType,\r
- IN BUNDLE NewBundles[4],\r
- IN CALLBACK_FUNC NewCallback\r
- );\r
-\r
-/**\r
- Restores original IVT contents when unregistering a callback function.\r
-\r
- @param ExceptionType Specifies which processor exception.\r
-\r
-**/\r
-VOID\r
-UnhookEntry (\r
- IN EFI_EXCEPTION_TYPE ExceptionType\r
- );\r
-\r
-/**\r
- Sets up cache flush and calls assembly function to chain external interrupt.\r
-\r
- Records new callback in IvtEntryTable.\r
-\r
- @param NewCallback A pointer to the interrupt handle.\r
-\r
-**/\r
-VOID\r
-ChainExternalInterrupt (\r
- IN CALLBACK_FUNC NewCallback\r
- );\r
-\r
-/**\r
- Sets up cache flush and calls assembly function to restore external interrupt.\r
- Removes registered callback from IvtEntryTable.\r
-\r
-**/\r
-VOID\r
-UnchainExternalInterrupt (\r
- VOID\r
- );\r
-\r
-/**\r
- Given an integer number, return the physical address of the entry point in the IFT.\r
-\r
- @param HandlerIndex Index of the Handler\r
- @param EntryPoint IFT Entrypoint\r
-\r
-**/\r
-VOID\r
-GetHandlerEntryPoint (\r
- UINTN HandlerIndex,\r
- VOID **EntryPoint\r
- );\r
-\r
-#endif\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gDiskIoDriverBinding\r
# COMPONENT_NAME = gDiskIoComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gPartitionDriverBinding\r
# COMPONENT_NAME = gPartitionComponentName\r
## @file\r
# UDF/ECMA-167 file system driver.\r
#\r
+# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
# Copyright (C) 2014-2017 Paulo Alcantara <pcacjr@zytor.com>\r
#\r
# This program and the accompanying materials\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUdfDriverBinding\r
# COMPONENT_NAME = gUdfComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 AARCH64\r
#\r
\r
[Sources]\r
X64/EbcSupport.c\r
X64/EbcLowLevel.nasm\r
\r
-[Sources.IPF]\r
- Ipf/EbcSupport.h\r
- Ipf/EbcSupport.c\r
- Ipf/EbcLowLevel.s\r
-\r
[Sources.AARCH64]\r
AArch64/EbcSupport.c\r
AArch64/EbcLowLevel.S\r
## @file\r
# EBC Debugger configuration application.\r
#\r
-# Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 AARCH64\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 AARCH64\r
#\r
\r
[Sources]\r
X64/EbcSupport.c\r
X64/EbcLowLevel.nasm\r
\r
-[Sources.IPF]\r
- Ipf/EbcSupport.h\r
- Ipf/EbcSupport.c\r
- Ipf/EbcLowLevel.s\r
-\r
[Sources.AARCH64]\r
AArch64/EbcSupport.c\r
AArch64/EbcLowLevel.S\r
+++ /dev/null
-///** @file\r
-// \r
-// Contains low level routines for the Virtual Machine implementation\r
-// on an Itanium-based platform.\r
-//\r
-// Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
-// This program and the accompanying materials\r
-// are licensed and made available under the terms and conditions of the BSD License\r
-// which accompanies this distribution. The full text of the license may be found at\r
-// http://opensource.org/licenses/bsd-license.php\r
-// \r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-// \r
-//**/\r
-\r
-.file "EbcLowLevel.s"\r
-\r
-#define PROCEDURE_ENTRY(name) .##text; \\r
- .##type name, @function; \\r
- .##proc name; \\r
-name::\r
-\r
-#define PROCEDURE_EXIT(name) .##endp name\r
-\r
-// Note: use of NESTED_SETUP requires number of locals (l) >= 3\r
-\r
-#define NESTED_SETUP(i,l,o,r) \\r
- alloc loc1=ar##.##pfs,i,l,o,r ;\\r
- mov loc0=b0\r
-\r
-#define NESTED_RETURN \\r
- mov b0=loc0 ;\\r
- mov ar##.##pfs=loc1 ;;\\r
- br##.##ret##.##dpnt b0;;\r
-\r
-.type CopyMem, @function;\r
-\r
-//-----------------------------------------------------------------------------\r
-//++\r
-// EbcAsmLLCALLEX\r
-//\r
-// Implements the low level EBC CALLEX instruction. Sets up the\r
-// stack pointer, does the spill of function arguments, and\r
-// calls the native function. On return it restores the original\r
-// stack pointer and returns to the caller.\r
-//\r
-// Arguments :\r
-//\r
-// On Entry :\r
-// in0 = Address of native code to call\r
-// in1 = New stack pointer\r
-//\r
-// Return Value:\r
-//\r
-// As per static calling conventions.\r
-//\r
-//--\r
-//---------------------------------------------------------------------------\r
-;// void EbcAsmLLCALLEX (UINTN FunctionAddr, UINTN EbcStackPointer)\r
-PROCEDURE_ENTRY(EbcAsmLLCALLEX)\r
- NESTED_SETUP (2,6,8,0)\r
-\r
- // NESTED_SETUP uses loc0 and loc1 for context save\r
-\r
- //\r
- // Save a copy of the EBC VM stack pointer\r
- //\r
- mov r8 = in1;;\r
-\r
- //\r
- // Copy stack arguments from EBC stack into registers.\r
- // Assume worst case and copy 8.\r
- //\r
- ld8 out0 = [r8], 8;;\r
- ld8 out1 = [r8], 8;;\r
- ld8 out2 = [r8], 8;;\r
- ld8 out3 = [r8], 8;;\r
- ld8 out4 = [r8], 8;;\r
- ld8 out5 = [r8], 8;;\r
- ld8 out6 = [r8], 8;;\r
- ld8 out7 = [r8], 8;;\r
-\r
- //\r
- // Save the original stack pointer\r
- //\r
- mov loc2 = r12;\r
-\r
- //\r
- // Save the gp\r
- //\r
- or loc3 = r1, r0\r
-\r
- //\r
- // Set the new aligned stack pointer. Reserve space for the required\r
- // 16-bytes of scratch area as well.\r
- //\r
- add r12 = 48, in1\r
-\r
- //\r
- // Now call the function. Load up the function address from the descriptor\r
- // pointed to by in0. Then get the gp from the descriptor at the following\r
- // address in the descriptor.\r
- //\r
- ld8 r31 = [in0], 8;;\r
- ld8 r30 = [in0];;\r
- mov b1 = r31\r
- mov r1 = r30\r
- (p0) br.call.dptk.many b0 = b1;;\r
-\r
- //\r
- // Restore the original stack pointer and gp\r
- //\r
- mov r12 = loc2\r
- or r1 = loc3, r0\r
-\r
- //\r
- // Now return\r
- //\r
- NESTED_RETURN\r
-\r
-PROCEDURE_EXIT(EbcAsmLLCALLEX)\r
-\r
-//-----------------------------------------------------------------------------\r
-//++\r
-// EbcLLCALLEXNative\r
-//\r
-// This function is called to execute an EBC CALLEX instruction.\r
-// This instruction requires that we thunk out to external native\r
-// code. On return, we restore the stack pointer to its original location.\r
-// Destroys no working registers. For IPF, at least 8 register slots\r
-// must be allocated on the stack frame to support any number of \r
-// arguments beiung passed to the external native function. The\r
-// size of the stack frame is FramePtr - EbcSp. If this size is less\r
-// than 64-bytes, the amount of stack frame allocated is rounded up\r
-// to 64-bytes \r
-//\r
-// Arguments On Entry :\r
-// in0 = CallAddr The function address.\r
-// in1 = EbcSp The new EBC stack pointer.\r
-// in2 = FramePtr The frame pointer.\r
-//\r
-// Return Value:\r
-// None\r
-//\r
-// C Function Prototype:\r
-// VOID\r
-// EFIAPI\r
-// EbcLLCALLEXNative (\r
-// IN UINTN CallAddr,\r
-// IN UINTN EbcSp,\r
-// IN VOID *FramePtr\r
-// );\r
-//--\r
-//---------------------------------------------------------------------------\r
-\r
-PROCEDURE_ENTRY(EbcLLCALLEXNative)\r
- NESTED_SETUP (3,6,3,0)\r
-\r
- mov loc2 = in2;; // loc2 = in2 = FramePtr\r
- mov loc3 = in1;; // loc3 = in1 = EbcSp\r
- sub loc2 = loc2, loc3;; // loc2 = loc2 - loc3 = FramePtr - EbcSp\r
- mov out2 = loc2;; // out2 = loc2 = FramePtr - EbcSp\r
- mov loc4 = 0x40;; // loc4 = 0x40\r
- cmp.leu p6 = out2, loc4;; // IF out2 < loc4 THEN P6=1 ELSE P6=0; IF (FramePtr - EbcSp) < 0x40 THEN P6 = 1 ELSE P6=0\r
- (p6) mov loc2 = loc4;; // IF P6==1 THEN loc2 = loc4 = 0x40\r
- mov loc4 = r12;; // save sp\r
- or loc5 = r1, r0 // save gp\r
-\r
- sub r12 = r12, loc2;; // sp = sp - loc2 = sp - MAX (0x40, FramePtr - EbcSp)\r
-\r
- and r12 = -0x10, r12 // Round sp down to the nearest 16-byte boundary\r
- mov out1 = in1;; // out1 = EbcSp\r
- mov out0 = r12;; // out0 = sp\r
- adds r12 = -0x8, r12 \r
- (p0) br.call.dptk.many b0 = CopyMem;; // CopyMem (sp, EbcSp, (FramePtr - EbcSp))\r
- adds r12 = 0x8, r12 \r
-\r
- mov out0 = in0;; // out0 = CallAddr\r
- mov out1 = r12;; // out1 = sp\r
- (p0) br.call.dptk.many b0 = EbcAsmLLCALLEX;; // EbcAsmLLCALLEX (CallAddr, sp)\r
- mov r12 = loc4;; // restore sp\r
- or r1 = loc5, r0 // restore gp\r
-\r
- NESTED_RETURN\r
-PROCEDURE_EXIT(EbcLLCALLEXNative)\r
-\r
-\r
-//\r
-// UINTN EbcLLGetEbcEntryPoint(VOID)\r
-//\r
-// Description:\r
-// Simply return, so that the caller retrieves the return register\r
-// contents (R8). That's where the thunk-to-ebc code stuffed the\r
-// EBC entry point.\r
-//\r
-PROCEDURE_ENTRY(EbcLLGetEbcEntryPoint)\r
- br.ret.sptk b0 ;;\r
-PROCEDURE_EXIT(EbcLLGetEbcEntryPoint)\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/** @file\r
- This module contains EBC support routines that are customized based on\r
- the target processor.\r
-\r
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include "EbcInt.h"\r
-#include "EbcExecute.h"\r
-#include "EbcSupport.h"\r
-#include "EbcDebuggerHook.h"\r
-\r
-/**\r
- Given raw bytes of Itanium based code, format them into a bundle and\r
- write them out.\r
-\r
- @param MemPtr pointer to memory location to write the bundles\r
- to.\r
- @param Template 5-bit template.\r
- @param Slot0 Instruction slot 0 data for the bundle.\r
- @param Slot1 Instruction slot 1 data for the bundle.\r
- @param Slot2 Instruction slot 2 data for the bundle.\r
-\r
- @retval EFI_INVALID_PARAMETER Pointer is not aligned\r
- @retval EFI_INVALID_PARAMETER No more than 5 bits in template\r
- @retval EFI_INVALID_PARAMETER More than 41 bits used in code\r
- @retval EFI_SUCCESS All data is written.\r
-\r
-**/\r
-EFI_STATUS\r
-WriteBundle (\r
- IN VOID *MemPtr,\r
- IN UINT8 Template,\r
- IN UINT64 Slot0,\r
- IN UINT64 Slot1,\r
- IN UINT64 Slot2\r
- );\r
-\r
-/**\r
- Pushes a 64 bit unsigned value to the VM stack.\r
-\r
- @param VmPtr The pointer to current VM context.\r
- @param Arg The value to be pushed.\r
-\r
-**/\r
-VOID\r
-PushU64 (\r
- IN VM_CONTEXT *VmPtr,\r
- IN UINT64 Arg\r
- )\r
-{\r
- //\r
- // Advance the VM stack down, and then copy the argument to the stack.\r
- // Hope it's aligned.\r
- //\r
- VmPtr->Gpr[0] -= sizeof (UINT64);\r
- *(UINT64 *) VmPtr->Gpr[0] = Arg;\r
-}\r
-\r
-/**\r
- Begin executing an EBC image. The address of the entry point is passed\r
- in via a processor register, so we'll need to make a call to get the\r
- value.\r
-\r
- This is a thunk function. Microsoft x64 compiler only provide fast_call\r
- calling convention, so the first four arguments are passed by rcx, rdx,\r
- r8, and r9, while other arguments are passed in stack.\r
-\r
- @param Arg1 The 1st argument.\r
- @param ... The variable arguments list.\r
-\r
- @return The value returned by the EBC application we're going to run.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-EbcInterpret (\r
- UINT64 Arg1,\r
- ...\r
- )\r
-{\r
- //\r
- // Create a new VM context on the stack\r
- //\r
- VM_CONTEXT VmContext;\r
- UINTN Addr;\r
- EFI_STATUS Status;\r
- UINTN StackIndex;\r
- VA_LIST List;\r
- UINT64 Arg2;\r
- UINT64 Arg3;\r
- UINT64 Arg4;\r
- UINT64 Arg5;\r
- UINT64 Arg6;\r
- UINT64 Arg7;\r
- UINT64 Arg8;\r
- UINT64 Arg9;\r
- UINT64 Arg10;\r
- UINT64 Arg11;\r
- UINT64 Arg12;\r
- UINT64 Arg13;\r
- UINT64 Arg14;\r
- UINT64 Arg15;\r
- UINT64 Arg16;\r
- //\r
- // Get the EBC entry point from the processor register. Make sure you don't\r
- // call any functions before this or you could mess up the register the\r
- // entry point is passed in.\r
- //\r
- Addr = EbcLLGetEbcEntryPoint ();\r
- //\r
- // Need the args off the stack.\r
- //\r
- VA_START (List, Arg1);\r
- Arg2 = VA_ARG (List, UINT64);\r
- Arg3 = VA_ARG (List, UINT64);\r
- Arg4 = VA_ARG (List, UINT64);\r
- Arg5 = VA_ARG (List, UINT64);\r
- Arg6 = VA_ARG (List, UINT64);\r
- Arg7 = VA_ARG (List, UINT64);\r
- Arg8 = VA_ARG (List, UINT64);\r
- Arg9 = VA_ARG (List, UINT64);\r
- Arg10 = VA_ARG (List, UINT64);\r
- Arg11 = VA_ARG (List, UINT64);\r
- Arg12 = VA_ARG (List, UINT64);\r
- Arg13 = VA_ARG (List, UINT64);\r
- Arg14 = VA_ARG (List, UINT64);\r
- Arg15 = VA_ARG (List, UINT64);\r
- Arg16 = VA_ARG (List, UINT64);\r
- VA_END (List);\r
- //\r
- // Now clear out our context\r
- //\r
- ZeroMem ((VOID *) &VmContext, sizeof (VM_CONTEXT));\r
- //\r
- // Set the VM instruction pointer to the correct location in memory.\r
- //\r
- VmContext.Ip = (VMIP) Addr;\r
- //\r
- // Initialize the stack pointer for the EBC. Get the current system stack\r
- // pointer and adjust it down by the max needed for the interpreter.\r
- //\r
- //\r
- // NOTE: Eventually we should have the interpreter allocate memory\r
- // for stack space which it will use during its execution. This\r
- // would likely improve performance because the interpreter would\r
- // no longer be required to test each memory access and adjust\r
- // those reading from the stack gap.\r
- //\r
- // For IPF, the stack looks like (assuming 10 args passed)\r
- // arg10\r
- // arg9 (Bottom of high stack)\r
- // [ stack gap for interpreter execution ]\r
- // [ magic value for detection of stack corruption ]\r
- // arg8 (Top of low stack)\r
- // arg7....\r
- // arg1\r
- // [ 64-bit return address ]\r
- // [ ebc stack ]\r
- // If the EBC accesses memory in the stack gap, then we assume that it's\r
- // actually trying to access args9 and greater. Therefore we need to\r
- // adjust memory accesses in this region to point above the stack gap.\r
- //\r
- //\r
- // Now adjust the EBC stack pointer down to leave a gap for interpreter\r
- // execution. Then stuff a magic value there.\r
- //\r
-\r
- Status = GetEBCStack((EFI_HANDLE)(UINTN)-1, &VmContext.StackPool, &StackIndex);\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
- VmContext.StackTop = (UINT8*)VmContext.StackPool + (STACK_REMAIN_SIZE);\r
- VmContext.Gpr[0] = (UINT64) ((UINT8*)VmContext.StackPool + STACK_POOL_SIZE);\r
- VmContext.HighStackBottom = (UINTN) VmContext.Gpr[0];\r
- VmContext.Gpr[0] -= sizeof (UINTN);\r
-\r
-\r
- PushU64 (&VmContext, (UINT64) VM_STACK_KEY_VALUE);\r
- VmContext.StackMagicPtr = (UINTN *) VmContext.Gpr[0];\r
- VmContext.LowStackTop = (UINTN) VmContext.Gpr[0];\r
- //\r
- // Push the EBC arguments on the stack. Does not matter that they may not\r
- // all be valid.\r
- //\r
- PushU64 (&VmContext, Arg16);\r
- PushU64 (&VmContext, Arg15);\r
- PushU64 (&VmContext, Arg14);\r
- PushU64 (&VmContext, Arg13);\r
- PushU64 (&VmContext, Arg12);\r
- PushU64 (&VmContext, Arg11);\r
- PushU64 (&VmContext, Arg10);\r
- PushU64 (&VmContext, Arg9);\r
- PushU64 (&VmContext, Arg8);\r
- PushU64 (&VmContext, Arg7);\r
- PushU64 (&VmContext, Arg6);\r
- PushU64 (&VmContext, Arg5);\r
- PushU64 (&VmContext, Arg4);\r
- PushU64 (&VmContext, Arg3);\r
- PushU64 (&VmContext, Arg2);\r
- PushU64 (&VmContext, Arg1);\r
- //\r
- // Push a bogus return address on the EBC stack because the\r
- // interpreter expects one there. For stack alignment purposes on IPF,\r
- // EBC return addresses are always 16 bytes. Push a bogus value as well.\r
- //\r
- PushU64 (&VmContext, 0);\r
- PushU64 (&VmContext, 0xDEADBEEFDEADBEEF);\r
- VmContext.StackRetAddr = (UINT64) VmContext.Gpr[0];\r
-\r
- //\r
- // Begin executing the EBC code\r
- //\r
- EbcDebuggerHookEbcInterpret (&VmContext);\r
- EbcExecute (&VmContext);\r
-\r
- //\r
- // Return the value in Gpr[7] unless there was an error\r
- //\r
- ReturnEBCStack(StackIndex);\r
- return (UINT64) VmContext.Gpr[7];\r
-}\r
-\r
-\r
-/**\r
- Begin executing an EBC image. The address of the entry point is passed\r
- in via a processor register, so we'll need to make a call to get the\r
- value.\r
-\r
- @param ImageHandle image handle for the EBC application we're executing\r
- @param SystemTable standard system table passed into an driver's entry\r
- point\r
-\r
- @return The value returned by the EBC application we're going to run.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-ExecuteEbcImageEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
- )\r
-{\r
- //\r
- // Create a new VM context on the stack\r
- //\r
- VM_CONTEXT VmContext;\r
- UINTN Addr;\r
- EFI_STATUS Status;\r
- UINTN StackIndex;\r
-\r
- //\r
- // Get the EBC entry point from the processor register. Make sure you don't\r
- // call any functions before this or you could mess up the register the\r
- // entry point is passed in.\r
- //\r
- Addr = EbcLLGetEbcEntryPoint ();\r
-\r
- //\r
- // Now clear out our context\r
- //\r
- ZeroMem ((VOID *) &VmContext, sizeof (VM_CONTEXT));\r
-\r
- //\r
- // Save the image handle so we can track the thunks created for this image\r
- //\r
- VmContext.ImageHandle = ImageHandle;\r
- VmContext.SystemTable = SystemTable;\r
-\r
- //\r
- // Set the VM instruction pointer to the correct location in memory.\r
- //\r
- VmContext.Ip = (VMIP) Addr;\r
-\r
- //\r
- // Get the stack pointer. This is the bottom of the upper stack.\r
- //\r
-\r
- Status = GetEBCStack(ImageHandle, &VmContext.StackPool, &StackIndex);\r
- if (EFI_ERROR(Status)) {\r
- return Status;\r
- }\r
- VmContext.StackTop = (UINT8*)VmContext.StackPool + (STACK_REMAIN_SIZE);\r
- VmContext.Gpr[0] = (UINT64) ((UINT8*)VmContext.StackPool + STACK_POOL_SIZE);\r
- VmContext.HighStackBottom = (UINTN) VmContext.Gpr[0];\r
- VmContext.Gpr[0] -= sizeof (UINTN);\r
-\r
-\r
- //\r
- // Allocate stack space for the interpreter. Then put a magic value\r
- // at the bottom so we can detect stack corruption.\r
- //\r
- PushU64 (&VmContext, (UINT64) VM_STACK_KEY_VALUE);\r
- VmContext.StackMagicPtr = (UINTN *) (UINTN) VmContext.Gpr[0];\r
-\r
- //\r
- // When we thunk to external native code, we copy the last 8 qwords from\r
- // the EBC stack into the processor registers, and adjust the stack pointer\r
- // up. If the caller is not passing 8 parameters, then we've moved the\r
- // stack pointer up into the stack gap. If this happens, then the caller\r
- // can mess up the stack gap contents (in particular our magic value).\r
- // Therefore, leave another gap below the magic value. Pick 10 qwords down,\r
- // just as a starting point.\r
- //\r
- VmContext.Gpr[0] -= 10 * sizeof (UINT64);\r
-\r
- //\r
- // Align the stack pointer such that after pushing the system table,\r
- // image handle, and return address on the stack, it's aligned on a 16-byte\r
- // boundary as required for IPF.\r
- //\r
- VmContext.Gpr[0] &= (INT64)~0x0f;\r
- VmContext.LowStackTop = (UINTN) VmContext.Gpr[0];\r
- //\r
- // Simply copy the image handle and system table onto the EBC stack.\r
- // Greatly simplifies things by not having to spill the args\r
- //\r
- PushU64 (&VmContext, (UINT64) SystemTable);\r
- PushU64 (&VmContext, (UINT64) ImageHandle);\r
-\r
- //\r
- // Interpreter assumes 64-bit return address is pushed on the stack.\r
- // IPF does not do this so pad the stack accordingly. Also, a\r
- // "return address" is 16 bytes as required for IPF stack alignments.\r
- //\r
- PushU64 (&VmContext, (UINT64) 0);\r
- PushU64 (&VmContext, (UINT64) 0x1234567887654321);\r
- VmContext.StackRetAddr = (UINT64) VmContext.Gpr[0];\r
-\r
- //\r
- // Begin executing the EBC code\r
- //\r
- EbcDebuggerHookExecuteEbcImageEntryPoint (&VmContext);\r
- EbcExecute (&VmContext);\r
-\r
- //\r
- // Return the value in Gpr[7] unless there was an error\r
- //\r
- ReturnEBCStack(StackIndex);\r
- return (UINT64) VmContext.Gpr[7];\r
-}\r
-\r
-\r
-/**\r
- Create thunks for an EBC image entry point, or an EBC protocol service.\r
-\r
- @param ImageHandle Image handle for the EBC image. If not null, then\r
- we're creating a thunk for an image entry point.\r
- @param EbcEntryPoint Address of the EBC code that the thunk is to call\r
- @param Thunk Returned thunk we create here\r
- @param Flags Flags indicating options for creating the thunk\r
-\r
- @retval EFI_SUCCESS The thunk was created successfully.\r
- @retval EFI_INVALID_PARAMETER The parameter of EbcEntryPoint is not 16-bit\r
- aligned.\r
- @retval EFI_OUT_OF_RESOURCES There is not enough memory to created the EBC\r
- Thunk.\r
- @retval EFI_BUFFER_TOO_SMALL EBC_THUNK_SIZE is not larger enough.\r
-\r
-**/\r
-EFI_STATUS\r
-EbcCreateThunks (\r
- IN EFI_HANDLE ImageHandle,\r
- IN VOID *EbcEntryPoint,\r
- OUT VOID **Thunk,\r
- IN UINT32 Flags\r
- )\r
-{\r
- UINT8 *Ptr;\r
- UINT8 *ThunkBase;\r
- UINT64 Addr;\r
- UINT64 Code[3]; // Code in a bundle\r
- UINT64 RegNum; // register number for MOVL\r
- UINT64 BitI; // bits of MOVL immediate data\r
- UINT64 BitIc; // bits of MOVL immediate data\r
- UINT64 BitImm5c; // bits of MOVL immediate data\r
- UINT64 BitImm9d; // bits of MOVL immediate data\r
- UINT64 BitImm7b; // bits of MOVL immediate data\r
- UINT64 Br; // branch register for loading and jumping\r
- UINT64 *Data64Ptr;\r
- UINT32 ThunkSize;\r
- UINT32 Size;\r
-\r
- //\r
- // Check alignment of pointer to EBC code, which must always be aligned\r
- // on a 2-byte boundary.\r
- //\r
- if ((UINT32) (UINTN) EbcEntryPoint & 0x01) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- //\r
- // Allocate memory for the thunk. Make the (most likely incorrect) assumption\r
- // that the returned buffer is not aligned, so round up to the next\r
- // alignment size.\r
- //\r
- Size = EBC_THUNK_SIZE + EBC_THUNK_ALIGNMENT - 1;\r
- ThunkSize = Size;\r
- Ptr = EbcAllocatePoolForThunk (Size);\r
-\r
- if (Ptr == NULL) {\r
- return EFI_OUT_OF_RESOURCES;\r
- }\r
- //\r
- // Save the start address of the buffer.\r
- //\r
- ThunkBase = Ptr;\r
-\r
- //\r
- // Make sure it's aligned for code execution. If not, then\r
- // round up.\r
- //\r
- if ((UINT32) (UINTN) Ptr & (EBC_THUNK_ALIGNMENT - 1)) {\r
- Ptr = (UINT8 *) (((UINTN) Ptr + (EBC_THUNK_ALIGNMENT - 1)) &~ (UINT64) (EBC_THUNK_ALIGNMENT - 1));\r
- }\r
- //\r
- // Return the pointer to the thunk to the caller to user as the\r
- // image entry point.\r
- //\r
- *Thunk = (VOID *) Ptr;\r
-\r
- //\r
- // Clear out the thunk entry\r
- // ZeroMem(Ptr, Size);\r
- //\r
- // For IPF, when you do a call via a function pointer, the function pointer\r
- // actually points to a function descriptor which consists of a 64-bit\r
- // address of the function, followed by a 64-bit gp for the function being\r
- // called. See the the Software Conventions and Runtime Architecture Guide\r
- // for details.\r
- // So first off in our thunk, create a descriptor for our actual thunk code.\r
- // This means we need to create a pointer to the thunk code (which follows\r
- // the descriptor we're going to create), followed by the gp of the Vm\r
- // interpret function we're going to eventually execute.\r
- //\r
- Data64Ptr = (UINT64 *) Ptr;\r
-\r
- //\r
- // Write the function's entry point (which is our thunk code that follows\r
- // this descriptor we're creating).\r
- //\r
- *Data64Ptr = (UINT64) (Data64Ptr + 2);\r
- //\r
- // Get the gp from the descriptor for EbcInterpret and stuff it in our thunk\r
- // descriptor.\r
- //\r
- *(Data64Ptr + 1) = *(UINT64 *) ((UINT64 *) (UINTN) EbcInterpret + 1);\r
- //\r
- // Advance our thunk data pointer past the descriptor. Since the\r
- // descriptor consists of 16 bytes, the pointer is still aligned for\r
- // IPF code execution (on 16-byte boundary).\r
- //\r
- Ptr += sizeof (UINT64) * 2;\r
-\r
- //\r
- // *************************** MAGIC BUNDLE ********************************\r
- //\r
- // Write magic code bundle for: movl r8 = 0xca112ebcca112ebc to help the VM\r
- // to recognize it is a thunk.\r
- //\r
- Addr = (UINT64) 0xCA112EBCCA112EBC;\r
-\r
- //\r
- // Now generate the code bytes. First is nop.m 0x0\r
- //\r
- Code[0] = OPCODE_NOP;\r
-\r
- //\r
- // Next is simply Addr[62:22] (41 bits) of the address\r
- //\r
- Code[1] = RShiftU64 (Addr, 22) & 0x1ffffffffff;\r
-\r
- //\r
- // Extract bits from the address for insertion into the instruction\r
- // i = Addr[63:63]\r
- //\r
- BitI = RShiftU64 (Addr, 63) & 0x01;\r
- //\r
- // ic = Addr[21:21]\r
- //\r
- BitIc = RShiftU64 (Addr, 21) & 0x01;\r
- //\r
- // imm5c = Addr[20:16] for 5 bits\r
- //\r
- BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
- //\r
- // imm9d = Addr[15:7] for 9 bits\r
- //\r
- BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
- //\r
- // imm7b = Addr[6:0] for 7 bits\r
- //\r
- BitImm7b = Addr & 0x7F;\r
-\r
- //\r
- // The EBC entry point will be put into r8, so r8 can be used here\r
- // temporary. R8 is general register and is auto-serialized.\r
- //\r
- RegNum = 8;\r
-\r
- //\r
- // Next is jumbled data, including opcode and rest of address\r
- //\r
- Code[2] = LShiftU64 (BitImm7b, 13);\r
- Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
- Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
- Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
- Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
-\r
- WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
-\r
- //\r
- // *************************** FIRST BUNDLE ********************************\r
- //\r
- // Write code bundle for: movl r8 = EBC_ENTRY_POINT so we pass\r
- // the ebc entry point in to the interpreter function via a processor\r
- // register.\r
- // Note -- we could easily change this to pass in a pointer to a structure\r
- // that contained, among other things, the EBC image's entry point. But\r
- // for now pass it directly.\r
- //\r
- Ptr += 16;\r
- Addr = (UINT64) EbcEntryPoint;\r
-\r
- //\r
- // Now generate the code bytes. First is nop.m 0x0\r
- //\r
- Code[0] = OPCODE_NOP;\r
-\r
- //\r
- // Next is simply Addr[62:22] (41 bits) of the address\r
- //\r
- Code[1] = RShiftU64 (Addr, 22) & 0x1ffffffffff;\r
-\r
- //\r
- // Extract bits from the address for insertion into the instruction\r
- // i = Addr[63:63]\r
- //\r
- BitI = RShiftU64 (Addr, 63) & 0x01;\r
- //\r
- // ic = Addr[21:21]\r
- //\r
- BitIc = RShiftU64 (Addr, 21) & 0x01;\r
- //\r
- // imm5c = Addr[20:16] for 5 bits\r
- //\r
- BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
- //\r
- // imm9d = Addr[15:7] for 9 bits\r
- //\r
- BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
- //\r
- // imm7b = Addr[6:0] for 7 bits\r
- //\r
- BitImm7b = Addr & 0x7F;\r
-\r
- //\r
- // Put the EBC entry point in r8, which is the location of the return value\r
- // for functions.\r
- //\r
- RegNum = 8;\r
-\r
- //\r
- // Next is jumbled data, including opcode and rest of address\r
- //\r
- Code[2] = LShiftU64 (BitImm7b, 13);\r
- Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
- Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
- Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
- Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
-\r
- WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
-\r
- //\r
- // *************************** NEXT BUNDLE *********************************\r
- //\r
- // Write code bundle for:\r
- // movl rx = offset_of(EbcInterpret|ExecuteEbcImageEntryPoint)\r
- //\r
- // Advance pointer to next bundle, then compute the offset from this bundle\r
- // to the address of the entry point of the interpreter.\r
- //\r
- Ptr += 16;\r
- if ((Flags & FLAG_THUNK_ENTRY_POINT) != 0) {\r
- Addr = (UINT64) ExecuteEbcImageEntryPoint;\r
- } else {\r
- Addr = (UINT64) EbcInterpret;\r
- }\r
- //\r
- // Indirection on Itanium-based systems\r
- //\r
- Addr = *(UINT64 *) Addr;\r
-\r
- //\r
- // Now write the code to load the offset into a register\r
- //\r
- Code[0] = OPCODE_NOP;\r
-\r
- //\r
- // Next is simply Addr[62:22] (41 bits) of the address\r
- //\r
- Code[1] = RShiftU64 (Addr, 22) & 0x1ffffffffff;\r
-\r
- //\r
- // Extract bits from the address for insertion into the instruction\r
- // i = Addr[63:63]\r
- //\r
- BitI = RShiftU64 (Addr, 63) & 0x01;\r
- //\r
- // ic = Addr[21:21]\r
- //\r
- BitIc = RShiftU64 (Addr, 21) & 0x01;\r
- //\r
- // imm5c = Addr[20:16] for 5 bits\r
- //\r
- BitImm5c = RShiftU64 (Addr, 16) & 0x1F;\r
- //\r
- // imm9d = Addr[15:7] for 9 bits\r
- //\r
- BitImm9d = RShiftU64 (Addr, 7) & 0x1FF;\r
- //\r
- // imm7b = Addr[6:0] for 7 bits\r
- //\r
- BitImm7b = Addr & 0x7F;\r
-\r
- //\r
- // Put it in r31, a scratch register\r
- //\r
- RegNum = 31;\r
-\r
- //\r
- // Next is jumbled data, including opcode and rest of address\r
- //\r
- Code[2] = LShiftU64(BitImm7b, 13);\r
- Code[2] = Code[2] | LShiftU64 (0x00, 20); // vc\r
- Code[2] = Code[2] | LShiftU64 (BitIc, 21);\r
- Code[2] = Code[2] | LShiftU64 (BitImm5c, 22);\r
- Code[2] = Code[2] | LShiftU64 (BitImm9d, 27);\r
- Code[2] = Code[2] | LShiftU64 (BitI, 36);\r
- Code[2] = Code[2] | LShiftU64 ((UINT64)MOVL_OPCODE, 37);\r
- Code[2] = Code[2] | LShiftU64 ((RegNum & 0x7F), 6);\r
-\r
- WriteBundle ((VOID *) Ptr, 0x05, Code[0], Code[1], Code[2]);\r
-\r
- //\r
- // *************************** NEXT BUNDLE *********************************\r
- //\r
- // Load branch register with EbcInterpret() function offset from the bundle\r
- // address: mov b6 = RegNum\r
- //\r
- // See volume 3 page 4-29 of the Arch. Software Developer's Manual.\r
- //\r
- // Advance pointer to next bundle\r
- //\r
- Ptr += 16;\r
- Code[0] = OPCODE_NOP;\r
- Code[1] = OPCODE_NOP;\r
- Code[2] = OPCODE_MOV_BX_RX;\r
-\r
- //\r
- // Pick a branch register to use. Then fill in the bits for the branch\r
- // register and user register (same user register as previous bundle).\r
- //\r
- Br = 6;\r
- Code[2] |= LShiftU64 (Br, 6);\r
- Code[2] |= LShiftU64 (RegNum, 13);\r
- WriteBundle ((VOID *) Ptr, 0x0d, Code[0], Code[1], Code[2]);\r
-\r
- //\r
- // *************************** NEXT BUNDLE *********************************\r
- //\r
- // Now do the branch: (p0) br.cond.sptk.few b6\r
- //\r
- // Advance pointer to next bundle.\r
- // Fill in the bits for the branch register (same reg as previous bundle)\r
- //\r
- Ptr += 16;\r
- Code[0] = OPCODE_NOP;\r
- Code[1] = OPCODE_NOP;\r
- Code[2] = OPCODE_BR_COND_SPTK_FEW;\r
- Code[2] |= LShiftU64 (Br, 13);\r
- WriteBundle ((VOID *) Ptr, 0x1d, Code[0], Code[1], Code[2]);\r
-\r
- //\r
- // Add the thunk to our list of allocated thunks so we can do some cleanup\r
- // when the image is unloaded. Do this last since the Add function flushes\r
- // the instruction cache for us.\r
- //\r
- EbcAddImageThunk (ImageHandle, (VOID *) ThunkBase, ThunkSize);\r
-\r
- //\r
- // Done\r
- //\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Given raw bytes of Itanium based code, format them into a bundle and\r
- write them out.\r
-\r
- @param MemPtr pointer to memory location to write the bundles\r
- to.\r
- @param Template 5-bit template.\r
- @param Slot0 Instruction slot 0 data for the bundle.\r
- @param Slot1 Instruction slot 1 data for the bundle.\r
- @param Slot2 Instruction slot 2 data for the bundle.\r
-\r
- @retval EFI_INVALID_PARAMETER Pointer is not aligned\r
- @retval EFI_INVALID_PARAMETER No more than 5 bits in template\r
- @retval EFI_INVALID_PARAMETER More than 41 bits used in code\r
- @retval EFI_SUCCESS All data is written.\r
-\r
-**/\r
-EFI_STATUS\r
-WriteBundle (\r
- IN VOID *MemPtr,\r
- IN UINT8 Template,\r
- IN UINT64 Slot0,\r
- IN UINT64 Slot1,\r
- IN UINT64 Slot2\r
- )\r
-{\r
- UINT8 *BPtr;\r
- UINT32 Index;\r
- UINT64 Low64;\r
- UINT64 High64;\r
-\r
- //\r
- // Verify pointer is aligned\r
- //\r
- if ((UINT64) MemPtr & 0xF) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- //\r
- // Verify no more than 5 bits in template\r
- //\r
- if ((Template &~0x1F) != 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
- //\r
- // Verify max of 41 bits used in code\r
- //\r
- if (((Slot0 | Slot1 | Slot2) &~0x1ffffffffff) != 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
- Low64 = LShiftU64 (Slot1, 46);\r
- Low64 = Low64 | LShiftU64 (Slot0, 5) | Template;\r
-\r
- High64 = RShiftU64 (Slot1, 18);\r
- High64 = High64 | LShiftU64 (Slot2, 23);\r
-\r
- //\r
- // Now write it all out\r
- //\r
- BPtr = (UINT8 *) MemPtr;\r
- for (Index = 0; Index < 8; Index++) {\r
- *BPtr = (UINT8) Low64;\r
- Low64 = RShiftU64 (Low64, 8);\r
- BPtr++;\r
- }\r
-\r
- for (Index = 0; Index < 8; Index++) {\r
- *BPtr = (UINT8) High64;\r
- High64 = RShiftU64 (High64, 8);\r
- BPtr++;\r
- }\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- This function is called to execute an EBC CALLEX instruction.\r
- The function check the callee's content to see whether it is common native\r
- code or a thunk to another piece of EBC code.\r
- If the callee is common native code, use EbcLLCAllEXASM to manipulate,\r
- otherwise, set the VM->IP to target EBC code directly to avoid another VM\r
- be startup which cost time and stack space.\r
-\r
- @param VmPtr Pointer to a VM context.\r
- @param FuncAddr Callee's address\r
- @param NewStackPointer New stack pointer after the call\r
- @param FramePtr New frame pointer after the call\r
- @param Size The size of call instruction\r
-\r
-**/\r
-VOID\r
-EbcLLCALLEX (\r
- IN VM_CONTEXT *VmPtr,\r
- IN UINTN FuncAddr,\r
- IN UINTN NewStackPointer,\r
- IN VOID *FramePtr,\r
- IN UINT8 Size\r
- )\r
-{\r
- UINTN IsThunk;\r
- UINTN TargetEbcAddr;\r
- UINTN CodeOne18;\r
- UINTN CodeOne23;\r
- UINTN CodeTwoI;\r
- UINTN CodeTwoIc;\r
- UINTN CodeTwo7b;\r
- UINTN CodeTwo5c;\r
- UINTN CodeTwo9d;\r
- UINTN CalleeAddr;\r
-\r
- IsThunk = 1;\r
- TargetEbcAddr = 0;\r
-\r
- //\r
- // FuncAddr points to the descriptor of the target instructions.\r
- //\r
- CalleeAddr = *((UINT64 *)FuncAddr);\r
-\r
- //\r
- // Processor specific code to check whether the callee is a thunk to EBC.\r
- //\r
- if (*((UINT64 *)CalleeAddr) != 0xBCCA000100000005) {\r
- IsThunk = 0;\r
- goto Action;\r
- }\r
- if (*((UINT64 *)CalleeAddr + 1) != 0x697623C1004A112E) {\r
- IsThunk = 0;\r
- goto Action;\r
- }\r
-\r
- CodeOne18 = RShiftU64 (*((UINT64 *)CalleeAddr + 2), 46) & 0x3FFFF;\r
- CodeOne23 = (*((UINT64 *)CalleeAddr + 3)) & 0x7FFFFF;\r
- CodeTwoI = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 59) & 0x1;\r
- CodeTwoIc = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 44) & 0x1;\r
- CodeTwo7b = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 36) & 0x7F;\r
- CodeTwo5c = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 45) & 0x1F;\r
- CodeTwo9d = RShiftU64 (*((UINT64 *)CalleeAddr + 3), 50) & 0x1FF;\r
-\r
- TargetEbcAddr = CodeTwo7b;\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo9d, 7);\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwo5c, 16);\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoIc, 21);\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne18, 22);\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeOne23, 40);\r
- TargetEbcAddr = TargetEbcAddr | LShiftU64 (CodeTwoI, 63);\r
-\r
-Action:\r
- if (IsThunk == 1){\r
- //\r
- // The callee is a thunk to EBC, adjust the stack pointer down 16 bytes and\r
- // put our return address and frame pointer on the VM stack.\r
- // Then set the VM's IP to new EBC code.\r
- //\r
- VmPtr->Gpr[0] -= 8;\r
- VmWriteMemN (VmPtr, (UINTN) VmPtr->Gpr[0], (UINTN) FramePtr);\r
- VmPtr->FramePtr = (VOID *) (UINTN) VmPtr->Gpr[0];\r
- VmPtr->Gpr[0] -= 8;\r
- VmWriteMem64 (VmPtr, (UINTN) VmPtr->Gpr[0], (UINT64) (VmPtr->Ip + Size));\r
-\r
- VmPtr->Ip = (VMIP) (UINTN) TargetEbcAddr;\r
- } else {\r
- //\r
- // The callee is not a thunk to EBC, call native code,\r
- // and get return value.\r
- //\r
- VmPtr->Gpr[7] = EbcLLCALLEXNative (FuncAddr, NewStackPointer, FramePtr);\r
-\r
- //\r
- // Advance the IP.\r
- //\r
- VmPtr->Ip += Size;\r
- }\r
-}\r
+++ /dev/null
-/** @file\r
- Definition of EBC Support function.\r
-\r
-Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#ifndef _IPF_EBC_SUPPORT_H_\r
-#define _IPF_EBC_SUPPORT_H_\r
-\r
-#define VM_STACK_SIZE (1024 * 32)\r
-\r
-#define EBC_THUNK_SIZE 128\r
-#define STACK_REMAIN_SIZE (1024 * 4)\r
-\r
-//\r
-// For code execution, thunks must be aligned on 16-byte boundary\r
-//\r
-#define EBC_THUNK_ALIGNMENT 16\r
-\r
-//\r
-// Opcodes for IPF instructions. We'll need to hand-create thunk code (stuffing\r
-// bits) to insert a jump to the interpreter.\r
-//\r
-#define OPCODE_NOP (UINT64) 0x00008000000\r
-#define OPCODE_BR_COND_SPTK_FEW (UINT64) 0x00100000000\r
-#define OPCODE_MOV_BX_RX (UINT64) 0x00E00100000\r
-\r
-//\r
-// Opcode for MOVL instruction\r
-//\r
-#define MOVL_OPCODE 0x06\r
-\r
-#endif\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# This module installs gEdkiiFaultTolerantWriteGuid PPI to inform the check for FTW last write data has been done.\r
#\r
-# Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# version of the module only supports loading of files for the purpose of\r
# booting from the file.\r
#\r
-# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# This driver first constructs the non-tested memory range, then performs the R/W/V memory test.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are\r
# licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Packages]\r
## @file\r
# This module produces the UEFI boot service GetNextMonotonicCount() and runtime service GetNextHighMonotonicCount().\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gArpDriverBinding\r
# COMPONENT_NAME = gArpComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gDhcp4DriverBinding\r
# COMPONENT_NAME = gDhcp4ComponentName\r
## @file\r
# This module produces Deferred Procedure Call Protocol.\r
#\r
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gIScsiDriverBinding\r
# COMPONENT_NAME = gIScsiComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gIp4DriverBinding\r
# COMPONENT_NAME = gIp4ComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gMnpDriverBinding\r
# COMPONENT_NAME = gMnpComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gMtftp4DriverBinding\r
# COMPONENT_NAME = gMtftp4ComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = mSimpleNetworkDriverBinding\r
# COMPONENT_NAME = gSimpleNetworkComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = mTcp4DriverBinding\r
# COMPONENT_NAME = gTcp4ComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
# DRIVER_BINDING = gUdp4DriverBinding\r
# COMPONENT_NAME = gUdp4ComponentName\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF\r
+# VALID_ARCHITECTURES = IA32 X64\r
#\r
# DRIVER_BINDING = gPxeBcDriverBinding\r
# COMPONENT_NAME = gPxeBcComponentName\r
# This module produces EFI HII Configuration Access Protocol to provide one way to\r
# configurate VALN setting\r
#\r
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
# It installs SingleSegmentPciConfiguration2 PPI to provide read, write and modify access to Pci configuration space in PEI phase.\r
# To follow PI specification, these services also support access to the unaligned Pci address.\r
#\r
-# Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is for build only)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is for build only)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# This driver produces Print2 protocols layered on top of the PrintLib from the MdePkg.\r
#\r
-# Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
# This module sets EFI_MEMORY_XP for attributes of EfiACPIMemoryNVS and EfiReservedMemoryType\r
# in UEFI memory map, if and only of PropertiesTable is published and has BIT0 set.\r
#\r
-# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# EFI_REGULAR_EXPRESSION_PROTOCOL Implementation\r
#\r
+# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
# (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
#\r
# This program and the accompanying materials are licensed and made available\r
MSFT:RELEASE_*_IA32_CC_FLAGS == /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2 /FIAutoGen.h /EHs-c- /GR- /GF\r
MSFT:DEBUG_*_X64_CC_FLAGS == /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /FIAutoGen.h /EHs-c- /GR- /GF /Gy /Zi /Gm /X\r
MSFT:RELEASE_*_X64_CC_FLAGS == /nologo /c /WX /GS- /W4 /Gs32768 /D UNICODE /O1b2s /FIAutoGen.h /EHs-c- /GR- /GF /Gy /X\r
- MSFT:DEBUG_*_IPF_CC_FLAGS == /nologo /c /WX /GS- /W4 /EHs-c- /GR- /Gy /Os /FIAutoGen.h /QIPF_fr32 /Zi /X\r
- MSFT:RELEASE_*_IPF_CC_FLAGS == /nologo /c /WX /GS- /W4 /EHs-c- /GR- /Gy /Os /FIAutoGen.h /QIPF_fr32 /X\r
INTEL:*_*_*_CC_FLAGS = /Oi-\r
\r
# Oniguruma: potentially uninitialized local variable used\r
## @file\r
# Report Status Code Router PEIM which produces Report Stataus Code Handler PPI and Status Code PPI.\r
#\r
-# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is only for build)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is only for build)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
## @file\r
# This driver produces security2 and security architectural protocol based on SecurityManagementLib.\r
#\r
-# Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
\r
\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC (EBC is only for build)\r
+# VALID_ARCHITECTURES = IA32 X64 EBC (EBC is only for build)\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Packages]\r
#\r
# This module implements ReadOnly Variable Services required by PEIM and installs PEI ReadOnly Varaiable2 PPI.\r
#\r
-# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Sources]\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+# VALID_ARCHITECTURES = IA32 X64 EBC\r
#\r
\r
[Packages]\r
projects / mirror_edk2.git / commitdiff