For PEI, allocate granted DMA buffer from IOMMU PPI.
For DXE, map DMA buffer by PciIo.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
\r
#include "DebugCommunicationLibUsb3Internal.h"\r
\r
-//\r
-// The global variable which can be used after memory is ready.\r
-//\r
-USB3_DEBUG_PORT_HANDLE mDebugCommunicationLibUsb3DebugPortHandle;\r
-\r
UINT16 mString0Desc[] = {\r
// String Descriptor Type + Length\r
( USB_DESC_TYPE_STRING << 8 ) + STRING0_DESC_LEN,\r
Write the data to the XHCI debug register.\r
\r
@param Handle Debug port handle.\r
- @param Offset The offset of the runtime register.\r
+ @param Offset The offset of the debug register.\r
@param Data The data to write.\r
\r
**/\r
}\r
\r
/**\r
- Set one bit of the runtime register while keeping other bits.\r
+ Set one bit of the debug register while keeping other bits.\r
\r
@param Handle Debug port handle.\r
- @param Offset The offset of the runtime register.\r
+ @param Offset The offset of the debug register.\r
@param Bit The bit mask of the register to set.\r
\r
**/\r
VOID\r
XhcSetDebugRegBit (\r
- IN USB3_DEBUG_PORT_HANDLE *Handle,\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle,\r
IN UINT32 Offset,\r
IN UINT32 Bit\r
)\r
XhcWriteDebugReg (Handle, Offset, Data);\r
}\r
\r
+/**\r
+ Clear one bit of the debug register while keeping other bits.\r
+\r
+ @param Handle Debug port handle.\r
+ @param Offset The offset of the debug register.\r
+ @param Bit The bit mask of the register to clear.\r
+\r
+**/\r
+VOID\r
+XhcClearDebugRegBit (\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle,\r
+ IN UINT32 Offset,\r
+ IN UINT32 Bit\r
+ )\r
+{\r
+ UINT32 Data;\r
+\r
+ Data = XhcReadDebugReg (Handle, Offset);\r
+ Data &= ~Bit;\r
+ XhcWriteDebugReg (Handle, Offset, Data);\r
+}\r
+\r
/**\r
Program and eanble XHCI MMIO base address.\r
\r
IN EFI_PHYSICAL_ADDRESS XhciMmioBase\r
)\r
{\r
- if ((Handle == NULL) || (Handle->XhciMmioBase == XhciMmioBase)) {\r
+ if (Handle == NULL) {\r
return;\r
}\r
\r
\r
@param Handle Debug port handle.\r
\r
- @retval RETURN_UNSUPPORTED The usb host controller does not supported usb debug port capability.\r
+ @retval RETURN_UNSUPPORTED The usb host controller does not support usb debug port capability.\r
@retval RETURN_SUCCESS Get bar and offset successfully.\r
\r
**/\r
EFI_PHYSICAL_ADDRESS CapabilityPointer;\r
UINT8 CapLength;\r
\r
+ if (Handle->Initialized != USB3DBG_UNINITIALIZED) {\r
+ if (Handle->Initialized == USB3DBG_NO_DBG_CAB) {\r
+ return RETURN_UNSUPPORTED;\r
+ } else {\r
+ return RETURN_SUCCESS;\r
+ }\r
+ }\r
+\r
VendorId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_VENDOR_ID_OFFSET);\r
DeviceId = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_DEVICE_ID_OFFSET);\r
\r
Handle->DebugCapabilityBase = CapabilityPointer;\r
Handle->DebugCapabilityOffset = CapabilityPointer - Handle->XhciMmioBase;\r
Handle->XhciOpRegister = Handle->XhciMmioBase + CapLength;\r
+ Handle->DebugSupport = TRUE;\r
Handle->Initialized = USB3DBG_DBG_CAB;\r
return RETURN_SUCCESS;\r
\r
Dcctrl = XhcReadDebugReg (Handle, XHC_DC_DCCTRL);\r
if ((Dcctrl & BIT0) == 0) {\r
Result = TRUE;\r
+ } else if (!Handle->Ready) {\r
+ Handle->Ready = TRUE;\r
+ Handle->Initialized = USB3DBG_ENABLED;\r
}\r
\r
return Result;\r
MicroSecondDelay (10 * 1000);\r
}\r
\r
+ //\r
+ // Clear DCE bit and LSE bit in DCCTRL\r
+ //\r
+ if ((XhcReadDebugReg (Handle, XHC_DC_DCCTRL) & (BIT1|BIT31)) == (BIT1|BIT31)) {\r
+ XhcClearDebugRegBit (Handle, XHC_DC_DCCTRL, BIT1|BIT31);\r
+ }\r
+\r
//\r
// Construct the buffer for read, poll and write.\r
//\r
return Status;\r
}\r
\r
+/**\r
+ Discover and initialize usb debug port.\r
+\r
+ @param Handle Debug port handle.\r
+\r
+**/\r
+VOID\r
+DiscoverInitializeUsbDebugPort (\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_PHYSICAL_ADDRESS XhciMmioBase;\r
+\r
+ //\r
+ // Read 64-bit MMIO base address\r
+ //\r
+ XhciMmioBase = ProgramXhciBaseAddress ();\r
+ Handle->XhciMmioBase = XhciMmioBase;\r
+\r
+ Status = CalculateUsbDebugPortMmioBase (Handle);\r
+ if (!RETURN_ERROR (Status)) {\r
+ UpdateXhcResource (Handle, XhciMmioBase);\r
+ if (NeedReinitializeHardware (Handle)) {\r
+ InitializeUsbDebugHardware (Handle);\r
+ }\r
+ }\r
+}\r
+\r
/**\r
Read data from debug device and save the data in buffer.\r
\r
)\r
{\r
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;\r
- RETURN_STATUS Status;\r
UINT8 Index;\r
UINT8 *Data;\r
\r
return 0;\r
}\r
\r
- //\r
- // If Handle is NULL, it means memory is ready for use.\r
- // Use global variable to store handle value.\r
- //\r
- if (Handle == NULL) {\r
- UsbDebugPortHandle = &mDebugCommunicationLibUsb3DebugPortHandle;\r
- } else {\r
- UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;\r
+ UsbDebugPortHandle = GetUsb3DebugPortInstance ();\r
+ if (UsbDebugPortHandle == NULL) {\r
+ return 0;\r
}\r
- \r
- if (UsbDebugPortHandle->Initialized == USB3DBG_NO_DBG_CAB) {\r
+\r
+ if (UsbDebugPortHandle->Initialized != USB3DBG_ENABLED) {\r
return 0;\r
}\r
- \r
- if (NeedReinitializeHardware(UsbDebugPortHandle)) {\r
- Status = InitializeUsbDebugHardware (UsbDebugPortHandle);\r
- if (RETURN_ERROR(Status)) {\r
- return 0;\r
- }\r
+\r
+ if (UsbDebugPortHandle->InNotify) {\r
+ return 0;\r
}\r
\r
Data = (UINT8 *)(UINTN)UsbDebugPortHandle->Data;\r
)\r
{\r
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;\r
- RETURN_STATUS Status;\r
UINTN Sent;\r
UINTN Total;\r
- EFI_PHYSICAL_ADDRESS XhciMmioBase;\r
UINTN Index;\r
\r
if (NumberOfBytes == 0 || Buffer == NULL) {\r
Sent = 0;\r
Total = 0;\r
\r
- //\r
- // If Handle is NULL, it means memory is ready for use.\r
- // Use global variable to store handle value.\r
- //\r
- if (Handle == NULL) {\r
- UsbDebugPortHandle = &mDebugCommunicationLibUsb3DebugPortHandle;\r
- } else {\r
- UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;\r
- }\r
- \r
- if (UsbDebugPortHandle->Initialized == USB3DBG_NO_DBG_CAB) {\r
+ UsbDebugPortHandle = GetUsb3DebugPortInstance ();\r
+ if (UsbDebugPortHandle == NULL) {\r
return 0;\r
}\r
\r
- //\r
- // MMIO base address is possible to clear, set it if it is cleared. (XhciMemorySpaceClose in PchUsbCommon.c)\r
- //\r
- XhciMmioBase = ProgramXhciBaseAddress ();\r
-\r
- UpdateXhcResource (UsbDebugPortHandle, XhciMmioBase);\r
+ if (UsbDebugPortHandle->Initialized != USB3DBG_ENABLED) {\r
+ return 0;\r
+ }\r
\r
- if (NeedReinitializeHardware(UsbDebugPortHandle)) {\r
- Status = InitializeUsbDebugHardware (UsbDebugPortHandle);\r
- if (RETURN_ERROR(Status)) {\r
- return 0;\r
- }\r
+ if (UsbDebugPortHandle->InNotify) {\r
+ return 0;\r
}\r
\r
//\r
// When host is trying to send data, write will be blocked.\r
// Poll to see if there is any data sent by host at first.\r
//\r
- DebugPortPollBuffer (Handle);\r
+ DebugPortPollBuffer (UsbDebugPortHandle);\r
\r
Index = 0;\r
while ((Total < NumberOfBytes)) {\r
} else {\r
Sent = (UINT8)(NumberOfBytes - Total);\r
}\r
- Status = XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);\r
+ XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataOut, Buffer + Total, &Sent, DATA_TRANSFER_WRITE_TIMEOUT);\r
Total += Sent;\r
}\r
\r
{\r
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;\r
UINTN Length;\r
- RETURN_STATUS Status;\r
- EFI_PHYSICAL_ADDRESS XhciMmioBase;\r
\r
- //\r
- // If Handle is NULL, it means memory is ready for use.\r
- // Use global variable to store handle value.\r
- //\r
- if (Handle == NULL) {\r
- UsbDebugPortHandle = &mDebugCommunicationLibUsb3DebugPortHandle;\r
- } else {\r
- UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Handle;\r
+ UsbDebugPortHandle = GetUsb3DebugPortInstance ();\r
+ if (UsbDebugPortHandle == NULL) {\r
+ return FALSE;\r
}\r
\r
- if (UsbDebugPortHandle->Initialized == USB3DBG_NO_DBG_CAB) {\r
- return 0;\r
+ if (UsbDebugPortHandle->Initialized != USB3DBG_ENABLED) {\r
+ return FALSE;\r
}\r
\r
- XhciMmioBase = ProgramXhciBaseAddress ();\r
- UpdateXhcResource (UsbDebugPortHandle, XhciMmioBase);\r
- \r
- if (NeedReinitializeHardware(UsbDebugPortHandle)) {\r
- Status = InitializeUsbDebugHardware(UsbDebugPortHandle);\r
- if (RETURN_ERROR(Status)) {\r
- return FALSE;\r
- }\r
+ if (UsbDebugPortHandle->InNotify) {\r
+ return FALSE;\r
}\r
- \r
+\r
//\r
// If the data buffer is not empty, then return TRUE directly.\r
// Otherwise initialize a usb read transaction and read data to internal data buffer.\r
// Read data as much as we can\r
//\r
Length = XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE;\r
- XhcDataTransfer (Handle, EfiUsbDataIn, (VOID *)(UINTN)UsbDebugPortHandle->Data, &Length, DATA_TRANSFER_POLL_TIMEOUT);\r
+ XhcDataTransfer (UsbDebugPortHandle, EfiUsbDataIn, (VOID *)(UINTN)UsbDebugPortHandle->Data, &Length, DATA_TRANSFER_POLL_TIMEOUT);\r
\r
if (Length > XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE) {\r
return FALSE;\r
IN DEBUG_PORT_CONTINUE Function\r
)\r
{\r
- RETURN_STATUS Status;\r
- USB3_DEBUG_PORT_HANDLE Handle;\r
USB3_DEBUG_PORT_HANDLE *UsbDebugPortHandle;\r
\r
- //\r
- // Validate the PCD PcdDebugPortHandleBufferSize value \r
- //\r
- ASSERT (PcdGet16 (PcdDebugPortHandleBufferSize) == sizeof (USB3_DEBUG_PORT_HANDLE));\r
-\r
- if (Function == NULL && Context != NULL) {\r
- UsbDebugPortHandle = (USB3_DEBUG_PORT_HANDLE *)Context;\r
- } else {\r
- ZeroMem(&Handle, sizeof (USB3_DEBUG_PORT_HANDLE));\r
- UsbDebugPortHandle = &Handle;\r
+ UsbDebugPortHandle = GetUsb3DebugPortInstance ();\r
+ if (UsbDebugPortHandle == NULL) {\r
+ return NULL;\r
}\r
\r
- if (Function == NULL && Context != NULL) {\r
- return (DEBUG_PORT_HANDLE *) Context;\r
- }\r
- \r
- //\r
- // Read 64-bit MMIO base address\r
- //\r
- UsbDebugPortHandle->XhciMmioBase = ProgramXhciBaseAddress ();\r
-\r
- Status = CalculateUsbDebugPortMmioBase (UsbDebugPortHandle);\r
- if (RETURN_ERROR (Status)) {\r
- goto Exit;\r
- }\r
-\r
- if (NeedReinitializeHardware(&Handle)) {\r
- Status = InitializeUsbDebugHardware (&Handle);\r
- if (RETURN_ERROR(Status)) {\r
- goto Exit;\r
- }\r
- }\r
-\r
-Exit:\r
-\r
if (Function != NULL) {\r
- Function (Context, &Handle);\r
- } else {\r
- CopyMem(&mDebugCommunicationLibUsb3DebugPortHandle, &Handle, sizeof (USB3_DEBUG_PORT_HANDLE));\r
+ Function (Context, UsbDebugPortHandle);\r
}\r
\r
- return (DEBUG_PORT_HANDLE)(UINTN)&mDebugCommunicationLibUsb3DebugPortHandle;\r
+ return (DEBUG_PORT_HANDLE)(UINTN)UsbDebugPortHandle;\r
}\r
/** @file\r
Debug Port Library implementation based on usb3 debug port.\r
\r
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <Base.h>\r
#include <PiDxe.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Protocol/PciIo.h>\r
+#include <Protocol/IoMmu.h>\r
#include "DebugCommunicationLibUsb3Internal.h"\r
\r
+GUID gUsb3DbgGuid = USB3_DBG_GUID;\r
+\r
+USB3_DEBUG_PORT_HANDLE *mUsb3Instance = NULL;\r
+\r
+/**\r
+ Creates a named event that can be signaled.\r
+\r
+ This function creates an event using NotifyTpl, NoifyFunction.\r
+ If Name is NULL, then ASSERT().\r
+ If NotifyTpl is not a legal TPL value, then ASSERT().\r
+ If NotifyFunction is NULL, then ASSERT().\r
+\r
+ @param Name Supplies the GUID name of the event.\r
+ @param NotifyTpl Supplies the task priority level of the event notifications.\r
+ @param NotifyFunction Supplies the function to notify when the event is signaled.\r
+ @param Event A pointer to the event created.\r
+\r
+ @retval EFI_SUCCESS A named event was created.\r
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Usb3NamedEventListen (\r
+ IN CONST EFI_GUID *Name,\r
+ IN EFI_TPL NotifyTpl,\r
+ IN EFI_EVENT_NOTIFY NotifyFunction,\r
+ IN EFI_EVENT *Event\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ VOID *RegistrationLocal;\r
+\r
+ ASSERT (Name != NULL);\r
+ ASSERT (NotifyFunction != NULL);\r
+ ASSERT (NotifyTpl <= TPL_HIGH_LEVEL);\r
+\r
+ //\r
+ // Create event\r
+ //\r
+ Status = gBS->CreateEvent (\r
+ EVT_NOTIFY_SIGNAL,\r
+ NotifyTpl,\r
+ NotifyFunction,\r
+ NULL,\r
+ Event\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ //\r
+ // Register for an installation of protocol interface\r
+ //\r
+ Status = gBS->RegisterProtocolNotify (\r
+ (EFI_GUID *) Name,\r
+ *Event,\r
+ &RegistrationLocal\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ USB3 map one DMA buffer.\r
+\r
+ @param Instance Pointer to USB3 debug port instance.\r
+ @param PciIo Pointer to PciIo for USB3 debug port.\r
+ @param Address DMA buffer address to be mapped.\r
+ @param NumberOfBytes Number of bytes to be mapped.\r
+ @param BackupBuffer Backup buffer address.\r
+\r
+**/\r
+VOID\r
+Usb3MapOneDmaBuffer (\r
+ IN USB3_DEBUG_PORT_HANDLE *Instance,\r
+ IN EFI_PCI_IO_PROTOCOL *PciIo,\r
+ IN EFI_PHYSICAL_ADDRESS Address,\r
+ IN UINTN NumberOfBytes,\r
+ IN EFI_PHYSICAL_ADDRESS BackupBuffer\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ VOID *HostAddress;\r
+ EFI_PHYSICAL_ADDRESS DeviceAddress;\r
+ VOID *Mapping;\r
+\r
+ HostAddress = (VOID *) (UINTN) Address;\r
+ Status = PciIo->Map (\r
+ PciIo,\r
+ EfiPciIoOperationBusMasterCommonBuffer,\r
+ HostAddress,\r
+ &NumberOfBytes,\r
+ &DeviceAddress,\r
+ &Mapping\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress));\r
+ if (Instance->FromHob) {\r
+ //\r
+ // Reallocate the DMA buffer by AllocateAddress with\r
+ // the memory type accessible by SMM.\r
+ //\r
+ CopyMem ((VOID *) (UINTN) BackupBuffer, (VOID *) (UINTN) Address, NumberOfBytes);\r
+ Status = gBS->FreePages (Address, EFI_SIZE_TO_PAGES (NumberOfBytes));\r
+ ASSERT_EFI_ERROR (Status);\r
+ Status = gBS->AllocatePages (\r
+ AllocateAddress,\r
+ EfiACPIMemoryNVS,\r
+ EFI_SIZE_TO_PAGES (NumberOfBytes),\r
+ &Address\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ CopyMem ((VOID *) (UINTN) Address, (VOID *) (UINTN) BackupBuffer, NumberOfBytes);\r
+ }\r
+}\r
+\r
+/**\r
+ USB3 map DMA buffers.\r
+\r
+ @param Instance Pointer to USB3 debug port instance.\r
+ @param PciIo Pointer to PciIo for USB3 debug port.\r
+\r
+**/\r
+VOID\r
+Usb3MapDmaBuffers (\r
+ IN USB3_DEBUG_PORT_HANDLE *Instance,\r
+ IN EFI_PCI_IO_PROTOCOL *PciIo\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EDKII_IOMMU_PROTOCOL *IoMmu;\r
+ EFI_PHYSICAL_ADDRESS BackupBuffer;\r
+ UINTN BackupBufferSize;\r
+\r
+ IoMmu = NULL;\r
+ Status = gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **) &IoMmu);\r
+ if (EFI_ERROR (Status) || (IoMmu == NULL)) {\r
+ //\r
+ // No need to map the DMA buffers.\r
+ //\r
+ return;\r
+ }\r
+\r
+ //\r
+ // Allocate backup buffer for the case that the USB3\r
+ // debug port instance and DMA buffers are from PEI HOB.\r
+ // For this case, the DMA buffers need to be reallocated\r
+ // by AllocateAddress with the memory type accessible by\r
+ // SMM.\r
+ //\r
+ BackupBufferSize = MAX (XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2 + USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE,\r
+ MAX (sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER,\r
+ MAX (sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER,\r
+ MAX (sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER,\r
+ MAX (sizeof (XHC_DC_CONTEXT),\r
+ STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN)))));\r
+\r
+ Status = gBS->AllocatePages (\r
+ AllocateAnyPages,\r
+ EfiBootServicesData,\r
+ EFI_SIZE_TO_PAGES (BackupBufferSize),\r
+ &BackupBuffer\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->UrbIn.Data,\r
+ XHCI_DEBUG_DEVICE_MAX_PACKET_SIZE * 2 + USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE,\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->TransferRingIn.RingSeg0,\r
+ sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER,\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->TransferRingOut.RingSeg0,\r
+ sizeof (TRB_TEMPLATE) * TR_RING_TRB_NUMBER,\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->EventRing.EventRingSeg0,\r
+ sizeof (TRB_TEMPLATE) * EVENT_RING_TRB_NUMBER,\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->EventRing.ERSTBase,\r
+ sizeof (EVENT_RING_SEG_TABLE_ENTRY) * ERST_NUMBER,\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ Instance->DebugCapabilityContext,\r
+ sizeof (XHC_DC_CONTEXT),\r
+ BackupBuffer\r
+ );\r
+\r
+ Usb3MapOneDmaBuffer (\r
+ Instance,\r
+ PciIo,\r
+ ((XHC_DC_CONTEXT *) (UINTN) Instance->DebugCapabilityContext)->DbcInfoContext.String0DescAddress,\r
+ STRING0_DESC_LEN + MANU_DESC_LEN + PRODUCT_DESC_LEN + SERIAL_DESC_LEN,\r
+ BackupBuffer\r
+ );\r
+\r
+ gBS->FreePages (BackupBuffer, EFI_SIZE_TO_PAGES (BackupBufferSize));\r
+}\r
+\r
+/**\r
+ Invoke a notification event\r
+\r
+ @param[in] Event Event whose notification function is being invoked.\r
+ @param[in] Context The pointer to the notification function's context,\r
+ which is implementation-dependent.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+Usb3PciIoNotify (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN PciIoHandleCount;\r
+ EFI_HANDLE *PciIoHandleBuffer;\r
+ UINTN Index;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINTN PciSegment;\r
+ UINTN PciBusNumber;\r
+ UINTN PciDeviceNumber;\r
+ UINTN PciFunctionNumber;\r
+ UINT32 PciAddress;\r
+\r
+ ASSERT (mUsb3Instance != NULL);\r
+\r
+ Status = gBS->LocateHandleBuffer (\r
+ ByProtocol,\r
+ &gEfiPciIoProtocolGuid,\r
+ NULL,\r
+ &PciIoHandleCount,\r
+ &PciIoHandleBuffer\r
+ );\r
+ if (!EFI_ERROR (Status) &&\r
+ (PciIoHandleBuffer != NULL) &&\r
+ (PciIoHandleCount != 0)) { \r
+ for (Index = 0; Index < PciIoHandleCount; Index++) {\r
+ Status = gBS->HandleProtocol (\r
+ PciIoHandleBuffer[Index],\r
+ &gEfiPciIoProtocolGuid,\r
+ (VOID **) &PciIo\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ Status = PciIo->GetLocation (PciIo, &PciSegment, &PciBusNumber, &PciDeviceNumber, &PciFunctionNumber);\r
+ ASSERT_EFI_ERROR (Status);\r
+ PciAddress = (UINT32) ((PciBusNumber << 20) | (PciDeviceNumber << 15) | (PciFunctionNumber << 12));\r
+ if (PciAddress == PcdGet32(PcdUsbXhciPciAddress)) {\r
+ //\r
+ // Found the PciIo for USB3 debug port.\r
+ //\r
+ DEBUG ((DEBUG_INFO, "%a()\n", __FUNCTION__));\r
+ mUsb3Instance->InNotify = TRUE;\r
+ Usb3MapDmaBuffers (mUsb3Instance, PciIo);\r
+ mUsb3Instance->InNotify = FALSE;\r
+ gBS->CloseEvent ((EFI_EVENT) (UINTN) mUsb3Instance->PciIoEvent);\r
+ break;\r
+ }\r
+ }\r
+\r
+ gBS->FreePool (PciIoHandleBuffer);\r
+ }\r
+}\r
+\r
+/**\r
+ Return USB3 debug instance address.\r
+\r
+**/ \r
+USB3_DEBUG_PORT_HANDLE *\r
+GetUsb3DebugPortInstance (\r
+ VOID\r
+ )\r
+{\r
+ USB3_DEBUG_PORT_HANDLE *Instance;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+\r
+ Instance = NULL;\r
+\r
+ if (mUsb3Instance != NULL) {\r
+ Instance = mUsb3Instance;\r
+ goto Done;\r
+ }\r
+\r
+ Hob.Raw = GetFirstGuidHob (&gUsb3DbgGuid);\r
+ if (Hob.Raw != NULL) {\r
+ Instance = GET_GUID_HOB_DATA (Hob.Guid);\r
+ }\r
+\r
+Done:\r
+ if (Instance != NULL) {\r
+ DiscoverInitializeUsbDebugPort (Instance);\r
+ }\r
+ return Instance;\r
+}\r
+\r
/**\r
Allocate aligned memory for XHC's usage.\r
\r
\r
return Buf;\r
}\r
+\r
+/**\r
+ The constructor function initialize USB3 debug port.\r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+ @param SystemTable A pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+DebugCommunicationUsb3DxeConstructor (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ USB3_DEBUG_PORT_HANDLE UsbDbg;\r
+ USB3_DEBUG_PORT_HANDLE *Instance;\r
+ EFI_PHYSICAL_ADDRESS Address;\r
+ EFI_STATUS Status;\r
+ EFI_EVENT Event;\r
+\r
+ Instance = GetUsb3DebugPortInstance ();\r
+\r
+ Status = EfiGetSystemConfigurationTable (&gUsb3DbgGuid, (VOID **) &mUsb3Instance);\r
+ if (!EFI_ERROR (Status)) {\r
+ goto Done;\r
+ }\r
+\r
+ if (Instance == NULL) {\r
+ //\r
+ // Initialize USB debug\r
+ //\r
+ ZeroMem (&UsbDbg, sizeof (UsbDbg));\r
+ UsbDbg.Initialized = USB3DBG_UNINITIALIZED;\r
+\r
+ DiscoverInitializeUsbDebugPort (&UsbDbg);\r
+\r
+ Instance = &UsbDbg;\r
+ }\r
+\r
+ //\r
+ // It is first time to run DXE instance, copy Instance from Hob to ACPINvs.\r
+ //\r
+ Address = SIZE_4GB;\r
+ Status = gBS->AllocatePages (\r
+ AllocateMaxAddress,\r
+ EfiACPIMemoryNVS,\r
+ EFI_SIZE_TO_PAGES (sizeof (USB3_DEBUG_PORT_HANDLE)),\r
+ &Address\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ CopyMem (\r
+ (VOID *)(UINTN)Address,\r
+ Instance,\r
+ sizeof (USB3_DEBUG_PORT_HANDLE)\r
+ );\r
+ mUsb3Instance = (USB3_DEBUG_PORT_HANDLE *)(UINTN)Address;\r
+\r
+ Status = gBS->InstallConfigurationTable (&gUsb3DbgGuid, mUsb3Instance);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+Done:\r
+ if (mUsb3Instance->Ready && (mUsb3Instance->PciIoEvent == 0)) {\r
+ Status = Usb3NamedEventListen (\r
+ &gEfiPciIoProtocolGuid,\r
+ TPL_NOTIFY,\r
+ Usb3PciIoNotify,\r
+ &Event\r
+ );\r
+ if (!EFI_ERROR (Status)) {\r
+ mUsb3Instance->PciIoEvent = (EFI_PHYSICAL_ADDRESS) (UINTN) Event;\r
+ }\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ The destructor function.\r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+ @param SystemTable A pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS The destructor always returns EFI_SUCCESS.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+DebugCommunicationUsb3DxeDestructor (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ if ((mUsb3Instance != NULL) && (mUsb3Instance->PciIoEvent != 0)) {\r
+ //\r
+ // Close the event created.\r
+ //\r
+ gBS->CloseEvent ((EFI_EVENT) (UINTN) mUsb3Instance->PciIoEvent);\r
+ mUsb3Instance->PciIoEvent = 0;\r
+ }\r
+ return EFI_SUCCESS;\r
+}\r
+\r
## @file\r
# Debug Communication Library instance based on usb3 debug port.\r
#\r
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MODULE_TYPE = DXE_DRIVER\r
VERSION_STRING = 1.0\r
LIBRARY_CLASS = DebugCommunicationLib|DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SAL_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER SMM_CORE\r
+ CONSTRUCTOR = DebugCommunicationUsb3DxeConstructor\r
+ DESTRUCTOR = DebugCommunicationUsb3DxeDestructor\r
\r
#\r
# The following information is for reference only and not required by the build tools.\r
\r
# The value of data buffer size used for USB debug port handle.\r
# It should be equal to sizeof (USB3_DEBUG_PORT_HANDLE).\r
- gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugPortHandleBufferSize|239 ## SOMETIMES_CONSUMES\r
+ gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugPortHandleBufferSize|250 ## SOMETIMES_CONSUMES\r
+\r
+[Protocols]\r
+ gEfiPciIoProtocolGuid ## CONSUMES\r
+ gEdkiiIoMmuProtocolGuid ## CONSUMES\r
\r
[LibraryClasses]\r
BaseLib\r
UefiBootServicesTableLib\r
UefiLib\r
BaseMemoryLib\r
-
\ No newline at end of file
+ HobLib\r
/** @file\r
Debug Port Library implementation based on usb3 debug port.\r
\r
- Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#define USB3DBG_DBG_CAB 1 // The XHCI host controller supports debug capability\r
#define USB3DBG_ENABLED 2 // The XHCI debug device is enabled\r
#define USB3DBG_NOT_ENABLED 4 // The XHCI debug device is not enabled\r
+#define USB3DBG_UNINITIALIZED 255 // The XHCI debug device is uninitialized\r
\r
#define USB3_DEBUG_PORT_WRITE_MAX_PACKET_SIZE 0x08\r
\r
UINT8 Initialized;\r
\r
//\r
- // The flag indicates debug device is ready\r
+ // The flag indicates debug capability is supported\r
//\r
BOOLEAN DebugSupport;\r
\r
//\r
BOOLEAN Ready;\r
\r
+ //\r
+ // The flag indicates the instance is from HOB\r
+ //\r
+ BOOLEAN FromHob;\r
+\r
+ //\r
+ // IOMMU PPI Notify registered\r
+ //\r
+ BOOLEAN PpiNotifyRegistered;\r
+\r
+ //\r
+ // Prevent notification being interrupted by debug timer\r
+ //\r
+ BOOLEAN InNotify;\r
+\r
+ //\r
+ // PciIo protocol event\r
+ //\r
+ EFI_PHYSICAL_ADDRESS PciIoEvent;\r
+\r
//\r
// The flag indicates if USB 3.0 ports has been turn off/on power\r
// \r
IN UINTN Timeout\r
);\r
\r
+/**\r
+ Initialize usb debug port hardware.\r
+\r
+ @param Handle Debug port handle.\r
+\r
+ @retval TRUE The usb debug port hardware configuration is changed.\r
+ @retval FALSE The usb debug port hardware configuration is not changed.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+InitializeUsbDebugHardware (\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle\r
+ );\r
+\r
+/**\r
+ Discover and initialize usb debug port.\r
+\r
+ @param Handle Debug port handle.\r
+\r
+**/\r
+VOID\r
+DiscoverInitializeUsbDebugPort (\r
+ IN USB3_DEBUG_PORT_HANDLE *Handle\r
+ );\r
+\r
+/**\r
+ Return USB3 debug instance address.\r
+\r
+**/ \r
+USB3_DEBUG_PORT_HANDLE *\r
+GetUsb3DebugPortInstance (\r
+ VOID\r
+ );\r
+\r
#endif //__SERIAL_PORT_LIB_USB__\r
/** @file\r
Debug Port Library implementation based on usb3 debug port.\r
\r
- Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include <PiPei.h>\r
#include <Library/PeiServicesLib.h>\r
+#include <Library/HobLib.h>\r
#include <Ppi/MemoryDiscovered.h>\r
+#include <Ppi/IoMmu.h>\r
#include "DebugCommunicationLibUsb3Internal.h"\r
\r
+GUID gUsb3DbgGuid = USB3_DBG_GUID;\r
+\r
+/**\r
+ USB3 IOMMU PPI notify.\r
+\r
+ @param[in] PeiServices Pointer to PEI Services Table.\r
+ @param[in] NotifyDesc Pointer to the descriptor for the Notification event that\r
+ caused this function to execute.\r
+ @param[in] Ppi Pointer to the PPI data associated with this function.\r
+\r
+ @retval EFI_STATUS Always return EFI_SUCCESS\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+Usb3IoMmuPpiNotify (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,\r
+ IN VOID *Ppi\r
+ )\r
+{\r
+ USB3_DEBUG_PORT_HANDLE *Instance;\r
+\r
+ DEBUG ((DEBUG_INFO, "%a()\n", __FUNCTION__));\r
+\r
+ Instance = GetUsb3DebugPortInstance ();\r
+ ASSERT (Instance != NULL);\r
+\r
+ Instance->InNotify = TRUE;\r
+\r
+ //\r
+ // Reinitialize USB3 debug port with granted DMA buffer from IOMMU PPI.\r
+ //\r
+ InitializeUsbDebugHardware (Instance);\r
+\r
+ //\r
+ // Wait some time for host to be ready after re-initialization.\r
+ //\r
+ MicroSecondDelay (1000000);\r
+\r
+ Instance->InNotify = FALSE;\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+EFI_PEI_NOTIFY_DESCRIPTOR mUsb3IoMmuPpiNotifyDesc = {\r
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEdkiiIoMmuPpiGuid,\r
+ Usb3IoMmuPpiNotify\r
+};\r
+\r
+/**\r
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
+ OperationBusMasterCommonBuffer64 mapping.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the\r
+ allocated range.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuAllocateBuffer (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN NumberOfBytes;\r
+\r
+ *HostAddress = NULL;\r
+ *DeviceAddress = 0;\r
+ *Mapping = NULL;\r
+\r
+ Status = IoMmu->AllocateBuffer (\r
+ IoMmu,\r
+ EfiBootServicesData,\r
+ Pages,\r
+ HostAddress,\r
+ 0\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+\r
+ NumberOfBytes = EFI_PAGES_TO_SIZE (Pages);\r
+ Status = IoMmu->Map (\r
+ IoMmu,\r
+ EdkiiIoMmuOperationBusMasterCommonBuffer,\r
+ *HostAddress,\r
+ &NumberOfBytes,\r
+ DeviceAddress,\r
+ Mapping\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);\r
+ *HostAddress = NULL;\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+ Status = IoMmu->SetAttribute (\r
+ IoMmu,\r
+ *Mapping,\r
+ EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ IoMmu->Unmap (IoMmu, *Mapping);\r
+ IoMmu->FreeBuffer (IoMmu, Pages, *HostAddress);\r
+ *Mapping = NULL;\r
+ *HostAddress = NULL;\r
+ return Status;\r
+ }\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ USB3 get IOMMU PPI.\r
+\r
+ @return Pointer to IOMMU PPI.\r
+\r
+**/\r
+EDKII_IOMMU_PPI *\r
+Usb3GetIoMmu (\r
+ VOID\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EDKII_IOMMU_PPI *IoMmu;\r
+\r
+ IoMmu = NULL;\r
+ Status = PeiServicesLocatePpi (\r
+ &gEdkiiIoMmuPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **) &IoMmu\r
+ );\r
+ if (!EFI_ERROR (Status) && (IoMmu != NULL)) {\r
+ return IoMmu;\r
+ }\r
+\r
+ return NULL;\r
+}\r
+\r
+/**\r
+ Return USB3 debug instance address.\r
+\r
+**/ \r
+USB3_DEBUG_PORT_HANDLE *\r
+GetUsb3DebugPortInstance (\r
+ VOID\r
+ )\r
+{\r
+ USB3_DEBUG_PORT_HANDLE *Instance;\r
+ EFI_PEI_HOB_POINTERS Hob;\r
+ EFI_STATUS Status;\r
+\r
+ Hob.Raw = GetFirstGuidHob (&gUsb3DbgGuid);\r
+ if (Hob.Raw == NULL) {\r
+ //\r
+ // Save Instance into HOB\r
+ //\r
+ Instance = BuildGuidHob (\r
+ &gUsb3DbgGuid,\r
+ sizeof (USB3_DEBUG_PORT_HANDLE)\r
+ );\r
+ ASSERT (Instance != NULL);\r
+ ZeroMem (Instance, sizeof (USB3_DEBUG_PORT_HANDLE));\r
+\r
+ Instance->FromHob = TRUE;\r
+ Instance->Initialized = USB3DBG_UNINITIALIZED;\r
+ } else {\r
+ Instance = GET_GUID_HOB_DATA (Hob.Guid);\r
+ }\r
+\r
+ if (!Instance->InNotify) {\r
+ DiscoverInitializeUsbDebugPort (Instance);\r
+ }\r
+\r
+ if (Instance->Ready &&\r
+ !Instance->PpiNotifyRegistered &&\r
+ (Usb3GetIoMmu () == NULL)) {\r
+ Status = PeiServicesNotifyPpi (&mUsb3IoMmuPpiNotifyDesc);\r
+ ASSERT_EFI_ERROR (Status);\r
+ Instance->PpiNotifyRegistered = TRUE;\r
+ }\r
+\r
+ return Instance;\r
+}\r
+\r
/**\r
Allocate aligned memory for XHC's usage.\r
\r
- @param BufferSize The size, in bytes, of the Buffer.\r
+ @param BufferSize The size, in bytes, of the Buffer.\r
\r
@return A pointer to the allocated buffer or NULL if allocation fails.\r
\r
EFI_PHYSICAL_ADDRESS Address;\r
EFI_STATUS Status;\r
VOID *MemoryDiscoveredPpi;\r
+ EDKII_IOMMU_PPI *IoMmu;\r
+ VOID *HostAddress;\r
+ VOID *Mapping;\r
\r
Buf = NULL;\r
\r
(VOID **) &MemoryDiscoveredPpi\r
);\r
if (!EFI_ERROR (Status)) {\r
- Status = PeiServicesAllocatePages (EfiACPIMemoryNVS, EFI_SIZE_TO_PAGES (BufferSize), &Address);\r
- if (!EFI_ERROR (Status)) {\r
- Buf = (VOID *)(UINTN) Address;\r
+ IoMmu = Usb3GetIoMmu ();\r
+ if (IoMmu != NULL) {\r
+ Status = IoMmuAllocateBuffer (\r
+ IoMmu,\r
+ EFI_SIZE_TO_PAGES (BufferSize),\r
+ &HostAddress,\r
+ &Address,\r
+ &Mapping\r
+ );\r
+ if (!EFI_ERROR (Status)) {\r
+ ASSERT (Address == ((EFI_PHYSICAL_ADDRESS) (UINTN) HostAddress));\r
+ Buf = (VOID *)(UINTN) Address;\r
+ }\r
+ } else {\r
+ Status = PeiServicesAllocatePages (\r
+ EfiACPIMemoryNVS,\r
+ EFI_SIZE_TO_PAGES (BufferSize),\r
+ &Address\r
+ );\r
+ if (!EFI_ERROR (Status)) {\r
+ Buf = (VOID *)(UINTN) Address;\r
+ }\r
}\r
}\r
return Buf;\r
## @file\r
# Debug Communication Library instance based on usb3 debug port.\r
#\r
-# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
\r
[Ppis]\r
gEfiPeiMemoryDiscoveredPpiGuid ## CONSUMES\r
+ gEdkiiIoMmuPpiGuid ## CONSUMES\r
\r
[Pcd]\r
# The memory BAR of ehci host controller, in which usb debug feature is enabled.\r
\r
# The value of data buffer size used for USB debug port handle.\r
# It should be equal to sizeof (USB3_DEBUG_PORT_HANDLE).\r
- gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugPortHandleBufferSize|239 ## SOMETIMES_CONSUMES\r
+ gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugPortHandleBufferSize|250 ## SOMETIMES_CONSUMES\r
\r
[LibraryClasses]\r
BaseLib\r
TimerLib\r
BaseMemoryLib\r
PeiServicesLib\r
- \r
+ HobLib\r
+\r
[Depex.common.PEIM]\r
gEfiPeiMemoryDiscoveredPpiGuid\r
projects / mirror_edk2.git / commitdiff