In preparation of dropping PcdPrePiCpuMemorySize entirely, base the
maximum size of the identity map on the capabilities of the CPU.
Since that may exceed what is architecturally permitted when using
4 KB pages, take MAX_ADDRESS into account as well.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
return EFI_INVALID_PARAMETER;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- // Cover the entire GCD memory space\r
- MaxAddress = (1UL << PcdGet8 (PcdPrePiCpuMemorySize)) - 1;\r
+ //\r
+ // Limit the virtual address space to what we can actually use: UEFI\r
+ // mandates a 1:1 mapping, so no point in making the virtual address\r
+ // space larger than the physical address space. We also have to take\r
+ // into account the architectural limitations that result from UEFI's\r
+ // use of 4 KB pages.\r
+ //\r
+ MaxAddress = MIN (LShiftU64 (1ULL, ArmGetPhysicalAddressBits ()) - 1,\r
+ MAX_ADDRESS);\r
\r
// Lookup the Table Level to get the information\r
LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount);\r
\r
// Lookup the Table Level to get the information\r
LookupAddresstoRootTable (MaxAddress, &T0SZ, &RootTableEntryCount);\r
CacheMaintenanceLib\r
MemoryAllocationLib\r
\r
CacheMaintenanceLib\r
MemoryAllocationLib\r
\r
-[Pcd.AARCH64]\r
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r
-\r
[Pcd.ARM]\r
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride\r
[Pcd.ARM]\r
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride\r
ArmLib\r
CacheMaintenanceLib\r
MemoryAllocationLib\r
ArmLib\r
CacheMaintenanceLib\r
MemoryAllocationLib\r
-\r
-[Pcd.AARCH64]\r
- gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize\r