--- /dev/null
+/** @file\r
+ EFI SMM Control2 Protocol as defined in the PI 1.2 specification.\r
+\r
+ This protocol is used initiate synchronous SMI activations. This protocol could be published by a\r
+ processor driver to abstract the SMI IPI or a driver which abstracts the ASIC that is supporting the\r
+ APM port. Because of the possibility of performing SMI IPI transactions, the ability to generate this \r
+ event from a platform chipset agent is an optional capability for both IA-32 and x64-based systems.\r
+\r
+ The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an \r
+ abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when \r
+ accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of \r
+ these signals.\r
+\r
+ Copyright (c) 2009, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef _SMM_CONTROL2_H_\r
+#define _SMM_CONTROL2_H_\r
+\r
+#include <PiDxe.h>\r
+\r
+#define EFI_SMM_CONTROL2_PROTOCOL_GUID \\r
+ { \\r
+ 0x843dc720, 0xab1e, 0x42cb, {0x93, 0x57, 0x8a, 0x0, 0x78, 0xf3, 0x56, 0x1b} \\r
+ }\r
+\r
+typedef struct _EFI_SMM_CONTROL2_PROTOCOL EFI_SMM_CONTROL2_PROTOCOL;\r
+typedef UINTN EFI_SMM_PERIOD;\r
+\r
+/**\r
+ Invokes SMI activation from either the preboot or runtime environment.\r
+\r
+ This function generates an SMI.\r
+\r
+ @param[in] This The EFI_SMM_CONTROL2_PROTOCOL instance.\r
+ @param[in,out] CommandPort The value written to the command port.\r
+ @param[in,out] DataPort The value written to the data port.\r
+ @param[in] Periodic Optional mechanism to engender a periodic stream.\r
+ @param[in] ActivationInterval Optional parameter to repeat at this period one\r
+ time or, if the Periodic Boolean is set, periodically.\r
+\r
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
+ @retval EFI_DEVICE_ERROR The timing is unsupported.\r
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SMM_ACTIVATE)(\r
+ IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
+ IN OUT UINT8 *CommandPort OPTIONAL,\r
+ IN OUT UINT8 *DataPort OPTIONAL,\r
+ IN BOOLEAN Periodic OPTIONAL,\r
+ IN UINTN ActivationInterval OPTIONAL\r
+ );\r
+\r
+/**\r
+ Clears any system state that was created in response to the Trigger() call.\r
+\r
+ This function acknowledges and causes the deassertion of the SMI activation source.\r
+\r
+ @param[in] This The EFI_SMM_CONTROL2_PROTOCOL instance.\r
+ @param[in] Periodic Optional parameter to repeat at this period one time\r
+\r
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
+ @retval EFI_DEVICE_ERROR The source could not be cleared.\r
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *EFI_SMM_DEACTIVATE)(\r
+ IN CONST EFI_SMM_CONTROL2_PROTOCOL *This,\r
+ IN BOOLEAN Periodic OPTIONAL\r
+ );\r
+\r
+///\r
+/// The EFI_SMM_CONTROL2_PROTOCOL is produced by a runtime driver. It provides an \r
+/// abstraction of the platform hardware that generates an SMI. There are often I/O ports that, when \r
+/// accessed, will generate the SMI. Also, the hardware optionally supports the periodic generation of \r
+/// these signals.\r
+///\r
+struct _EFI_SMM_CONTROL2_PROTOCOL {\r
+ EFI_SMM_ACTIVATE Trigger;\r
+ EFI_SMM_DEACTIVATE Clear;\r
+ ///\r
+ /// Minimum interval at which the platform can set the period. A maximum is not \r
+ /// specified in that the SMM infrastructure code can emulate a maximum interval that is \r
+ /// greater than the hardware capabilities by using software emulation in the SMM \r
+ /// infrastructure code.\r
+ ///\r
+ EFI_SMM_PERIOD MinimumTriggerPeriod;\r
+};\r
+\r
+extern EFI_GUID gEfiSmmControl2ProtocolGuid;\r
+\r
+#endif\r
+\r