(This patch is identical to the X64 half of the last one, except for the
InternalSyncCompareExchange32() -> InternalSyncCompareExchange64() and
"cmpxchgl" -> "cmpxchgq" replacements.)
The CMPXCHG instruction has the following operands:
- AX (implicit, CompareValue): input and output
- destination operand (*Value): input and output
- source operand (ExchangeValue): input
The X64 version of InternalSyncCompareExchange64() attempts to mark both
CompareValue and (*Value) as input/output, but it doesn't use the
appropriate constraints for either operand.
Fix these issues. Furthermore, prefer the short "+" constraint for I/O
operands over the <output-operand-number> constraint that can be applied
to the input instances of I/O operands.
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
{\r
__asm__ __volatile__ (\r
"lock \n\t"\r
- "cmpxchgq %3, %1 \n\t"\r
- : "=a" (CompareValue), // %0\r
- "=m" (*Value) // %1\r
- : "a" (CompareValue), // %2\r
- "r" (ExchangeValue), // %3\r
- "m" (*Value) // %4\r
+ "cmpxchgq %2, %1 \n\t"\r
+ : "+a" (CompareValue), // %0\r
+ "+m" (*Value) // %1\r
+ : "r" (ExchangeValue) // %2\r
: "memory",\r
"cc"\r
);\r