ArmPlatformPkg/ArmVExpressSecLibRTSM: Only use extended name of system registers...

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brendan Jackman <brendan.jackman@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15501 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S
index 24ff2fc3d0f058685c1f0844694198ceffaf09a4..7d9c25c769e878a9d80e75ca32e143b4278dd1d3 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/AArch64/GicV3.S
@@ -13,6 +13,7 @@
 \r
 #include <AsmMacroIoLibV8.h>\r
 \r
 \r
 #include <AsmMacroIoLibV8.h>\r
 \r

+#ifndef __clang__\r

 // Register definitions used by GCC for GICv3 access.\r
 // These are defined by ARMCC, so keep them in the GCC specific code for now.\r
 #define ICC_SRE_EL2     S3_4_C12_C9_5\r
 // Register definitions used by GCC for GICv3 access.\r
 // These are defined by ARMCC, so keep them in the GCC specific code for now.\r
 #define ICC_SRE_EL2     S3_4_C12_C9_5\r


@@ -20,6 +21,7 @@
 #define ICC_CTLR_EL1    S3_0_C12_C12_4\r
 #define ICC_CTLR_EL3    S3_6_C12_C12_4\r
 #define ICC_PMR_EL1     S3_0_C4_C6_0\r
 #define ICC_CTLR_EL1    S3_0_C12_C12_4\r
 #define ICC_CTLR_EL3    S3_6_C12_C12_4\r
 #define ICC_PMR_EL1     S3_0_C4_C6_0\r

+#endif\r

 \r
 .text\r
 .align 3\r
 \r
 .text\r
 .align 3\r