ArmPkg: copy ArmGicArchLib to ArmGicArchSecLib

Clone ArmGicArchLib into a SEC phase specific ArmGicArchSecLib
so that we can modify the former in a subsequent patch to cache
the GIC revision in a global variable.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18099 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c
new file mode 100644 (file)
index 0000000..0e0fa3b
--- /dev/null
+++ b/ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c
@@ -0,0 +1,51 @@
+/** @file\r
+*\r
+*  Copyright (c) 2014, ARM Limited. All rights reserved.\r
+*\r
+*  This program and the accompanying materials are licensed and made available\r
+*  under the terms and conditions of the BSD License which accompanies this\r
+*  distribution.  The full text of the license may be found at\r
+*  http://opensource.org/licenses/bsd-license.php\r
+*\r
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*\r
+**/\r
+\r
+#include <Library/ArmLib.h>\r
+#include <Library/ArmGicLib.h>\r
+\r
+ARM_GIC_ARCH_REVISION\r
+EFIAPI\r
+ArmGicGetSupportedArchRevision (\r
+  VOID\r
+  )\r
+{\r
+  UINT32    IccSre;\r
+\r
+  // Ideally we would like to use the GICC IIDR Architecture version here, but\r
+  // this does not seem to be very reliable as the implementation could easily\r
+  // get it wrong. It is more reliable to check if the GICv3 System Register\r
+  // feature is implemented on the CPU. This is also convenient as our GICv3\r
+  // driver requires SRE. If only Memory mapped access is available we try to\r
+  // drive the GIC as a v2.\r
+  if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {\r
+    // Make sure System Register access is enabled (SRE). This depends on the\r
+    // higher privilege level giving us permission, otherwise we will either\r
+    // cause an exception here, or the write doesn't stick in which case we need\r
+    // to fall back to the GICv2 MMIO interface.\r
+    // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started\r
+    // at the same exception level.\r
+    // It is the OS responsibility to set this bit.\r
+    IccSre = ArmGicV3GetControlSystemRegisterEnable ();\r
+    if (!(IccSre & ICC_SRE_EL2_SRE)) {\r
+      ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);\r
+      IccSre = ArmGicV3GetControlSystemRegisterEnable ();\r
+    }\r
+    if (IccSre & ICC_SRE_EL2_SRE) {\r
+      return ARM_GIC_ARCH_REVISION_3;\r
+    }\r
+  }\r
+\r
+  return ARM_GIC_ARCH_REVISION_2;\r
+}\r

diff --git a/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c b/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c
new file mode 100644 (file)
index 0000000..f256de7
--- /dev/null
+++ b/ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c
@@ -0,0 +1,51 @@
+/** @file\r
+*\r
+*  Copyright (c) 2014, ARM Limited. All rights reserved.\r
+*\r
+*  This program and the accompanying materials are licensed and made available\r
+*  under the terms and conditions of the BSD License which accompanies this\r
+*  distribution.  The full text of the license may be found at\r
+*  http://opensource.org/licenses/bsd-license.php\r
+*\r
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*\r
+**/\r
+\r
+#include <Library/ArmLib.h>\r
+#include <Library/ArmGicLib.h>\r
+\r
+ARM_GIC_ARCH_REVISION\r
+EFIAPI\r
+ArmGicGetSupportedArchRevision (\r
+  VOID\r
+  )\r
+{\r
+  UINT32    IccSre;\r
+\r
+  // Ideally we would like to use the GICC IIDR Architecture version here, but\r
+  // this does not seem to be very reliable as the implementation could easily\r
+  // get it wrong. It is more reliable to check if the GICv3 System Register\r
+  // feature is implemented on the CPU. This is also convenient as our GICv3\r
+  // driver requires SRE. If only Memory mapped access is available we try to\r
+  // drive the GIC as a v2.\r
+  if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {\r
+    // Make sure System Register access is enabled (SRE). This depends on the\r
+    // higher privilege level giving us permission, otherwise we will either\r
+    // cause an exception here, or the write doesn't stick in which case we need\r
+    // to fall back to the GICv2 MMIO interface.\r
+    // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started\r
+    // at the same exception level.\r
+    // It is the OS responsibility to set this bit.\r
+    IccSre = ArmGicV3GetControlSystemRegisterEnable ();\r
+    if (!(IccSre & ICC_SRE_EL2_SRE)) {\r
+      ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);\r
+      IccSre = ArmGicV3GetControlSystemRegisterEnable ();\r
+    }\r
+    if (IccSre & ICC_SRE_EL2_SRE) {\r
+      return ARM_GIC_ARCH_REVISION_3;\r
+    }\r
+  }\r
+\r
+  return ARM_GIC_ARCH_REVISION_2;\r
+}\r

diff --git a/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf b/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
new file mode 100644 (file)
index 0000000..a2fb623
--- /dev/null
+++ b/ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
@@ -0,0 +1,33 @@
+#/* @file\r
+#  Copyright (c) 2015, Linaro Ltd. All rights reserved.\r
+#\r
+#  This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution.  The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#*/\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = ArmGicArchSecLib\r
+  FILE_GUID                      = c1dd9745-9459-4e9a-9f5b-99cbd233c27d\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = ArmGicArchLib|SEC\r
+\r
+[Sources.ARM]\r
+  Arm/ArmGicArchLib.c\r
+\r
+[Sources.AARCH64]\r
+  AArch64/ArmGicArchLib.c\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+  ArmPkg/ArmPkg.dec\r
+\r
+[LibraryClasses]\r
+  ArmGicLib\r

diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
index e50fcb095953a826f11d386fb30419b5d33e40a6..dc21286e2b2711a8fc3b0b72aa1f22cbc6165177 100644 (file)
--- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.dsc
@@ -143,6 +143,7 @@
   PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf\r
   PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf\r
   PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf\r
+  ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf\r
 \r
 [LibraryClasses.common.SEC, LibraryClasses.common.PEIM]\r
   MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf\r

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dsc b/ArmPlatformPkg/ArmPlatformPkg.dsc
index 0f59fec113f11231f1a7195646b226224d8dcb44..5b857e57af40cea43491d75c89dc0fd27ffa8f59 100644 (file)
--- a/ArmPlatformPkg/ArmPlatformPkg.dsc
+++ b/ArmPlatformPkg/ArmPlatformPkg.dsc
@@ -139,6 +139,8 @@
   DebugAgentLib|ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf\r
   DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf\r
 \r
+  ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf\r
+\r
 [LibraryClasses.common.SEC, LibraryClasses.common.PEIM]\r
   MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf\r
 \r

diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
index 4d0ecfa713d363b9860766f86503395463eb81b0..f25708f06fccb282973cf1a7558121c80aafb54b 100644 (file)
--- a/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb.dsc.inc
@@ -137,6 +137,8 @@
   PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf\r
 !endif\r
 \r
+  ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf\r
+\r
 [LibraryClasses.common.SEC, LibraryClasses.common.PEIM]\r
   MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf\r
 \r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
index 3c7be4e64ab68fe2ca3f775277e5711ff0f40906..7e0d8ff4b6e632ebb598fc8ee19d95c0ffeebcf7 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
@@ -151,6 +151,8 @@
   # Trustzone Support\r
   ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf\r
 \r
+  ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf\r
+\r
 [LibraryClasses.common.PEI_CORE]\r
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
   PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r