Msr.Uint64 = AsmReadMsr64 (MSR_XEON_5600_FEATURE_CONFIG);\r
AsmWriteMsr64 (MSR_XEON_5600_FEATURE_CONFIG, Msr.Uint64);\r
@endcode\r
+ @note MSR_XEON_5600_FEATURE_CONFIG is defined as MSR_FEATURE_CONFIG in SDM.\r
**/\r
#define MSR_XEON_5600_FEATURE_CONFIG 0x0000013C\r
\r
Msr = AsmReadMsr64 (MSR_XEON_5600_OFFCORE_RSP_1);\r
AsmWriteMsr64 (MSR_XEON_5600_OFFCORE_RSP_1, Msr);\r
@endcode\r
+ @note MSR_XEON_5600_OFFCORE_RSP_1 is defined as MSR_OFFCORE_RSP_1 in SDM.\r
**/\r
#define MSR_XEON_5600_OFFCORE_RSP_1 0x000001A7\r
\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_XEON_5600_TURBO_RATIO_LIMIT);\r
@endcode\r
+ @note MSR_XEON_5600_TURBO_RATIO_LIMIT is defined as MSR_TURBO_RATIO_LIMIT in SDM.\r
**/\r
#define MSR_XEON_5600_TURBO_RATIO_LIMIT 0x000001AD\r
\r
Msr = AsmReadMsr64 (MSR_XEON_5600_IA32_ENERGY_PERF_BIAS);\r
AsmWriteMsr64 (MSR_XEON_5600_IA32_ENERGY_PERF_BIAS, Msr);\r
@endcode\r
+ @note MSR_XEON_5600_IA32_ENERGY_PERF_BIAS is defined as IA32_ENERGY_PERF_BIAS in SDM.\r
**/\r
#define MSR_XEON_5600_IA32_ENERGY_PERF_BIAS 0x000001B0\r
\r