Vlv2TbltDevicePkg: Use 4K aligned PE/COFF sections
authorMichael Kinney <michael.d.kinney@intel.com>
Tue, 29 Nov 2016 18:33:36 +0000 (10:33 -0800)
committerMichael Kinney <michael.d.kinney@intel.com>
Wed, 30 Nov 2016 18:11:42 +0000 (10:11 -0800)
Update [BuildOptions] to use of 4K aligned PE/COFF
image sections to support page level protection of
DXE_RUNTIME_DRIVER, SMM_CORE, and DXE_SMM_DRIVER
modules.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
Vlv2TbltDevicePkg/PlatformPkgX64.dsc

index c3dc25f..6da2a8a 100644 (file)
@@ -1676,6 +1676,22 @@ $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
   INTEL:*_*_X64_GENFW_FLAGS = --keepexceptiontable\r
 !endif\r
 \r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_RUNTIME_DRIVER modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
 [BuildOptions.Common.EDK]\r
 \r
 #\r
index 3a5776a..5b5523f 100644 (file)
@@ -1659,6 +1659,22 @@ $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
 \r
 !endif\r
 \r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_RUNTIME_DRIVER modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
 [BuildOptions.Common.EDK]\r
 \r
 #\r
index 83cbb0a..54d2b81 100644 (file)
@@ -1668,6 +1668,22 @@ $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
 \r
 !endif\r
 \r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_RUNTIME_DRIVER modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
+#\r
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
+# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
+#\r
+[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
+\r
 [BuildOptions.Common.EDK]\r
 \r
 #\r