\r
**/\r
\r
-#ifndef _IDE_BUS_COMPONENT_NAME_H\r
-#define _IDE_BUS_COMPONENT_NAME_H\r
+#ifndef _IDE_BUS_COMPONENT_NAME_H_\r
+#define _IDE_BUS_COMPONENT_NAME_H_\r
\r
#define ADD_NAME(x) AddName ((x));\r
\r
\r
**/\r
\r
-#ifndef _IDE_H\r
-#define _IDE_H\r
+#ifndef _IDE_H_\r
+#define _IDE_H_\r
\r
//\r
// Helper functions Prototype\r
@param Port TODO: add argument description\r
@param Data TODO: add argument description\r
\r
- TODO: add return values\r
+ TODO: add return values.\r
\r
**/\r
VOID\r
\r
@param IdeDev TODO: add argument description\r
\r
- TODO: add return values\r
+ TODO: add return values.\r
\r
**/\r
EFI_STATUS\r
/**\r
Clear pending IDE interrupt before OS loader/kernel take control of the IDE device.\r
\r
- @param[in] Event Pointer to this event\r
- @param[in] Context Event hanlder private data\r
-\r
- @retval EFI_SUCCESS - Interrupt cleared.\r
+ @param[in] Event Pointer to this event.\r
+ @param[in] Context Event hanlder private data.\r
\r
**/\r
VOID\r
// ***********************************************************************************\r
//\r
/**\r
- TODO: This - add argument and description to function comment\r
- TODO: ExtendedVerification - add argument and description to function comment\r
- TODO: EFI_DEVICE_ERROR - add return value to function comment\r
+ GC_TODO: Add function description\r
+\r
+ @param This GC_TODO: add argument description.\r
+ @param ExtendedVerification GC_TODO: add argument description.\r
+\r
+ @retval EFI_DEVICE_ERROR GC_TODO: Add description for return value.\r
\r
**/\r
EFI_STATUS\r
// ***********************************************************************************\r
//\r
/**\r
- TODO: This - add argument and description to function comment\r
- TODO: EFI_SUCCESS - add return value to function comment\r
+ TODO: Add function description\r
+\r
+ @param This TODO: add argument description\r
+\r
+ @retval EFI_SUCCESS GC_TODO: Add description for return value.\r
+\r
**/\r
EFI_STATUS\r
EFIAPI\r
\r
**/\r
\r
-#ifndef _IDE_BUS_H\r
-#define _IDE_BUS_H\r
+#ifndef _IDE_BUS_H_\r
+#define _IDE_BUS_H_\r
\r
\r
\r
//\r
// EFI Driver Configuration Functions\r
//\r
+/**\r
+ TODO: Add function description\r
+\r
+ @param This TODO: add argument description\r
+ @param ControllerHandle TODO: add argument description\r
+ @param ChildHandle TODO: add argument description\r
+ @param Language TODO: add argument description\r
+ @param ActionRequired TODO: add argument description\r
+\r
+ TODO: add return values.\r
+\r
+**/\r
EFI_STATUS\r
IDEBusDriverConfigurationSetOptions (\r
IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,\r
OUT EFI_DRIVER_CONFIGURATION_ACTION_REQUIRED *ActionRequired\r
);\r
\r
+/**\r
+ TODO: Add function description\r
+\r
+ @param This TODO: add argument description\r
+ @param ControllerHandle TODO: add argument description\r
+ @param ChildHandle TODO: add argument description\r
+\r
+ TODO: add return values.\r
+\r
+**/\r
EFI_STATUS\r
IDEBusDriverConfigurationOptionsValid (\r
IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,\r
IN EFI_HANDLE ChildHandle OPTIONAL\r
);\r
\r
+/**\r
+ TODO: Add function description\r
+\r
+ @param This TODO: add argument description\r
+ @param ControllerHandle TODO: add argument description\r
+ @param ChildHandle TODO: add argument description\r
+ @param DefaultType TODO: add argument description\r
+ @param ActionRequired TODO: add argument description\r
+\r
+ TODO: add return values.\r
+\r
+**/\r
EFI_STATUS\r
IDEBusDriverConfigurationForceDefaults (\r
IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,\r
//\r
// EFI Driver Diagnostics Functions\r
//\r
+/**\r
+ TODO: Add function description\r
+\r
+ @param This TODO: add argument description\r
+ @param ControllerHandle TODO: add argument description\r
+ @param ChildHandle TODO: add argument description\r
+ @param DiagnosticType TODO: add argument description\r
+ @param Language TODO: add argument description\r
+ @param ErrorType TODO: add argument description\r
+ @param BufferSize TODO: add argument description\r
+ @param Buffer TODO: add argument description\r
+\r
+ TODO: add return values.\r
+\r
+**/\r
EFI_STATUS\r
IDEBusDriverDiagnosticsRunDiagnostics (\r
IN EFI_DRIVER_DIAGNOSTICS_PROTOCOL *This,\r
@param BufferSize TODO: add argument description\r
@param Buffer TODO: add argument description\r
\r
- TODO: add return values\r
+ TODO: add return values.\r
\r
**/\r
EFI_STATUS\r
\r
**/\r
\r
-#ifndef _IDE_DATA_H\r
-#define _IDE_DATA_H\r
+#ifndef _IDE_DATA_H_\r
+#define _IDE_DATA_H_\r
\r
#include <IndustryStandard/Atapi.h>\r
\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
**/\r
\r
\r
-#ifndef _EFI_PCI_BUS_COMPONENT_NAME_H\r
-#define _EFI_PCI_BUS_COMPONENT_NAME_H\r
+#ifndef _EFI_PCI_BUS_COMPONENT_NAME_H_\r
+#define _EFI_PCI_BUS_COMPONENT_NAME_H_\r
\r
extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;\r
extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
**/\r
\r
\r
-#ifndef _EFI_PCI_BUS_H\r
-#define _EFI_PCI_BUS_H\r
+#ifndef _EFI_PCI_BUS_H_\r
+#define _EFI_PCI_BUS_H_\r
\r
\r
#include <FrameworkDxe.h>\r
//\r
// PCI Bus Support Function Prototypes\r
//\r
+/**\r
+ Test to see if this driver supports ControllerHandle. Any ControllerHandle\r
+ than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param ControllerHandle Handle of device to test.\r
+ @param RemainingDevicePath Optional parameter use to pick a specific child.\r
+ device to start.\r
+\r
+ @retval EFI_SUCCESS This driver supports this device.\r
+ @retval EFI_ALREADY_STARTED This driver is already running on this device.\r
+ @retval other This driver does not support this device.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
PciBusDriverBindingSupported (\r
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
+/**\r
+ Start this driver on ControllerHandle and enumerate Pci bus and start\r
+ all device under PCI bus.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param ControllerHandle Handle of device to bind driver to.\r
+ @param RemainingDevicePath Optional parameter use to pick a specific child.\r
+ device to start.\r
+\r
+ @retval EFI_SUCCESS This driver is added to ControllerHandle.\r
+ @retval EFI_ALREADY_STARTED This driver is already running on ControllerHandle.\r
+ @retval other This driver does not support this device.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
PciBusDriverBindingStart (\r
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
+/**\r
+ Stop this driver on ControllerHandle. Support stoping any child handles\r
+ created by this driver.\r
+\r
+ @param This Protocol instance pointer.\r
+ @param ControllerHandle Handle of device to stop driver on.\r
+ @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of\r
+ children is zero stop the entire bus driver.\r
+ @param ChildHandleBuffer List of Child Handles to Stop.\r
+\r
+ @retval EFI_SUCCESS This driver is removed ControllerHandle.\r
+ @retval other This driver was not removed from this device.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
PciBusDriverBindingStop (\r
**/\r
\r
\r
-#ifndef _EFI_PCI_COMMAND_H\r
-#define _EFI_PCI_COMMAND_H\r
+#ifndef _EFI_PCI_COMMAND_H_\r
+#define _EFI_PCI_COMMAND_H_\r
\r
//\r
// The PCI Command register bits owned by PCI Bus driver.\r
\r
**/\r
\r
-#ifndef _EFI_PCI_DEVICE_SUPPORT_H\r
-#define _EFI_PCI_DEVICE_SUPPORT_H\r
+#ifndef _EFI_PCI_DEVICE_SUPPORT_H_\r
+#define _EFI_PCI_DEVICE_SUPPORT_H_\r
\r
/**\r
Initialize the gPciDevicePool.\r
EFI_HANDLE RootBridgeHandle\r
);\r
\r
+/**\r
+ Check root bridge device is existed or not.\r
+\r
+ @param RootBridgeHandle Given root bridge handle.\r
+\r
+ @return root bridge device is existed or not.\r
+**/\r
BOOLEAN\r
RootBridgeExisted (\r
IN EFI_HANDLE RootBridgeHandle\r
/**\r
Add an overriding driver image\r
\r
- @param PciIoDevice Instance of PciIo device\r
- @param DriverImageHandle new added driver image\r
+ @param PciIoDevice Instance of PciIo device.\r
+ @param DriverImageHandle new added driver image.\r
\r
- @retval EFI_OUT_OF_RESOURCES no memory resource for new driver instance\r
- @retval EFI_SUCCESS Success add driver\r
+ @retval EFI_OUT_OF_RESOURCES no memory resource for new driver instance.\r
+ @retval EFI_SUCCESS Success add driver.\r
**/\r
EFI_STATUS\r
AddDriver (\r
**/\r
\r
\r
-#ifndef _EFI_PCI_DRIVER_OVERRRIDE_H\r
-#define _EFI_PCI_DRIVER_OVERRRIDE_H\r
+#ifndef _EFI_PCI_DRIVER_OVERRRIDE_H_\r
+#define _EFI_PCI_DRIVER_OVERRRIDE_H_\r
\r
#define DRIVER_OVERRIDE_SIGNATURE SIGNATURE_32 ('d', 'r', 'o', 'v')\r
\r
member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r
enumeration.\r
\r
- @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
- @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in\r
- InstallProtocolInterface() in the UEFI 2.0 Specification.\r
- @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI\r
- configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for\r
- the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r
+ @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
+ @param Bus The bus number of the pci device. \r
+ @param Device The device number of the pci device. \r
+ @param Func The function number of the pci device. \r
@param Phase The phase of the PCI device enumeration. \r
\r
@retval EFI_SUCCESS The requested parameters were returned.\r
@param This - A pointer to the hot plug request protocol.\r
@param Operation - The operation.\r
@param Controller - A pointer to the controller.\r
- @param RemainningDevicePath - A pointer to the device path.\r
+ @param RemainingDevicePath - A pointer to the device path.\r
@param NumberOfChildren - A the number of child handle in the ChildHandleBuffer.\r
@param ChildHandleBuffer - A pointer to the array contain the child handle.\r
\r
/**\r
Search hostbridge according to given handle\r
\r
- @return whether found\r
+ @param RootBridgeHandle - Host bridge handle.\r
+\r
+ @return TRUE Found.\r
+ @return FALSE Not found.\r
**/\r
BOOLEAN\r
SearchHostBridgeHandle (\r
**/\r
\r
\r
-#ifndef _EFI_PCI_ENUMERATOR_H\r
-#define _EFI_PCI_ENUMERATOR_H\r
+#ifndef _EFI_PCI_ENUMERATOR_H_\r
+#define _EFI_PCI_ENUMERATOR_H_\r
\r
#include "PciResourceSupport.h"\r
\r
member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r
enumeration.\r
\r
- @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
- @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in\r
- InstallProtocolInterface() in the UEFI 2.0 Specification.\r
- @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI\r
- configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for\r
- the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.\r
+ @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
+ @param Bus The bus number of the pci device. \r
+ @param Device The device number of the pci device. \r
+ @param Func The function number of the pci device. \r
@param Phase The phase of the PCI device enumeration. \r
\r
@retval EFI_SUCCESS The requested parameters were returned.\r
/**\r
Search hostbridge according to given handle\r
\r
- @return whether found.\r
+ @param RootBridgeHandle - Host bridge handle.\r
+\r
+ @return TRUE Found.\r
+ @return FALSE Not found.\r
**/\r
BOOLEAN\r
SearchHostBridgeHandle (\r
-/**@ file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
root bridge will then be created.\r
\r
@param Bridge Parent bridge instance.\r
- @param StartBusNumer Bus number of begining. \r
+ @param StartBusNumber Bus number of begining. \r
**/\r
EFI_STATUS\r
PciPciDeviceInfoCollector (\r
return EFI_NOT_FOUND;\r
}\r
\r
+/**\r
+ This routine can be used to start the root bridge.\r
+\r
+ @param RootBridgeDev Pci device instance.\r
+\r
+ @retval EFI_SUCCESS This device started.\r
+ \r
+**/\r
EFI_STATUS\r
StartManagingRootBridge (\r
IN PCI_IO_DEVICE *RootBridgeDev\r
-/**@ file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
**/\r
\r
\r
-#ifndef _EFI_PCI_ENUMERATOR_SUPPORT_H\r
-#define _EFI_PCI_ENUMERATOR_SUPPORT_H\r
+#ifndef _EFI_PCI_ENUMERATOR_SUPPORT_H_\r
+#define _EFI_PCI_ENUMERATOR_SUPPORT_H_\r
\r
/**\r
This routine is used to check whether the pci device is present.\r
root bridge will then be created.\r
\r
@param Bridge Parent bridge instance\r
- @param StartBusNumer Bus number of begining \r
+ @param StartBusNumber Bus number of begining \r
**/\r
EFI_STATUS\r
PciPciDeviceInfoCollector (\r
**/\r
EFI_STATUS\r
PciSearchDevice (\r
- IN PCI_IO_DEVICE *Bridge,\r
- PCI_TYPE00 *Pci,\r
- UINT8 Bus,\r
- UINT8 Device,\r
- UINT8 Func,\r
- PCI_IO_DEVICE **PciDevice\r
+ IN PCI_IO_DEVICE *Bridge,\r
+ IN PCI_TYPE00 *Pci,\r
+ IN UINT8 Bus,\r
+ IN UINT8 Device,\r
+ IN UINT8 Func,\r
+ OUT PCI_IO_DEVICE **PciDevice\r
);\r
\r
/**\r
OUT UINT16 *BusRange\r
);\r
\r
+/**\r
+ This routine can be used to start the root bridge.\r
+\r
+ @param RootBridgeDev Pci device instance.\r
+\r
+ @retval EFI_SUCCESS This device started.\r
+ \r
+**/\r
EFI_STATUS\r
StartManagingRootBridge (\r
IN PCI_IO_DEVICE *RootBridgeDev\r
-/**@ file\r
+/** @file\r
This module provide support function for hot plug device.\r
\r
Copyright (c) 2006, Intel Corporation \r
/**\r
Test whether device path is for root pci hot plug bus\r
\r
- @param HpbdevicePath tested device path.\r
+ @param HpbDevicePath tested device path.\r
@param HpIndex Return the index of root hot plug in global array.\r
\r
@retval TRUE device path is for root pci hot plug.\r
/**\r
Test whether device path is for root pci hot plug controller\r
\r
- @param HpbdevicePath tested device path.\r
+ @param HpcDevicePath tested device path.\r
@param HpIndex Return the index of root hot plug in global array.\r
\r
@retval TRUE device path is for root pci hot plug controller.\r
-/**@ file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
**/\r
\r
\r
-#ifndef _EFI_PCI_HOT_PLUG_SUPPORT_H\r
-#define _EFI_PCI_HOT_PLUG_SUPPORT_H\r
+#ifndef _EFI_PCI_HOT_PLUG_SUPPORT_H_\r
+#define _EFI_PCI_HOT_PLUG_SUPPORT_H_\r
\r
\r
//\r
-/**@file\r
+/** @file\r
Implement all interfaces for EFI_PCI_IO_PROTOCOL.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation \r
//\r
// Internal use only\r
//\r
+/**\r
+ report a error Status code of PCI bus driver controller.\r
+ \r
+ @param PciIoDevice Pci device instance.\r
+ @param Code status code.\r
+**/\r
EFI_STATUS\r
ReportErrorStatusCode (\r
IN PCI_IO_DEVICE *PciIoDevice,\r
};\r
\r
/**\r
- report a error Status code of PCI bus driver controller\r
+ report a error Status code of PCI bus driver controller.\r
\r
- @param PciIoDevice Pci device instance\r
- @param Code status code\r
+ @param PciIoDevice Pci device instance.\r
+ @param Code status code.\r
**/\r
EFI_STATUS\r
ReportErrorStatusCode (\r
}\r
\r
/**\r
- Initializes a PCI I/O Instance\r
+ Initializes a PCI I/O Instance.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
\r
- @retval EFI_SUCCESS Success operation\r
+ @retval EFI_SUCCESS Success operation.\r
**/\r
EFI_STATUS\r
InitializePciIoInstance (\r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL.\r
@param Width Signifies the width of the memory or I/O operations.\r
- @param Address The base address of the memory or I/O operations. \r
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r
+ base address for the memory or I/O operation to perform. \r
+ @param Offset The offset within the selected BAR to start the memory or I/O operation. \r
@param Mask Mask used for the polling criteria.\r
@param Value The comparison value used for the polling exit criteria.\r
@param Delay The number of 100 ns units to poll.\r
// Check if there have been an active VGA device on the same segment\r
//\r
Temp = ActiveVGADeviceOnTheSameSegment (PciIoDevice);\r
- if (Temp && Temp != PciIoDevice) {\r
+ if (Temp != NULL && Temp != PciIoDevice) {\r
//\r
// An active VGA has been detected, so can not enable another\r
//\r
// Enable relevant attributes to command register and bridge control register\r
//\r
Status = PciEnableCommandRegister (PciIoDevice, Command);\r
- if (BridgeControl) {\r
+ if (BridgeControl != 0) {\r
Status = PciEnableBridgeControlRegister (PciIoDevice, BridgeControl);\r
}\r
\r
// Disable relevant attributes to command register and bridge control register\r
//\r
Status = PciDisableCommandRegister (PciIoDevice, Command);\r
- if (BridgeControl) {\r
+ if (BridgeControl != 0) {\r
Status = PciDisableBridgeControlRegister (PciIoDevice, BridgeControl);\r
}\r
\r
\r
Parent = PciIoDevice->Parent;\r
\r
- while (Parent && IS_PCI_BRIDGE (&Parent->Pci)) {\r
+ while (Parent != NULL && IS_PCI_BRIDGE (&Parent->Pci)) {\r
\r
//\r
// Get the PciIo Protocol\r
**/\r
\r
\r
-#ifndef _EFI_PCI_IO_PROTOCOL_H\r
-#define _EFI_PCI_IO_PROTOCOL_H\r
+#ifndef _EFI_PCI_IO_PROTOCOL_H_\r
+#define _EFI_PCI_IO_PROTOCOL_H_\r
\r
/**\r
- Initializes a PCI I/O Instance\r
+ Initializes a PCI I/O Instance.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
\r
- @retval EFI_SUCCESS Success operation\r
+ @retval EFI_SUCCESS Success operation.\r
**/\r
EFI_STATUS\r
InitializePciIoInstance (\r
\r
@param This A pointer to the EFI_PCI_IO_PROTOCOL.\r
@param Width Signifies the width of the memory or I/O operations.\r
- @param Address The base address of the memory or I/O operations. \r
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the\r
+ base address for the memory or I/O operation to perform. \r
+ @param Offset The offset within the selected BAR to start the memory or I/O operation. \r
@param Mask Mask used for the polling criteria.\r
@param Value The comparison value used for the polling exit criteria.\r
@param Delay The number of 100 ns units to poll.\r
\r
/**\r
Install protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
\r
/**\r
UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
}\r
\r
/**\r
- Retrieve the BAR information via PciIo interface\r
+ Retrieve the BAR information via PciIo interface.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetBackPcCardBar (\r
Remove rejected pci device from specific root bridge\r
handle.\r
\r
- @param RootBridgeHandle specific parent root bridge handle\r
- @param Bridge Bridge device instance\r
+ @param RootBridgeHandle specific parent root bridge handle.\r
+ @param Bridge Bridge device instance.\r
\r
@retval EFI_SUCCESS Success operation.\r
**/\r
/**\r
Wrapper function for allocating resource for pci host bridge.\r
\r
- @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
**/\r
EFI_STATUS\r
}\r
\r
/**\r
- Submits the I/O and memory resource requirements for the specified PCI Root Bridge\r
+ Submits the I/O and memory resource requirements for the specified PCI Root Bridge.\r
\r
- @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
}\r
\r
/**\r
- Submits the I/O and memory resource requirements for the specified PCI Root Bridge\r
+ Submits the I/O and memory resource requirements for the specified PCI Root Bridge.\r
\r
- @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
\r
/**\r
Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
- Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug \r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.\r
\r
- @param Bridge Bridge device instance\r
- @param StartBusNumber start point\r
- @param SubBusNumber Point to sub bus number\r
- @param PaddedBusRange Customized bus number\r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
\r
- @retval EFI_SUCCESS Success\r
- @retval EFI_DEVICE_ERROR Fail to scan bus\r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus (\r
\r
/**\r
Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
- Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug \r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
\r
- @param Bridge Bridge device instance\r
- @param StartBusNumber start point\r
- @param SubBusNumber Point to sub bus number\r
- @param PaddedBusRange Customized bus number\r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
\r
- @retval EFI_SUCCESS Success\r
- @retval EFI_DEVICE_ERROR Fail to scan bus\r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus_WithoutHotPlugDeviceSupport (\r
\r
/**\r
Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
- Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug \r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
\r
- @param Bridge Bridge device instance\r
- @param StartBusNumber start point\r
- @param SubBusNumber Point to sub bus number\r
- @param PaddedBusRange Customized bus number\r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
\r
- @retval EFI_SUCCESS Success\r
- @retval EFI_DEVICE_ERROR Fail to scan bus\r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus_WithHotPlugDeviceSupport (\r
}\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param Bridge Pci bridge device instance\r
+ @param Bridge Pci bridge device instance.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
PciRootBridgeP2CProcess (\r
}\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
- @retval EFI_NOT_FOUND Can not find the root bridge instance\r
- @retval EFI_SUCCESS Success process\r
+ @retval EFI_NOT_FOUND Can not find the root bridge instance.\r
+ @retval EFI_SUCCESS Success process.\r
**/\r
EFI_STATUS\r
PciHostBridgeP2CProcess (\r
\r
/**\r
This function is used to enumerate the entire host bridge\r
- in a given platform\r
+ in a given platform.\r
\r
@param PciResAlloc A pointer to the resource allocate protocol.\r
\r
- @retval EFI_OUT_OF_RESOURCES no enough resource\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_OUT_OF_RESOURCES no enough resource.\r
+ @retval EFI_SUCCESS Success.\r
\r
**/\r
EFI_STATUS\r
@param PciIo A pointer to EFI_PCI_PROTOCOL.\r
@param PciDeviceInfo A pointer to EFI_PCI_DEVICE_INFO.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
@param PciDeviceInfo A pointer to EFI_PCI_DEVICE_INFO.\r
@param AccessType Access type, READ or WRITE.\r
- @Param Address The address within the PCI configuration space.\r
+ @param Width Signifies the width of the memory operations.\r
+ @param Address The address within the PCI configuration space.\r
@param Buffer Store the register data.\r
\r
@retval EFI_SUCCESS The data has been updated.\r
@param PciIo A pointer to EFI_PCI_PROTOCOL.\r
@param PciDeviceInfo A pointer to EFI_PCI_DEVICE_INFO.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param PciIo A pointer to EFI_PCI_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
@param PciDeviceInfo A pointer to EFI_PCI_DEVICE_INFO.\r
\r
@retval EFI_SUCCESS Pci device device information has been abstracted.\r
@param PciIo A pointer to the EFI_PCI_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciIo A pointer to the EFI_PCI_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be write.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
**/\r
\r
-#ifndef _EFI_PCI_LIB_H\r
-#define _EFI_PCI_LIB_H\r
+#ifndef _EFI_PCI_LIB_H_\r
+#define _EFI_PCI_LIB_H_\r
\r
//\r
// Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask\r
\r
/**\r
Install protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
\r
/**\r
UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device\r
- instance\r
+ instance.\r
\r
- @param PciIoDevice hotplug device instance\r
+ @param PciIoDevice hotplug device instance.\r
\r
**/\r
VOID\r
);\r
\r
/**\r
- Retrieve the BAR information via PciIo interface\r
+ Retrieve the BAR information via PciIo interface.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetBackPcCardBar (\r
Remove rejected pci device from specific root bridge\r
handle.\r
\r
- @param RootBridgeHandle specific parent root bridge handle\r
- @param Bridge Bridge device instance\r
+ @param RootBridgeHandle specific parent root bridge handle.\r
+ @param Bridge Bridge device instance.\r
\r
@retval EFI_SUCCESS Success operation.\r
**/\r
/**\r
Wrapper function for allocating resource for pci host bridge.\r
\r
- @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
**/\r
EFI_STATUS\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
);\r
\r
+/**\r
+ Wrapper function for allocating resource for pci host bridge without hotplug device support.\r
+ \r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
+ \r
+**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
);\r
\r
+/**\r
+ Wrapper function for allocating resource for pci host bridge with hotplug device support.\r
+ \r
+ @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
+ \r
+**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
\r
/**\r
Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
- Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug \r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
\r
- @param Bridge Bridge device instance\r
- @param StartBusNumber start point\r
- @param SubBusNumber Point to sub bus number\r
- @param PaddedBusRange Customized bus number\r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
\r
- @retval EFI_SUCCESS Success\r
- @retval EFI_DEVICE_ERROR Fail to scan bus\r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus (\r
OUT UINT8 *PaddedBusRange\r
);\r
\r
+/**\r
+ Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
+ \r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
+ \r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
+**/\r
EFI_STATUS\r
PciScanBus_WithHotPlugDeviceSupport (\r
IN PCI_IO_DEVICE *Bridge,\r
OUT UINT8 *PaddedBusRange\r
);\r
\r
+/**\r
+ Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
+ Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug. \r
+ \r
+ @param Bridge Bridge device instance.\r
+ @param StartBusNumber start point.\r
+ @param SubBusNumber Point to sub bus number.\r
+ @param PaddedBusRange Customized bus number.\r
+ \r
+ @retval EFI_SUCCESS Success.\r
+ @retval EFI_DEVICE_ERROR Fail to scan bus.\r
+**/\r
EFI_STATUS\r
PciScanBus_WithoutHotPlugDeviceSupport (\r
IN PCI_IO_DEVICE *Bridge,\r
);\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param Bridge Pci bridge device instance\r
+ @param Bridge Pci bridge device instance.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
-\r
EFI_STATUS\r
PciRootBridgeP2CProcess (\r
IN PCI_IO_DEVICE *Bridge\r
);\r
\r
/**\r
- Process Option Rom on this host bridge\r
+ Process Option Rom on this host bridge.\r
\r
- @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
+ @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
\r
- @retval EFI_NOT_FOUND Can not find the root bridge instance\r
- @retval EFI_SUCCESS Success process\r
+ @retval EFI_NOT_FOUND Can not find the root bridge instance.\r
+ @retval EFI_SUCCESS Success process.\r
**/\r
EFI_STATUS\r
PciHostBridgeP2CProcess (\r
\r
/**\r
This function is used to enumerate the entire host bridge\r
- in a given platform\r
+ in a given platform.\r
\r
@param PciResAlloc A pointer to the resource allocate protocol.\r
\r
- @retval EFI_OUT_OF_RESOURCES no enough resource\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_OUT_OF_RESOURCES no enough resource.\r
+ @retval EFI_SUCCESS Success.\r
\r
**/\r
-\r
EFI_STATUS\r
PciHostBridgeEnumerator (\r
EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
\r
@param PciIo A pointer to the EFI_PCI_O_PROTOCOL.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be write.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be write.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
@param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
@param Pci A pointer to PCI_TYPE00.\r
@param Width Signifies the width of the memory operations.\r
- @Param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Address The address within the PCI configuration space for the PCI controller.\r
+ @param Count The number of unit to be read.\r
@param Buffer For read operations, the destination buffer to store the results. For\r
write operations, the source buffer to write data from.\r
\r
EFI_STATUS\r
PciRootBridgeIoRead (\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
- IN PCI_TYPE00 *Pci,\r
+ IN PCI_TYPE00 *Pci, OPTIONAL\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
IN UINT64 Address,\r
IN UINTN Count,\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006 - 2008, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
/**\r
Get Pci device's oprom infor bits.\r
\r
+ @param PciIoDevice Pci device instance\r
+\r
@retval EFI_NOT_FOUND Pci device has not oprom\r
@retval EFI_SUCCESS Pci device has oprom\r
**/\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
\r
**/\r
\r
-#ifndef _EFI_PCI_OP_ROM_SUPPORT_H\r
-#define _EFI_PCI_OP_ROM_SUPPORT_H\r
+#ifndef _EFI_PCI_OP_ROM_SUPPORT_H_\r
+#define _EFI_PCI_OP_ROM_SUPPORT_H_\r
\r
/**\r
Get Pci device's oprom infor bits.\r
\r
+ @param PciIoDevice Pci device instance\r
+\r
@retval EFI_NOT_FOUND Pci device has not oprom\r
@retval EFI_SUCCESS Pci device has oprom\r
**/\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
\r
**/\r
\r
-#ifndef _EFI_PCI_POWER_MANAGEMENT_H\r
-#define _EFI_PCI_POWER_MANAGEMENT_H\r
+#ifndef _EFI_PCI_POWER_MANAGEMENT_H_\r
+#define _EFI_PCI_POWER_MANAGEMENT_H_\r
\r
/**\r
This function is intended to turn off PWE assertion and\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006 - 2008, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
@param Start address including VGA range\r
@param Length length of VGA range.\r
\r
- @retval EFI_SUCCESS success\r
+ @retval EFI_SUCCESS success.\r
**/\r
EFI_STATUS\r
SkipVGAAperture (\r
}\r
\r
/**\r
- This function is used to skip ISA aliasing aperture\r
+ This function is used to skip ISA aliasing aperture.\r
\r
- @param Start address including ISA aliasing aperture\r
- @param Length length of ISA aliasing aperture\r
+ @param Start address including ISA aliasing aperture.\r
+ @param Length length of ISA aliasing aperture.\r
\r
- @retval EFI_SUCCESS success\r
+ @retval EFI_SUCCESS success.\r
**/\r
EFI_STATUS\r
SkipIsaAliasAperture (\r
This function inserts a resource node into the resource list.\r
The resource list is sorted in descend order.\r
\r
- @param Bridge PCI resource node for bridge\r
- @param ResNode Resource node want to be inserted\r
+ @param Bridge PCI resource node for bridge.\r
+ @param ResNode Resource node want to be inserted.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
InsertResourceNode (\r
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource\r
type.\r
\r
- @param Dst Point to destination resource tree\r
- @param Res Point to source resource tree\r
+ @param Dst Point to destination resource tree.\r
+ @param Res Point to source resource tree.\r
@param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of \r
destination resource type.\r
\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
MergeResourceTree (\r
\r
@param Bridge PCI resource node for bridge.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CalculateApertureIo16 (\r
\r
/**\r
This function is used to calculate the resource aperture\r
- for a given bridge device\r
+ for a given bridge device.\r
\r
- @param Bridge Give bridge device\r
+ @param Bridge Give bridge device.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CalculateResourceAperture (\r
}\r
\r
/**\r
- Get IO/Memory resource infor for given PCI device\r
+ Get IO/Memory resource infor for given PCI device.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO .\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
GetResourceFromDevice (\r
}\r
\r
/**\r
- This function is used to create a resource node\r
-\r
- @param PciDev Pci device instance\r
- @param Length Length of Io/Memory resource\r
- @param Alignment Alignment of resource\r
- @param Bar Bar index \r
- @param ResType Type of resource: IO/Memory\r
- @param ResUage Resource usage\r
+ This function is used to create a resource node.\r
+\r
+ @param PciDev Pci device instance.\r
+ @param Length Length of Io/Memory resource.\r
+ @param Alignment Alignment of resource.\r
+ @param Bar Bar index.\r
+ @param ResType Type of resource: IO/Memory.\r
+ @param ResUsage Resource usage.\r
**/\r
PCI_RESOURCE_NODE *\r
CreateResourceNode (\r
This routine is used to extract resource request from\r
device node list.\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param Bridge Pci device instance.\r
+ @param IoNode Resource info node for IO.\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CreateResourceMap (\r
}\r
\r
/**\r
- This function is used to do the resource padding for a specific platform\r
+ This function is used to do the resource padding for a specific platform.\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO.\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ResourcePaddingPolicy (\r
doesn't support certain resource. Degradation path is \r
PMEM64 -> MEM64 -> MEM32\r
PMEM64 -> PMEM32 -> MEM32\r
- IO32 -> IO16\r
+ IO32 -> IO16.\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param Bridge Pci device instance.\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
DegradeResource (\r
/**\r
Test whether bridge device support decode resource\r
\r
- @param Bridge Bridge device instance\r
- @param Decode Decode type according to resource type\r
+ @param Bridge Bridge device instance.\r
+ @param Decode Decode type according to resource type.\r
\r
- @return whether bridge device support decode resource\r
+ @return TRUE bridge device support decode resource.\r
+ @return FALSE bridge device don't support decode resource.\r
\r
**/\r
BOOLEAN\r
\r
/**\r
This function is used to program the resource allocated \r
- for each resource node\r
+ for each resource node.\r
\r
\r
- @param Base Base address of resource\r
- @param Bridge Bridge device instance\r
+ @param Base Base address of resource.\r
+ @param Bridge Bridge device instance.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramResource (\r
/**\r
Program Bar register.\r
\r
- @param Base Base address for resource\r
- @param Node Point to resoure node structure\r
+ @param Base Base address for resource.\r
+ @param Node Point to resoure node structure.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramBar (\r
}\r
\r
/**\r
- Program PPB apperture\r
+ Program PPB apperture.\r
\r
- @param Base Base address for resource\r
- @param Node Point to resoure node structure\r
+ @param Base Base address for resource.\r
+ @param Node Point to resoure node structure.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramPpbApperture (\r
}\r
\r
/**\r
- Program parent bridge for oprom\r
+ Program parent bridge for oprom.\r
\r
- @param PciDevice Pci deivce instance\r
- @param OptionRomBase Base address for oprom\r
- @param Enable Enable/Disable\r
+ @param PciDevice Pci deivce instance.\r
+ @param OptionRomBase Base address for oprom.\r
+ @param Enable Enable/Disable.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgrameUpstreamBridgeForRom (\r
}\r
\r
/**\r
- Test whether resource exists for a bridge\r
+ Test whether resource exists for a bridge.\r
\r
- @param Bridge Point to resource node for a bridge \r
+ @param Bridge Point to resource node for a bridge.\r
\r
- @return whether resource exists\r
+ @return whether resource exists.\r
**/\r
BOOLEAN\r
ResourceRequestExisted (\r
/**\r
Initialize resource pool structure.\r
\r
- @param ResourcePool Point to resource pool structure\r
- @param ResourceType Type of resource\r
+ @param ResourcePool Point to resource pool structure.\r
+ @param ResourceType Type of resource.\r
**/\r
EFI_STATUS\r
InitializeResourcePool (\r
}\r
\r
/**\r
- Get all resource information for given Pci device\r
+ Get all resource information for given Pci device.\r
\r
- @param PciDev Pci device instance\r
- @param IoBridge Io resource node\r
- @param Mem32Bridge 32-bit memory node\r
- @param PMem32Bridge 32-bit Pmemory node\r
- @param Mem64Bridge 64-bit memory node\r
- @param PMem64Bridge 64-bit PMemory node\r
- @param IoPool Link list header for Io resource\r
- @param Mem32Pool Link list header for 32-bit memory\r
- @param PMem32Pool Link list header for 32-bit Pmemory\r
- @param Mem64Pool Link list header for 64-bit memory\r
- @param PMem64Pool Link list header for 64-bit Pmemory\r
+ @param PciDev Pci device instance.\r
+ @param IoBridge Io resource node.\r
+ @param Mem32Bridge 32-bit memory node.\r
+ @param PMem32Bridge 32-bit Pmemory node.\r
+ @param Mem64Bridge 64-bit memory node.\r
+ @param PMem64Bridge 64-bit PMemory node.\r
+ @param IoPool Link list header for Io resource.\r
+ @param Mem32Pool Link list header for 32-bit memory.\r
+ @param PMem32Pool Link list header for 32-bit Pmemory.\r
+ @param Mem64Pool Link list header for 64-bit memory.\r
+ @param PMem64Pool Link list header for 64-bit Pmemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
GetResourceMap (\r
}\r
\r
/**\r
- Destory given resource tree\r
+ Destory given resource tree.\r
\r
- @param Bridge root node of resource tree\r
+ @param Bridge root node of resource tree.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
DestroyResourceTree (\r
/**\r
Record the reserved resource and insert to reserved list.\r
\r
- @param Base Base address of reserved resourse\r
- @param Length Length of reserved resource \r
- @param ResType Resource type\r
- @param Bridge Pci device instance\r
+ @param Base Base address of reserved resourse.\r
+ @param Length Length of reserved resource. \r
+ @param ResType Resource type.\r
+ @param Bridge Pci device instance.\r
**/\r
EFI_STATUS\r
RecordReservedResource (\r
}\r
\r
/**\r
- Insert resource padding for P2C\r
+ Insert resource padding for P2C.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO. \r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ResourcePaddingForCardBusBridge (\r
/**\r
Create padding resource node.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO. \r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
\r
**/\r
EFI_STATUS\r
}\r
\r
/**\r
- Get padding resource for PPB\r
+ Get padding resource for PPB.\r
Light PCI bus driver woundn't support hotplug root device\r
- So no need to pad resource for them\r
+ So no need to pad resource for them.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetResourcePaddingPpb (\r
-/**@file\r
+/** @file\r
\r
Copyright (c) 2006, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
\r
**/\r
\r
-#ifndef _EFI_PCI_RESOURCE_SUPPORT_H\r
-#define _EFI_PCI_RESOURCE_SUPPORT_H\r
+#ifndef _EFI_PCI_RESOURCE_SUPPORT_H_\r
+#define _EFI_PCI_RESOURCE_SUPPORT_H_\r
\r
#define RESERVED_RESOURCE_SIGNATURE SIGNATURE_32 ('r', 's', 'v', 'd')\r
\r
@param Start address including VGA range\r
@param Length length of VGA range.\r
\r
- @retval EFI_SUCCESS success\r
+ @retval EFI_SUCCESS success.\r
**/\r
EFI_STATUS\r
SkipVGAAperture (\r
);\r
\r
/**\r
- This function is used to skip ISA aliasing aperture\r
+ This function is used to skip ISA aliasing aperture.\r
\r
- @param Start address including ISA aliasing aperture\r
- @param Length length of ISA aliasing aperture\r
+ @param Start address including ISA aliasing aperture.\r
+ @param Length length of ISA aliasing aperture.\r
\r
- @retval EFI_SUCCESS success\r
+ @retval EFI_SUCCESS success.\r
**/\r
EFI_STATUS\r
SkipIsaAliasAperture (\r
This function inserts a resource node into the resource list.\r
The resource list is sorted in descend order.\r
\r
- @param Bridge PCI resource node for bridge\r
- @param ResNode Resource node want to be inserted\r
+ @param Bridge PCI resource node for bridge.\r
+ @param ResNode Resource node want to be inserted.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
InsertResourceNode (\r
If the TypeMerge is TRUE, Res resource type is changed to the type of destination resource\r
type.\r
\r
- @param Dst Point to destination resource tree\r
- @param Res Point to source resource tree\r
+ @param Dst Point to destination resource tree.\r
+ @param Res Point to source resource tree.\r
@param TypeMerge If the TypeMerge is TRUE, Res resource type is changed to the type of \r
destination resource type.\r
\r
\r
@param Bridge PCI resource node for bridge.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CalculateApertureIo16 (\r
\r
/**\r
This function is used to calculate the resource aperture\r
- for a given bridge device\r
+ for a given bridge device.\r
\r
- @param Bridge Give bridge device\r
+ @param Bridge Give bridge device.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CalculateResourceAperture (\r
);\r
\r
/**\r
- Get IO/Memory resource infor for given PCI device\r
+ Get IO/Memory resource infor for given PCI device.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO .\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
GetResourceFromDevice (\r
);\r
\r
/**\r
- This function is used to create a resource node\r
-\r
- @param PciDev Pci device instance\r
- @param Length Length of Io/Memory resource\r
- @param Alignment Alignment of resource\r
- @param Bar Bar index \r
- @param ResType Type of resource: IO/Memory\r
- @param ResUage Resource usage\r
+ This function is used to create a resource node.\r
+\r
+ @param PciDev Pci device instance.\r
+ @param Length Length of Io/Memory resource.\r
+ @param Alignment Alignment of resource.\r
+ @param Bar Bar index.\r
+ @param ResType Type of resource: IO/Memory.\r
+ @param ResUsage Resource usage.\r
**/\r
PCI_RESOURCE_NODE *\r
CreateResourceNode (\r
This routine is used to extract resource request from\r
device node list.\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param Bridge Pci device instance.\r
+ @param IoNode Resource info node for IO.\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
CreateResourceMap (\r
);\r
\r
/**\r
- This function is used to do the resource padding for a specific platform\r
+ This function is used to do the resource padding for a specific platform.\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO. \r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ResourcePaddingPolicy (\r
PMEM64 -> PMEM32 -> MEM32\r
IO32 -> IO16\r
\r
- @param Bridge Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param Bridge Pci device instance.\r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
DegradeResource (\r
);\r
\r
/**\r
- Test whether bridge device support decode resource\r
+ Test whether bridge device support decode resource.\r
\r
- @param Bridge Bridge device instance\r
- @param Decode Decode type according to resource type\r
+ @param Bridge Bridge device instance.\r
+ @param Decode Decode type according to resource type.\r
\r
- @return whether bridge device support decode resource\r
+ @return whether bridge device support decode resource.\r
\r
**/\r
BOOLEAN\r
\r
/**\r
This function is used to program the resource allocated \r
- for each resource node\r
+ for each resource node.\r
\r
\r
- @param Base Base address of resource\r
- @param Bridge Bridge device instance\r
+ @param Base Base address of resource.\r
+ @param Bridge Bridge device instance.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramResource (\r
/**\r
Program Bar register.\r
\r
- @param Base Base address for resource\r
- @param Node Point to resoure node structure\r
+ @param Base Base address for resource.\r
+ @param Node Point to resoure node structure.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramBar (\r
);\r
\r
/**\r
- Program PPB apperture\r
+ Program PPB apperture.\r
\r
- @param Base Base address for resource\r
- @param Node Point to resoure node structure\r
+ @param Base Base address for resource.\r
+ @param Node Point to resoure node structure.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramPpbApperture (\r
);\r
\r
/**\r
- Program parent bridge for oprom\r
+ Program parent bridge for oprom.\r
\r
- @param PciDevice Pci deivce instance\r
- @param OptionRomBase Base address for oprom\r
- @param Enable Enable/Disable\r
+ @param PciDevice Pci deivce instance.\r
+ @param OptionRomBase Base address for oprom.\r
+ @param Enable Enable/Disable.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgrameUpstreamBridgeForRom (\r
);\r
\r
/**\r
- Test whether resource exists for a bridge\r
+ Test whether resource exists for a bridge.\r
\r
- @param Bridge Point to resource node for a bridge \r
+ @param Bridge Point to resource node for a bridge.\r
\r
- @return whether resource exists\r
+ @return whether resource exists.\r
**/\r
BOOLEAN\r
ResourceRequestExisted (\r
/**\r
Initialize resource pool structure.\r
\r
- @param ResourcePool Point to resource pool structure\r
- @param ResourceType Type of resource\r
+ @param ResourcePool Point to resource pool structure.\r
+ @param ResourceType Type of resource.\r
**/\r
EFI_STATUS\r
InitializeResourcePool (\r
);\r
\r
/**\r
- Get all resource information for given Pci device\r
- \r
- @param PciDev Pci device instance\r
- @param IoBridge Io resource node\r
- @param Mem32Bridge 32-bit memory node\r
- @param PMem32Bridge 32-bit Pmemory node\r
- @param Mem64Bridge 64-bit memory node\r
- @param PMem64Bridge 64-bit PMemory node\r
- @param IoPool Link list header for Io resource\r
- @param Mem32Pool Link list header for 32-bit memory\r
- @param PMem32Pool Link list header for 32-bit Pmemory\r
- @param Mem64Pool Link list header for 64-bit memory\r
- @param PMem64Pool Link list header for 64-bit Pmemory\r
- \r
- @retval EFI_SUCCESS Success\r
+ Get all resource information for given Pci device.\r
+ \r
+ @param PciDev Pci device instance.\r
+ @param IoBridge Io resource node.\r
+ @param Mem32Bridge 32-bit memory node.\r
+ @param PMem32Bridge 32-bit Pmemory node.\r
+ @param Mem64Bridge 64-bit memory node.\r
+ @param PMem64Bridge 64-bit PMemory node.\r
+ @param IoPool Link list header for Io resource.\r
+ @param Mem32Pool Link list header for 32-bit memory.\r
+ @param PMem32Pool Link list header for 32-bit Pmemory.\r
+ @param Mem64Pool Link list header for 64-bit memory.\r
+ @param PMem64Pool Link list header for 64-bit Pmemory.\r
+ \r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
GetResourceMap (\r
);\r
\r
/**\r
- Destory given resource tree\r
+ Destory given resource tree.\r
\r
- @param Bridge root node of resource tree\r
+ @param Bridge root node of resource tree.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
DestroyResourceTree (\r
/**\r
Record the reserved resource and insert to reserved list.\r
\r
- @param Base Base address of reserved resourse\r
- @param Length Length of reserved resource \r
- @param ResType Resource type\r
- @param Bridge Pci device instance\r
+ @param Base Base address of reserved resourse.\r
+ @param Length Length of reserved resource.\r
+ @param ResType Resource type.\r
+ @param Bridge Pci device instance.\r
**/\r
EFI_STATUS\r
RecordReservedResource (\r
);\r
\r
/**\r
- Insert resource padding for P2C\r
+ Insert resource padding for P2C.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO. \r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ResourcePaddingForCardBusBridge (\r
);\r
\r
/**\r
- Program P2C register for given resource node\r
+ Program P2C register for given resource node.\r
\r
- @param Base Base address of P2C device\r
+ @param Base Base address of P2C device.\r
@param Node Given resource node.\r
\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
ProgramP2C (\r
/**\r
Create padding resource node.\r
\r
- @param PciDev Pci device instance\r
- @param IoNode Resource info node for IO \r
- @param Mem32Node Resource info node for 32-bit memory\r
- @param PMem32Node Resource info node for 32-bit PMemory\r
- @param Mem64Node Resource info node for 64-bit memory\r
- @param PMem64Node Resource info node for 64-bit PMemory\r
+ @param PciDev Pci device instance.\r
+ @param IoNode Resource info node for IO. \r
+ @param Mem32Node Resource info node for 32-bit memory.\r
+ @param PMem32Node Resource info node for 32-bit PMemory.\r
+ @param Mem64Node Resource info node for 64-bit memory.\r
+ @param PMem64Node Resource info node for 64-bit PMemory.\r
\r
@retval EFI_SUCCESS Success\r
\r
/**\r
Get padding resource for PPB\r
Light PCI bus driver woundn't support hotplug root device\r
- So no need to pad resource for them\r
+ So no need to pad resource for them.\r
\r
- @param PciIoDevice Pci device instance\r
+ @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetResourcePaddingPpb (\r
/**\r
Reset and all bus number from specific bridge.\r
\r
- @param Bridge Parent specific bridge\r
- @param StartBusNumber start bus number\r
+ @param Bridge Parent specific bridge.\r
+ @param StartBusNumber start bus number.\r
**/\r
EFI_STATUS\r
ResetAllPpbBusNumber (\r
-/**@file\r
+/** @file\r
Option Rom Support for PCI Bus Driver\r
\r
Copyright (c) 2006, Intel Corporation \r
EFI_PCI_ROM_IMAGE_MAPPING *mRomImageTable = NULL;\r
\r
/**\r
- Add the Rom Image to internal database for later PCI light enumeration\r
+ Add the Rom Image to internal database for later PCI light enumeration.\r
\r
- @param ImageHandle Option Rom image handle\r
- @param Seg Segment of PCI space\r
- @param Bus Bus NO of PCI space\r
- @param Dev Dev NO of PCI space\r
- @param Func Func NO of PCI space\r
- @param RomAddress Base address of OptionRom\r
+ @param ImageHandle Option Rom image handle.\r
+ @param Seg Segment of PCI space.\r
+ @param Bus Bus NO of PCI space.\r
+ @param Dev Dev NO of PCI space.\r
+ @param Func Func NO of PCI space.\r
+ @param RomAddress Base address of OptionRom.\r
@param RomLength Length of rom image.\r
**/\r
VOID\r
-/**@file\r
+/** @file\r
Option Rom Support for PCI Bus Driver\r
\r
Copyright (c) 2006, Intel Corporation \r
\r
**/\r
\r
-#ifndef _EFI_PCI_ROM_TABLE_H\r
-#define _EFI_PCI_ROM_TABLE_H\r
+#ifndef _EFI_PCI_ROM_TABLE_H_\r
+#define _EFI_PCI_ROM_TABLE_H_\r
\r
/**\r
- Add the Rom Image to internal database for later PCI light enumeration\r
+ Add the Rom Image to internal database for later PCI light enumeration.\r
\r
- @param ImageHandle Option Rom image handle\r
- @param Seg Segment of PCI space\r
- @param Bus Bus NO of PCI space\r
- @param Dev Dev NO of PCI space\r
- @param Func Func NO of PCI space\r
- @param RomAddress Base address of OptionRom\r
+ @param ImageHandle Option Rom image handle.\r
+ @param Seg Segment of PCI space.\r
+ @param Bus Bus NO of PCI space.\r
+ @param Dev Dev NO of PCI space.\r
+ @param Func Func NO of PCI space.\r
+ @param RomAddress Base address of OptionRom.\r
@param RomLength Length of rom image.\r
**/\r
VOID\r
/**\r
Load all option rom image to PCI driver list.\r
\r
- @param This Pointer to protocol instance EFI_DRIVER_BINDING_PROTOCOL\r
- @param PciRootBridgeIo Root bridge Io instance\r
- @param PciIoDevice device instance\r
+ @param This Pointer to protocol instance EFI_DRIVER_BINDING_PROTOCOL.\r
+ @param PciRootBridgeIo Root bridge Io instance.\r
+ @param PciIoDevice device instance.\r
**/\r
EFI_STATUS\r
PciRomGetRomResourceFromPciOptionRomTable (\r
/**\r
Driver entry point for VgaMiniPort driver.\r
\r
- @param ImageHandle Driver image handle\r
- @param SystemTable Point to EFI_SYSTEM_TABLE\r
+ @param ImageHandle Driver image handle.\r
+ @param SystemTable Point to EFI_SYSTEM_TABLE.\r
\r
@retval Status of install driver binding protocol.\r
**/\r
\r
(Standard DriverBinding Protocol Supported() function)\r
\r
- @return EFI_STATUS\r
+ @param This The driver binding protocol.\r
+ @param Controller The controller handle to check.\r
+ @param RemainingDevicePath The remaining device path.\r
+\r
+ @retval EFI_SUCCESS The driver supports this controller.\r
+ @retval EFI_UNSUPPORTED This device isn't supported.\r
\r
**/\r
EFI_STATUS\r
\r
(Standard DriverBinding Protocol Start() function)\r
\r
- @return EFI_STATUS\r
+ @param This The driver binding instance.\r
+ @param Controller The controller to check.\r
+ @param RemainingDevicePath The remaining device patch.\r
+\r
+ @retval EFI_SUCCESS The controller is controlled by the driver.\r
+ @retval EFI_ALREADY_STARTED The controller is already controlled by the driver.\r
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate resources.\r
\r
**/\r
EFI_STATUS\r
This->DriverBindingHandle,\r
Controller\r
);\r
- if (PciVgaMiniPortPrivate) {\r
+ if (PciVgaMiniPortPrivate != NULL) {\r
gBS->FreePool (PciVgaMiniPortPrivate);\r
}\r
}\r
\r
(Standard DriverBinding Protocol Stop() function)\r
\r
- @return EFI_STATUS\r
+ @param This The driver binding protocol.\r
+ @param Controller The controller to release.\r
+ @param NumberOfChildren The child number that opened controller\r
+ BY_CHILD.\r
+ @param ChildHandleBuffer The array of child handle.\r
+\r
+ @retval EFI_SUCCESS The controller or children are stopped.\r
+ @retval EFI_DEVICE_ERROR Failed to stop the driver.\r
\r
**/\r
EFI_STATUS\r
//\r
\r
/**\r
- Thunk function of EFI_VGA_MINI_PORT_SET_MODE\r
+ Thunk function of EFI_VGA_MINI_PORT_SET_MODE.\r
\r
- @param This Point to instance of EFI_VGA_MINI_PORT_PROTOCOL\r
- @param ModeNumber Mode number\r
+ @param This Point to instance of EFI_VGA_MINI_PORT_PROTOCOL.\r
+ @param ModeNumber Mode number.\r
\r
- @retval EFI_UNSUPPORTED Invalid mode number\r
- @retval EFI_SUCCESS Success\r
+ @retval EFI_UNSUPPORTED Invalid mode number.\r
+ @retval EFI_SUCCESS Success.\r
\r
**/\r
EFI_STATUS\r
\r
**/\r
\r
-#ifndef _VGA_MINIPORT_H\r
-#define _VGA_MINIPORT_H\r
+#ifndef _VGA_MINIPORT_H_\r
+#define _VGA_MINIPORT_H_\r
\r
//\r
// The package level header files this module uses\r
//\r
// Driver Binding Protocol functions\r
//\r
+/**\r
+ Supported.\r
+\r
+ (Standard DriverBinding Protocol Supported() function)\r
+\r
+ @param This The driver binding protocol.\r
+ @param Controller The controller handle to check.\r
+ @param RemainingDevicePath The remaining device path.\r
+\r
+ @retval EFI_SUCCESS The driver supports this controller.\r
+ @retval EFI_UNSUPPORTED This device isn't supported.\r
+\r
+**/\r
EFI_STATUS\r
+EFIAPI\r
PciVgaMiniPortDriverBindingSupported (\r
IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
IN EFI_HANDLE Controller,\r
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
+/**\r
+ Install VGA Mini Port Protocol onto VGA device handles\r
+\r
+ (Standard DriverBinding Protocol Start() function)\r
+\r
+ @param This The driver binding instance.\r
+ @param Controller The controller to check.\r
+ @param RemainingDevicePath The remaining device patch.\r
+\r
+ @retval EFI_SUCCESS The controller is controlled by the driver.\r
+ @retval EFI_ALREADY_STARTED The controller is already controlled by the driver.\r
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate resources.\r
+\r
+**/\r
EFI_STATUS\r
+EFIAPI\r
PciVgaMiniPortDriverBindingStart (\r
IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
IN EFI_HANDLE Controller,\r
IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
+/**\r
+ Stop.\r
+\r
+ (Standard DriverBinding Protocol Stop() function)\r
+\r
+ @param This The driver binding protocol.\r
+ @param Controller The controller to release.\r
+ @param NumberOfChildren The child number that opened controller\r
+ BY_CHILD.\r
+ @param ChildHandleBuffer The array of child handle.\r
+\r
+ @retval EFI_SUCCESS The controller or children are stopped.\r
+ @retval EFI_DEVICE_ERROR Failed to stop the driver.\r
+\r
+**/\r
EFI_STATUS\r
+EFIAPI\r
PciVgaMiniPortDriverBindingStop (\r
IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
IN EFI_HANDLE Controller,\r
//\r
// VGA Mini Port Protocol functions\r
//\r
+/**\r
+ Thunk function of EFI_VGA_MINI_PORT_SET_MODE.\r
+\r
+ @param This Point to instance of EFI_VGA_MINI_PORT_PROTOCOL.\r
+ @param ModeNumber Mode number.\r
+\r
+ @retval EFI_UNSUPPORTED Invalid mode number.\r
+ @retval EFI_SUCCESS Success.\r
+\r
+**/\r
EFI_STATUS\r
EFIAPI\r
PciVgaMiniPortSetMode (\r
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