Temporarily remove the C implementation of some GCC assembly files in MdePkg. They...

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10045 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index c41b7a862c69ccc6871e347e9326c07ea155db49..28c7731e1950a9e77d69e4bb132f902e290edc4e 100644 (file)
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -4,7 +4,7 @@
 #  CPU Library implemented using ASM functions for IA-32 and X64,\r
 #  PAL CALLs for IPF, and empty functions for EBC.\r
 #\r
-#  Copyright (c) 2007 - 2008, Intel Corporation.<BR>\r
+#  Copyright (c) 2007 - 2010, Intel Corporation.<BR>\r
 #  Portions Copyright (c) 2008-2009 Apple Inc. All rights reserved.\r
 #\r
 #  All rights reserved. This program and the accompanying materials\r
@@ -30,8 +30,6 @@
 #  VALID_ARCHITECTURES           = IA32 X64 IPF EBC ARM\r
 #\r
 \r
-[Sources.common]\r
-\r
 [Sources.IA32]\r
   Ia32/CpuSleep.c | MSFT \r
   Ia32/CpuFlushTlb.c | MSFT \r

diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
deleted file mode 100644 (file)
index f8c3a25..0000000
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuFlushTlbGcc.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/** @file\r
-  CpuFlushTlb function for Ia32/X64 GCC.\r
-\r
-  Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Library/BaseLib.h>\r
-\r
-/**\r
-  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
-\r
-  Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuFlushTlb (\r
-  VOID\r
-  )\r
-{\r
-  AsmWriteCr3 (AsmReadCr3 ());\r
-}\r
-\r

diff --git a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c b/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
deleted file mode 100644 (file)
index fb5ca29..0000000
--- a/MdePkg/Library/BaseCpuLib/Ia32/CpuSleepGcc.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/** @file\r
-  CpuSleep function for Ia32/X64 GCC.\r
-\r
-  Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-/**\r
-  Places the CPU in a sleep state until an interrupt is received.\r
-\r
-  Places the CPU in a sleep state until an interrupt is received. If interrupts\r
-  are disabled prior to calling this function, then the CPU will be placed in a\r
-  sleep state indefinitely.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuSleep (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("hlt"::: "memory");\r
-}\r
-\r

diff --git a/MdePkg/Library/BaseLib/Ia32/GccInline.c b/MdePkg/Library/BaseLib/Ia32/GccInline.c
deleted file mode 100644 (file)
index d603b3f..0000000
--- a/MdePkg/Library/BaseLib/Ia32/GccInline.c
+++ /dev/null
@@ -1,1758 +0,0 @@
-/** @file\r
-  GCC inline implementation of BaseLib processor specific functions.\r
-  \r
-  Copyright (c) 2006 - 2010, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#include "BaseLibInternals.h"\r
-\r
-\r
-\r
-/**\r
-  Used to serialize load and store operations.\r
-\r
-  All loads and stores that proceed calls to this function are guaranteed to be\r
-  globally visible when this function returns.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-MemoryFence (\r
-  VOID\r
-  )\r
-{\r
-  // This is a little bit of overkill and it is more about the compiler that it is\r
-  // actually processor syncronization. This is like the _ReadWriteBarrier \r
-  // Microsft specific intrinsic\r
-  __asm__ __volatile__ ("":::"memory");\r
-}\r
-\r
-\r
-/**\r
-  Enables CPU interrupts.\r
-\r
-  Enables CPU interrupts.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-EnableInterrupts (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("sti"::: "memory");\r
-}\r
-\r
-\r
-/**\r
-  Disables CPU interrupts.\r
-\r
-  Disables CPU interrupts.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-DisableInterrupts (\r
-  VOID\r
-  )\r
-{  \r
-  __asm__ __volatile__ ("cli"::: "memory");\r
-}\r
-\r
-\r
-\r
-\r
-/**\r
-  Requests CPU to pause for a short period of time.\r
-\r
-  Requests CPU to pause for a short period of time. Typically used in MP\r
-  systems to prevent memory starvation while waiting for a spin lock.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuPause (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("pause");\r
-}\r
-\r
-\r
-/**\r
-  Generates a breakpoint on the CPU.\r
-\r
-  Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
-  that code can resume normal execution after the breakpoint.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuBreakpoint (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("int $3");\r
-}\r
-\r
-\r
-\r
-/**\r
-  Returns a 64-bit Machine Specific Register(MSR).\r
-\r
-  Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
-  performed on Index, and some Index values may cause CPU exceptions. The\r
-  caller must either guarantee that Index is valid, or the caller must set up\r
-  exception handlers to catch the exceptions. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @param  Index The 32-bit MSR index to read.\r
-\r
-  @return The value of the MSR identified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMsr64 (\r
-  IN      UINT32                    Index\r
-  )\r
-{\r
-  UINT64 Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdmsr"\r
-    : "=A" (Data)   // %0\r
-    : "c"  (Index)  // %1\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-/**\r
-  Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
-  value.\r
-\r
-  Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
-  64-bit value written to the MSR is returned. No parameter checking is\r
-  performed on Index or Value, and some of these may cause CPU exceptions. The\r
-  caller must either guarantee that Index and Value are valid, or the caller\r
-  must establish proper exception handlers. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @param  Index The 32-bit MSR index to write.\r
-  @param  Value The 64-bit value to write to the MSR.\r
-\r
-  @return Value\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteMsr64 (\r
-  IN      UINT32                    Index,\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "wrmsr"\r
-    :\r
-    : "c" (Index),\r
-      "A" (Value)\r
-    );\r
-    \r
-  return Value;\r
-}\r
-\r
-\r
-\r
-/**\r
-  Reads the current value of the EFLAGS register.\r
-\r
-  Reads and returns the current value of the EFLAGS register. This function is\r
-  only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r
-  64-bit value on X64.\r
-\r
-  @return EFLAGS on IA-32 or RFLAGS on X64.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadEflags (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Eflags;\r
-  \r
-  __asm__ __volatile__ (\r
-    "pushfl     \n\t"\r
-    "popl %0        "\r
-    : "=r" (Eflags)\r
-    );\r
-    \r
-  return Eflags;\r
-}\r
-\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 0 (CR0).\r
-\r
-  Reads and returns the current value of CR0. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 0 (CR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr0 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN   Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%cr0,%0" \r
-    : "=a" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 2 (CR2).\r
-\r
-  Reads and returns the current value of CR2. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 2 (CR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr2 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%cr2, %0" \r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-/**\r
-  Reads the current value of the Control Register 3 (CR3).\r
-\r
-  Reads and returns the current value of CR3. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 3 (CR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr3 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%cr3, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 4 (CR4).\r
-\r
-  Reads and returns the current value of CR4. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 4 (CR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr4 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%cr4, %0"\r
-    : "=a" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 0 (CR0).\r
-\r
-  Writes and returns a new value to CR0. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr0 The value to write to CR0.\r
-\r
-  @return The value written to CR0.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr0 (\r
-  UINTN  Cr0\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%cr0"\r
-    :\r
-    : "r" (Cr0)\r
-    );\r
-  return Cr0;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 2 (CR2).\r
-\r
-  Writes and returns a new value to CR2. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr2 The value to write to CR2.\r
-\r
-  @return The value written to CR2.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr2 (\r
-  UINTN  Cr2\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%cr2"\r
-    :\r
-    : "r" (Cr2)\r
-    );\r
-  return Cr2;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 3 (CR3).\r
-\r
-  Writes and returns a new value to CR3. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr3 The value to write to CR3.\r
-\r
-  @return The value written to CR3.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr3 (\r
-  UINTN  Cr3\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%cr3"\r
-    :\r
-    : "r" (Cr3)\r
-    );\r
-  return Cr3;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 4 (CR4).\r
-\r
-  Writes and returns a new value to CR4. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr4 The value to write to CR4.\r
-\r
-  @return The value written to CR4.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr4 (\r
-  UINTN  Cr4\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%cr4"\r
-    :\r
-    : "r" (Cr4)\r
-    );\r
-  return Cr4;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 0 (DR0).\r
-\r
-  Reads and returns the current value of DR0. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 0 (DR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr0 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr0, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 1 (DR1).\r
-\r
-  Reads and returns the current value of DR1. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 1 (DR1).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr1 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr1, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 2 (DR2).\r
-\r
-  Reads and returns the current value of DR2. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 2 (DR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr2 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr2, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 3 (DR3).\r
-\r
-  Reads and returns the current value of DR3. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 3 (DR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr3 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr3, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 4 (DR4).\r
-\r
-  Reads and returns the current value of DR4. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 4 (DR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr4 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr4, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 5 (DR5).\r
-\r
-  Reads and returns the current value of DR5. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 5 (DR5).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr5 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr5, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 6 (DR6).\r
-\r
-  Reads and returns the current value of DR6. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 6 (DR6).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr6 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr6, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 7 (DR7).\r
-\r
-  Reads and returns the current value of DR7. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 7 (DR7).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr7 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "movl %%dr7, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 0 (DR0).\r
-\r
-  Writes and returns a new value to DR0. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr0 The value to write to Dr0.\r
-\r
-  @return The value written to Debug Register 0 (DR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr0 (\r
-  UINTN  Dr0\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr0"\r
-    :\r
-    : "r" (Dr0)\r
-    );\r
-  return Dr0;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 1 (DR1).\r
-\r
-  Writes and returns a new value to DR1. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr1 The value to write to Dr1.\r
-\r
-  @return The value written to Debug Register 1 (DR1).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr1 (\r
-  UINTN  Dr1\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr1"\r
-    :\r
-    : "r" (Dr1)\r
-    );\r
-  return Dr1;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 2 (DR2).\r
-\r
-  Writes and returns a new value to DR2. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr2 The value to write to Dr2.\r
-\r
-  @return The value written to Debug Register 2 (DR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr2 (\r
-  UINTN  Dr2\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr2"\r
-    :\r
-    : "r" (Dr2)\r
-    );\r
-  return Dr2;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 3 (DR3).\r
-\r
-  Writes and returns a new value to DR3. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr3 The value to write to Dr3.\r
-\r
-  @return The value written to Debug Register 3 (DR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr3 (\r
-  UINTN  Dr3\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr3"\r
-    :\r
-    : "r" (Dr3)\r
-    );\r
-  return Dr3;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 4 (DR4).\r
-\r
-  Writes and returns a new value to DR4. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr4 The value to write to Dr4.\r
-\r
-  @return The value written to Debug Register 4 (DR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr4 (\r
-  UINTN  Dr4\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr4"\r
-    :\r
-    : "r" (Dr4)\r
-    );\r
-  return Dr4;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 5 (DR5).\r
-\r
-  Writes and returns a new value to DR5. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr5 The value to write to Dr5.\r
-\r
-  @return The value written to Debug Register 5 (DR5).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr5 (\r
-  UINTN  Dr5\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr5"\r
-    :\r
-    : "r" (Dr5)\r
-    );\r
-  return Dr5;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 6 (DR6).\r
-\r
-  Writes and returns a new value to DR6. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr6 The value to write to Dr6.\r
-\r
-  @return The value written to Debug Register 6 (DR6).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr6 (\r
-  UINTN  Dr6\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr6"\r
-    :\r
-    : "r" (Dr6)\r
-    );\r
-  return Dr6;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 7 (DR7).\r
-\r
-  Writes and returns a new value to DR7. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr7 The value to write to Dr7.\r
-\r
-  @return The value written to Debug Register 7 (DR7).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr7 (\r
-  UINTN  Dr7\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movl %0, %%dr7"\r
-    :\r
-    : "r" (Dr7)\r
-    );\r
-  return Dr7;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Code Segment Register (CS).\r
-\r
-  Reads and returns the current value of CS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of CS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadCs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov   %%cs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Data Segment Register (DS).\r
-\r
-  Reads and returns the current value of DS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of DS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadDs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%ds, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Extra Segment Register (ES).\r
-\r
-  Reads and returns the current value of ES. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of ES.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadEs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%es, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of FS Data Segment Register (FS).\r
-\r
-  Reads and returns the current value of FS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of FS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadFs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%fs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of GS Data Segment Register (GS).\r
-\r
-  Reads and returns the current value of GS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of GS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadGs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%gs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Stack Segment Register (SS).\r
-\r
-  Reads and returns the current value of SS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of SS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadSs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%ds, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Task Register (TR).\r
-\r
-  Reads and returns the current value of TR. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of TR.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadTr (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "str  %0"\r
-    : "=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
-  function is only available on IA-32 and X64.\r
-\r
-  @param  Gdtr  Pointer to a GDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86ReadGdtr (\r
-  OUT     IA32_DESCRIPTOR           *Gdtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "sgdt %0"\r
-    : "=m" (*Gdtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
-\r
-  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Gdtr  Pointer to a GDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86WriteGdtr (\r
-  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lgdt %0"\r
-    :\r
-    : "m" (*Gdtr)\r
-    );\r
-    \r
-}\r
-\r
-\r
-/**\r
-  Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
-  function is only available on IA-32 and X64.\r
-\r
-  @param  Idtr  Pointer to a IDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86ReadIdtr (\r
-  OUT     IA32_DESCRIPTOR           *Idtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "sldt  %0"\r
-    : "=m" (*Idtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Idtr  Pointer to a IDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86WriteIdtr (\r
-  IN      CONST IA32_DESCRIPTOR     *Idtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lidt %0"\r
-    :\r
-    : "m" (*Idtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current Local Descriptor Table Register(LDTR) selector.\r
-\r
-  Reads and returns the current 16-bit LDTR descriptor value. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @return The current selector of LDT.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadLdtr (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "sldt  %0"\r
-    : "=g" (Data)   // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Local Descriptor Table Register (GDTR) selector.\r
-\r
-  Writes and the current LDTR descriptor specified by Ldtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Ldtr  16-bit LDTR selector value.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteLdtr (\r
-  IN      UINT16                    Ldtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lldtw  %0"\r
-    :\r
-    : "g" (Ldtr)   // %0\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Save the current floating point/SSE/SSE2 context to a buffer.\r
-\r
-  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
-  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
-  available on IA-32 and X64.\r
-\r
-  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86FxSave (\r
-  OUT     IA32_FX_BUFFER            *Buffer\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "fxsave %0"\r
-    :\r
-    : "m" (*Buffer)  // %0\r
-    );    \r
-}\r
-\r
-\r
-/**\r
-  Restores the current floating point/SSE/SSE2 context from a buffer.\r
-\r
-  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
-  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86FxRestore (\r
-  IN      CONST IA32_FX_BUFFER      *Buffer\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "fxrstor %0"\r
-    :\r
-    : "m" (*Buffer)  // %0\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #0 (MM0).\r
-\r
-  Reads and returns the current value of MM0. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm0 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm0,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #1 (MM1).\r
-\r
-  Reads and returns the current value of MM1. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm1 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm1,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #2 (MM2).\r
-\r
-  Reads and returns the current value of MM2. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM2.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm2 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm2,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #3 (MM3).\r
-\r
-  Reads and returns the current value of MM3. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM3.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm3 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm3,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #4 (MM4).\r
-\r
-  Reads and returns the current value of MM4. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM4.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm4 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm4,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #5 (MM5).\r
-\r
-  Reads and returns the current value of MM5. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM5.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm5 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm5,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #6 (MM6).\r
-\r
-  Reads and returns the current value of MM6. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM6.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm6 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm6,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #7 (MM7).\r
-\r
-  Reads and returns the current value of MM7. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM7.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm7 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "push %%eax          \n\t"\r
-    "push %%eax          \n\t"\r
-    "movq %%mm7,  (%%esp)\n\t"\r
-    "pop  %%eax          \n\t"\r
-    "pop  %%edx          \n\t"\r
-    : "=A"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #0 (MM0).\r
-\r
-  Writes the current value of MM0. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM0.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm0 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm0"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #1 (MM1).\r
-\r
-  Writes the current value of MM1. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM1.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm1 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm1"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #2 (MM2).\r
-\r
-  Writes the current value of MM2. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM2.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm2 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm2"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #3 (MM3).\r
-\r
-  Writes the current value of MM3. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM3.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm3 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm3"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #4 (MM4).\r
-\r
-  Writes the current value of MM4. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM4.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm4 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm4"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #5 (MM5).\r
-\r
-  Writes the current value of MM5. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM5.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm5 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm5"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #6 (MM6).\r
-\r
-  Writes the current value of MM6. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM6.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm6 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm6"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #7 (MM7).\r
-\r
-  Writes the current value of MM7. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM7.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm7 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movq %0, %%mm7"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Time Stamp Counter (TSC).\r
-\r
-  Reads and returns the current value of TSC. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of TSC\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadTsc (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdtsc"\r
-    : "=A" (Data)\r
-    );\r
-  \r
-  return Data;  \r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of a Performance Counter (PMC).\r
-\r
-  Reads and returns the current value of performance counter specified by\r
-  Index. This function is only available on IA-32 and X64.\r
-\r
-  @param  Index The 32-bit Performance Counter index to read.\r
-\r
-  @return The value of the PMC specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPmc (\r
-  IN      UINT32                    Index\r
-  )\r
-{\r
-  UINT64  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdpmc"\r
-    : "=A" (Data)\r
-    : "c"  (Index)\r
-    );\r
-  \r
-  return Data;  \r
-}\r
-\r
-\r
-\r
-\r
-/**\r
-  Executes a WBINVD instruction.\r
-\r
-  Executes a WBINVD instruction. This function is only available on IA-32 and\r
-  X64.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWbinvd (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("wbinvd":::"memory");\r
-}\r
-\r
-\r
-/**\r
-  Executes a INVD instruction.\r
-\r
-  Executes a INVD instruction. This function is only available on IA-32 and\r
-  X64.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmInvd (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("invd":::"memory");\r
-    \r
-}\r
-\r
-\r
-/**\r
-  Flushes a cache line from all the instruction and data caches within the\r
-  coherency domain of the CPU.\r
-\r
-  Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
-  This function is only available on IA-32 and X64.\r
-\r
-  @param  LinearAddress The address of the cache line to flush. If the CPU is\r
-                        in a physical addressing mode, then LinearAddress is a\r
-                        physical address. If the CPU is in a virtual\r
-                        addressing mode, then LinearAddress is a virtual\r
-                        address.\r
-\r
-  @return LinearAddress\r
-**/\r
-VOID *\r
-EFIAPI\r
-AsmFlushCacheLine (\r
-  IN      VOID                      *LinearAddress\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "clflush (%0)"\r
-    : "+a" (LinearAddress) \r
-    : \r
-    : "memory"\r
-    );\r
-    \r
-    return LinearAddress;\r
-}\r
-\r
-\r

diff --git a/MdePkg/Library/BaseLib/X64/GccInline.c b/MdePkg/Library/BaseLib/X64/GccInline.c
deleted file mode 100644 (file)
index d559e3b..0000000
--- a/MdePkg/Library/BaseLib/X64/GccInline.c
+++ /dev/null
@@ -1,1806 +0,0 @@
-/** @file\r
-  GCC inline implementation of BaseLib processor specific functions.\r
-  \r
-  Copyright (c) 2006 - 2010, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR> \r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-#include "BaseLibInternals.h"\r
-\r
-\r
-\r
-\r
-/**\r
-  Used to serialize load and store operations.\r
-\r
-  All loads and stores that proceed calls to this function are guaranteed to be\r
-  globally visible when this function returns.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-MemoryFence (\r
-  VOID\r
-  )\r
-{\r
-  // This is a little bit of overkill and it is more about the compiler that it is\r
-  // actually processor syncronization. This is like the _ReadWriteBarrier \r
-  // Microsft specific intrinsic\r
-  __asm__ __volatile__ ("":::"memory");\r
-}\r
-\r
-\r
-/**\r
-  Enables CPU interrupts.\r
-\r
-  Enables CPU interrupts.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-EnableInterrupts (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("sti"::: "memory");\r
-}\r
-\r
-\r
-/**\r
-  Disables CPU interrupts.\r
-\r
-  Disables CPU interrupts.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-DisableInterrupts (\r
-  VOID\r
-  )\r
-{  \r
-  __asm__ __volatile__ ("cli"::: "memory");\r
-}\r
-\r
-\r
-\r
-\r
-/**\r
-  Requests CPU to pause for a short period of time.\r
-\r
-  Requests CPU to pause for a short period of time. Typically used in MP\r
-  systems to prevent memory starvation while waiting for a spin lock.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuPause (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("pause");\r
-}\r
-\r
-\r
-/**\r
-  Generates a breakpoint on the CPU.\r
-\r
-  Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
-  that code can resume normal execution after the breakpoint.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-CpuBreakpoint (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("int $3");\r
-}\r
-\r
-\r
-\r
-/**\r
-  Returns a 64-bit Machine Specific Register(MSR).\r
-\r
-  Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
-  performed on Index, and some Index values may cause CPU exceptions. The\r
-  caller must either guarantee that Index is valid, or the caller must set up\r
-  exception handlers to catch the exceptions. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @param  Index The 32-bit MSR index to read.\r
-\r
-  @return The value of the MSR identified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMsr64 (\r
-  IN      UINT32                    Index\r
-  )\r
-{\r
-  UINT32 LowData;\r
-  UINT32 HighData;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdmsr"\r
-    : "=a" (LowData),   // %0\r
-      "=d" (HighData)   // %1\r
-    : "c"  (Index)      // %2\r
-    );\r
-    \r
-  return (((UINT64)HighData) << 32) | LowData;\r
-}\r
-\r
-/**\r
-  Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
-  value.\r
-\r
-  Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
-  64-bit value written to the MSR is returned. No parameter checking is\r
-  performed on Index or Value, and some of these may cause CPU exceptions. The\r
-  caller must either guarantee that Index and Value are valid, or the caller\r
-  must establish proper exception handlers. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @param  Index The 32-bit MSR index to write.\r
-  @param  Value The 64-bit value to write to the MSR.\r
-\r
-  @return Value\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmWriteMsr64 (\r
-  IN      UINT32                    Index,\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  UINT32 LowData;\r
-  UINT32 HighData;\r
-\r
-  LowData  = (UINT32)(Value);\r
-  HighData = (UINT32)(Value >> 32);\r
-  \r
-  __asm__ __volatile__ (\r
-    "wrmsr"\r
-    :\r
-    : "c" (Index),\r
-      "a" (LowData),\r
-      "d" (HighData)\r
-    );\r
-    \r
-  return Value;\r
-}\r
-\r
-\r
-\r
-/**\r
-  Reads the current value of the EFLAGS register.\r
-\r
-  Reads and returns the current value of the EFLAGS register. This function is\r
-  only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r
-  64-bit value on X64.\r
-\r
-  @return EFLAGS on IA-32 or RFLAGS on X64.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadEflags (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Eflags;\r
-  \r
-  __asm__ __volatile__ (\r
-    "pushfq         \n\t"\r
-    "pop     %0         "\r
-    : "=r" (Eflags)       // %0\r
-    );\r
-    \r
-  return Eflags;\r
-}\r
-\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 0 (CR0).\r
-\r
-  Reads and returns the current value of CR0. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 0 (CR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr0 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN   Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%cr0,%0" \r
-    : "=r" (Data)           // %0\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 2 (CR2).\r
-\r
-  Reads and returns the current value of CR2. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 2 (CR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr2 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%cr2,  %0" \r
-    : "=r" (Data)           // %0\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-/**\r
-  Reads the current value of the Control Register 3 (CR3).\r
-\r
-  Reads and returns the current value of CR3. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 3 (CR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr3 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%cr3,  %0" \r
-    : "=r" (Data)           // %0\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of the Control Register 4 (CR4).\r
-\r
-  Reads and returns the current value of CR4. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of the Control Register 4 (CR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadCr4 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%cr4,  %0" \r
-    : "=r" (Data)           // %0\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 0 (CR0).\r
-\r
-  Writes and returns a new value to CR0. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr0 The value to write to CR0.\r
-\r
-  @return The value written to CR0.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr0 (\r
-  UINTN  Cr0\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%cr0"\r
-    :\r
-    : "r" (Cr0)\r
-    );\r
-  return Cr0;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 2 (CR2).\r
-\r
-  Writes and returns a new value to CR2. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr2 The value to write to CR2.\r
-\r
-  @return The value written to CR2.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr2 (\r
-  UINTN  Cr2\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%cr2"\r
-    :\r
-    : "r" (Cr2)\r
-    );\r
-  return Cr2;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 3 (CR3).\r
-\r
-  Writes and returns a new value to CR3. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr3 The value to write to CR3.\r
-\r
-  @return The value written to CR3.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr3 (\r
-  UINTN  Cr3\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%cr3"\r
-    :\r
-    : "r" (Cr3)\r
-    );\r
-  return Cr3;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Control Register 4 (CR4).\r
-\r
-  Writes and returns a new value to CR4. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Cr4 The value to write to CR4.\r
-\r
-  @return The value written to CR4.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteCr4 (\r
-  UINTN  Cr4\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%cr4"\r
-    :\r
-    : "r" (Cr4)\r
-    );\r
-  return Cr4;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 0 (DR0).\r
-\r
-  Reads and returns the current value of DR0. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 0 (DR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr0 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr0, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 1 (DR1).\r
-\r
-  Reads and returns the current value of DR1. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 1 (DR1).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr1 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr1, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 2 (DR2).\r
-\r
-  Reads and returns the current value of DR2. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 2 (DR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr2 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr2, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 3 (DR3).\r
-\r
-  Reads and returns the current value of DR3. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 3 (DR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr3 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr3, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 4 (DR4).\r
-\r
-  Reads and returns the current value of DR4. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 4 (DR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr4 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr4, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 5 (DR5).\r
-\r
-  Reads and returns the current value of DR5. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 5 (DR5).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr5 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr5, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 6 (DR6).\r
-\r
-  Reads and returns the current value of DR6. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 6 (DR6).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr6 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr6, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Debug Register 7 (DR7).\r
-\r
-  Reads and returns the current value of DR7. This function is only available\r
-  on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
-  X64.\r
-\r
-  @return The value of Debug Register 7 (DR7).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmReadDr7 (\r
-  VOID\r
-  )\r
-{\r
-  UINTN Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%dr7, %0"\r
-    : "=r" (Data)\r
-    );\r
-  \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 0 (DR0).\r
-\r
-  Writes and returns a new value to DR0. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr0 The value to write to Dr0.\r
-\r
-  @return The value written to Debug Register 0 (DR0).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr0 (\r
-  UINTN  Dr0\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr0"\r
-    :\r
-    : "r" (Dr0)\r
-    );\r
-  return Dr0;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 1 (DR1).\r
-\r
-  Writes and returns a new value to DR1. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr1 The value to write to Dr1.\r
-\r
-  @return The value written to Debug Register 1 (DR1).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr1 (\r
-  UINTN  Dr1\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr1"\r
-    :\r
-    : "r" (Dr1)\r
-    );\r
-  return Dr1;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 2 (DR2).\r
-\r
-  Writes and returns a new value to DR2. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr2 The value to write to Dr2.\r
-\r
-  @return The value written to Debug Register 2 (DR2).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr2 (\r
-  UINTN  Dr2\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr2"\r
-    :\r
-    : "r" (Dr2)\r
-    );\r
-  return Dr2;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 3 (DR3).\r
-\r
-  Writes and returns a new value to DR3. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr3 The value to write to Dr3.\r
-\r
-  @return The value written to Debug Register 3 (DR3).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr3 (\r
-  UINTN  Dr3\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr3"\r
-    :\r
-    : "r" (Dr3)\r
-    );\r
-  return Dr3;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 4 (DR4).\r
-\r
-  Writes and returns a new value to DR4. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr4 The value to write to Dr4.\r
-\r
-  @return The value written to Debug Register 4 (DR4).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr4 (\r
-  UINTN  Dr4\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr4"\r
-    :\r
-    : "r" (Dr4)\r
-    );\r
-  return Dr4;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 5 (DR5).\r
-\r
-  Writes and returns a new value to DR5. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr5 The value to write to Dr5.\r
-\r
-  @return The value written to Debug Register 5 (DR5).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr5 (\r
-  UINTN  Dr5\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr5"\r
-    :\r
-    : "r" (Dr5)\r
-    );\r
-  return Dr5;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 6 (DR6).\r
-\r
-  Writes and returns a new value to DR6. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr6 The value to write to Dr6.\r
-\r
-  @return The value written to Debug Register 6 (DR6).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr6 (\r
-  UINTN  Dr6\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr6"\r
-    :\r
-    : "r" (Dr6)\r
-    );\r
-  return Dr6;\r
-}\r
-\r
-\r
-/**\r
-  Writes a value to Debug Register 7 (DR7).\r
-\r
-  Writes and returns a new value to DR7. This function is only available on\r
-  IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r
-\r
-  @param  Dr7 The value to write to Dr7.\r
-\r
-  @return The value written to Debug Register 7 (DR7).\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmWriteDr7 (\r
-  UINTN  Dr7\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mov  %0, %%dr7"\r
-    :\r
-    : "r" (Dr7)\r
-    );\r
-  return Dr7;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Code Segment Register (CS).\r
-\r
-  Reads and returns the current value of CS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of CS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadCs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov   %%cs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Data Segment Register (DS).\r
-\r
-  Reads and returns the current value of DS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of DS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadDs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%ds, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Extra Segment Register (ES).\r
-\r
-  Reads and returns the current value of ES. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of ES.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadEs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%es, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of FS Data Segment Register (FS).\r
-\r
-  Reads and returns the current value of FS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of FS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadFs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%fs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of GS Data Segment Register (GS).\r
-\r
-  Reads and returns the current value of GS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of GS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadGs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%gs, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Stack Segment Register (SS).\r
-\r
-  Reads and returns the current value of SS. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of SS.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadSs (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "mov  %%ds, %0"\r
-    :"=a" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Task Register (TR).\r
-\r
-  Reads and returns the current value of TR. This function is only available on\r
-  IA-32 and X64.\r
-\r
-  @return The current value of TR.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadTr (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "str  %0"\r
-    : "=r" (Data)\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
-  function is only available on IA-32 and X64.\r
-\r
-  @param  Gdtr  Pointer to a GDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86ReadGdtr (\r
-  OUT     IA32_DESCRIPTOR           *Gdtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "sgdt %0"\r
-    : "=m" (*Gdtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
-\r
-  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Gdtr  Pointer to a GDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86WriteGdtr (\r
-  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lgdt %0"\r
-    :\r
-    : "m" (*Gdtr)\r
-    );\r
-    \r
-}\r
-\r
-\r
-/**\r
-  Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
-  function is only available on IA-32 and X64.\r
-\r
-  @param  Idtr  Pointer to a IDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86ReadIdtr (\r
-  OUT     IA32_DESCRIPTOR           *Idtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "sldt  %0"\r
-    : "=m" (*Idtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
-\r
-  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Idtr  Pointer to a IDTR descriptor.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86WriteIdtr (\r
-  IN      CONST IA32_DESCRIPTOR     *Idtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lidt %0"\r
-    :\r
-    : "m" (*Idtr)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current Local Descriptor Table Register(LDTR) selector.\r
-\r
-  Reads and returns the current 16-bit LDTR descriptor value. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @return The current selector of LDT.\r
-\r
-**/\r
-UINT16\r
-EFIAPI\r
-AsmReadLdtr (\r
-  VOID\r
-  )\r
-{\r
-  UINT16  Data;\r
-  \r
-  __asm__ __volatile__ (\r
-    "sldt  %0"\r
-    : "=g" (Data)   // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes the current Local Descriptor Table Register (GDTR) selector.\r
-\r
-  Writes and the current LDTR descriptor specified by Ldtr. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Ldtr  16-bit LDTR selector value.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteLdtr (\r
-  IN      UINT16                    Ldtr\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "lldtw  %0"\r
-    :\r
-    : "g" (Ldtr)   // %0\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Save the current floating point/SSE/SSE2 context to a buffer.\r
-\r
-  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
-  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
-  available on IA-32 and X64.\r
-\r
-  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86FxSave (\r
-  OUT     IA32_FX_BUFFER            *Buffer\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "fxsave %0"\r
-    :\r
-    : "m" (*Buffer)  // %0\r
-    );    \r
-}\r
-\r
-\r
-/**\r
-  Restores the current floating point/SSE/SSE2 context from a buffer.\r
-\r
-  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
-  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
-  only available on IA-32 and X64.\r
-\r
-  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalX86FxRestore (\r
-  IN      CONST IA32_FX_BUFFER      *Buffer\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "fxrstor %0"\r
-    :\r
-    : "m" (*Buffer)  // %0\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #0 (MM0).\r
-\r
-  Reads and returns the current value of MM0. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM0.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm0 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd   %%mm0,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #1 (MM1).\r
-\r
-  Reads and returns the current value of MM1. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM1.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm1 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd   %%mm1,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #2 (MM2).\r
-\r
-  Reads and returns the current value of MM2. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM2.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm2 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm2,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #3 (MM3).\r
-\r
-  Reads and returns the current value of MM3. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM3.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm3 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm3,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #4 (MM4).\r
-\r
-  Reads and returns the current value of MM4. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM4.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm4 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm4,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #5 (MM5).\r
-\r
-  Reads and returns the current value of MM5. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM5.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm5 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm5,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #6 (MM6).\r
-\r
-  Reads and returns the current value of MM6. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM6.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm6 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm6,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of 64-bit MMX Register #7 (MM7).\r
-\r
-  Reads and returns the current value of MM7. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of MM7.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadMm7 (\r
-  VOID\r
-  )\r
-{\r
-  UINT64  Data;\r
-\r
-  __asm__ __volatile__ (\r
-    "movd  %%mm7,  %0    \n\t"\r
-    : "=r"  (Data)       // %0\r
-    );\r
-    \r
-  return Data;\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #0 (MM0).\r
-\r
-  Writes the current value of MM0. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM0.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm0 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm0"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #1 (MM1).\r
-\r
-  Writes the current value of MM1. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM1.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm1 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm1"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #2 (MM2).\r
-\r
-  Writes the current value of MM2. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM2.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm2 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm2"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #3 (MM3).\r
-\r
-  Writes the current value of MM3. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM3.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm3 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm3"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #4 (MM4).\r
-\r
-  Writes the current value of MM4. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM4.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm4 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm4"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #5 (MM5).\r
-\r
-  Writes the current value of MM5. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM5.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm5 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm5"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #6 (MM6).\r
-\r
-  Writes the current value of MM6. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM6.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm6 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm6"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Writes the current value of 64-bit MMX Register #7 (MM7).\r
-\r
-  Writes the current value of MM7. This function is only available on IA32 and\r
-  X64.\r
-\r
-  @param  Value The 64-bit value to write to MM7.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWriteMm7 (\r
-  IN      UINT64                    Value\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "movd  %0, %%mm7"  // %0\r
-    :  \r
-    : "m" (Value)\r
-    );\r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of Time Stamp Counter (TSC).\r
-\r
-  Reads and returns the current value of TSC. This function is only available\r
-  on IA-32 and X64.\r
-\r
-  @return The current value of TSC\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadTsc (\r
-  VOID\r
-  )\r
-{\r
-  UINT32  LowData;\r
-  UINT32  HiData;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdtsc"\r
-    : "=a" (LowData),\r
-      "=d" (HiData)\r
-    );\r
-  \r
-  return (((UINT64)HiData) << 32) | LowData;  \r
-}\r
-\r
-\r
-/**\r
-  Reads the current value of a Performance Counter (PMC).\r
-\r
-  Reads and returns the current value of performance counter specified by\r
-  Index. This function is only available on IA-32 and X64.\r
-\r
-  @param  Index The 32-bit Performance Counter index to read.\r
-\r
-  @return The value of the PMC specified by Index.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-AsmReadPmc (\r
-  IN      UINT32                    Index\r
-  )\r
-{\r
-  UINT32  LowData;\r
-  UINT32  HiData;\r
-  \r
-  __asm__ __volatile__ (\r
-    "rdpmc"\r
-    : "=a" (LowData),\r
-      "=d" (HiData)\r
-    : "c"  (Index)\r
-    );\r
-  \r
-  return (((UINT64)HiData) << 32) | LowData;  \r
-}\r
-\r
-\r
-/**\r
-  Sets up a monitor buffer that is used by AsmMwait().\r
-\r
-  Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
-  and Edx. Returns Eax. This function is only available on IA-32 and X64.\r
-\r
-  @param  Eax The value to load into EAX or RAX before executing the MONITOR\r
-              instruction.\r
-  @param  Ecx The value to load into ECX or RCX before executing the MONITOR\r
-              instruction.\r
-  @param  Edx The value to load into EDX or RDX before executing the MONITOR\r
-              instruction.\r
-\r
-  @return Eax\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmMonitor (\r
-  IN      UINTN                     Eax,\r
-  IN      UINTN                     Ecx,\r
-  IN      UINTN                     Edx\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "monitor"\r
-    :\r
-    : "a" (Eax),\r
-      "c" (Ecx),\r
-      "d" (Edx)\r
-    );\r
-    \r
-  return Eax;\r
-}\r
-\r
-\r
-/**\r
-  Executes an MWAIT instruction.\r
-\r
-  Executes an MWAIT instruction with the register state specified by Eax and\r
-  Ecx. Returns Eax. This function is only available on IA-32 and X64.\r
-\r
-  @param  Eax The value to load into EAX or RAX before executing the MONITOR\r
-              instruction.\r
-  @param  Ecx The value to load into ECX or RCX before executing the MONITOR\r
-              instruction.\r
-\r
-  @return Eax\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmMwait (\r
-  IN      UINTN                     Eax,\r
-  IN      UINTN                     Ecx\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "mwait"\r
-    : \r
-    : "a"  (Eax),\r
-      "c"  (Ecx)\r
-    );\r
-    \r
-  return Eax;    \r
-}\r
-\r
-\r
-/**\r
-  Executes a WBINVD instruction.\r
-\r
-  Executes a WBINVD instruction. This function is only available on IA-32 and\r
-  X64.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmWbinvd (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("wbinvd":::"memory");\r
-}\r
-\r
-\r
-/**\r
-  Executes a INVD instruction.\r
-\r
-  Executes a INVD instruction. This function is only available on IA-32 and\r
-  X64.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmInvd (\r
-  VOID\r
-  )\r
-{\r
-  __asm__ __volatile__ ("invd":::"memory");\r
-    \r
-}\r
-\r
-\r
-/**\r
-  Flushes a cache line from all the instruction and data caches within the\r
-  coherency domain of the CPU.\r
-\r
-  Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
-  This function is only available on IA-32 and X64.\r
-\r
-  @param  LinearAddress The address of the cache line to flush. If the CPU is\r
-                        in a physical addressing mode, then LinearAddress is a\r
-                        physical address. If the CPU is in a virtual\r
-                        addressing mode, then LinearAddress is a virtual\r
-                        address.\r
-\r
-  @return LinearAddress\r
-**/\r
-VOID *\r
-EFIAPI\r
-AsmFlushCacheLine (\r
-  IN      VOID                      *LinearAddress\r
-  )\r
-{\r
-  __asm__ __volatile__ (\r
-    "clflush (%0)"\r
-    :\r
-    : "r" (LinearAddress) \r
-    : "memory"\r
-    );\r
-    \r
-    return LinearAddress;\r
-}\r
-\r
-\r

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 808314dfdc1d06a4fdc2d3855d14f74c312bfdb7..f2b908e7612e914c8b77605400357df0e8beabc4 100644 (file)
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -1,7 +1,7 @@
 #/** @file\r
 #  Base Synchronization Library implementation.\r
 #\r
-#  Copyright (c) 2007 - 2008, Intel Corporation.<BR>\r
+#  Copyright (c) 2007 - 2010, Intel Corporation.<BR>\r
 #  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
 #\r
 #  All rights reserved. This program and the accompanying materials\r
@@ -41,7 +41,6 @@
   Ia32/InterlockedIncrement.asm | INTEL \r
   Synchronization.c | INTEL\r
 \r
-#  Ia32/GccInline.c                    | GCC\r
   Ia32/InterlockedCompareExchange64.S | GCC \r
   Ia32/InterlockedCompareExchange32.S | GCC \r
   Ia32/InterlockedDecrement.S | GCC \r
@@ -64,7 +63,6 @@
   Synchronization.c | INTEL \r
 \r
 \r
-#  X64/GccInline.c                    | GCC\r
   X64/InterlockedIncrement.S | GCC \r
   X64/InterlockedDecrement.S | GCC \r
   X64/InterlockedCompareExchange64.S | GCC \r

diff --git a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
deleted file mode 100644 (file)
index 9b939c9..0000000
--- a/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/** @file\r
-  GCC inline implementation of BaseSynchronizationLib processor specific functions.\r
-  \r
-  Copyright (c) 2006 - 2009, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-\r
-/**\r
-  Performs an atomic increment of an 32-bit unsigned integer.\r
-\r
-  Performs an atomic increment of the 32-bit unsigned integer specified by\r
-  Value and returns the incremented value. The increment operation must be\r
-  performed using MP safe mechanisms. The state of the return value is not\r
-  guaranteed to be MP safe.\r
-\r
-  @param  Value A pointer to the 32-bit value to increment.\r
-\r
-  @return The incremented value.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncIncrement (\r
-  IN      volatile UINT32    *Value\r
-  )\r
-{\r
-  UINT32  Result;\r
-\r
-  __asm__ __volatile__ (\r
-    "lock               \n\t"\r
-    "incl    %2         \n\t"\r
-    "movl    %2, %%eax      "\r
-    : "=a" (Result),          // %0\r
-      "=m" (*Value)           // %1\r
-    : "m"  (*Value)           // %2 \r
-    : "memory",\r
-      "cc"\r
-    );\r
-    \r
-  return Result;    \r
-\r
-}\r
-\r
-\r
-/**\r
-  Performs an atomic decrement of an 32-bit unsigned integer.\r
-\r
-  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
-  Value and returns the decremented value. The decrement operation must be\r
-  performed using MP safe mechanisms. The state of the return value is not\r
-  guaranteed to be MP safe.\r
-\r
-  @param  Value A pointer to the 32-bit value to decrement.\r
-\r
-  @return The decremented value.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncDecrement (\r
-  IN      volatile UINT32       *Value\r
-  )\r
-{\r
-   UINT32  Result;\r
-  \r
-  __asm__ __volatile__ (\r
-    "lock               \n\t"\r
-    "decl    %2         \n\t"\r
-    "movl    %2, %%eax      "\r
-    : "=a" (Result),          // %0\r
-      "=m" (*Value)           // %1\r
-    : "m"  (*Value)           // %2 \r
-    : "memory",\r
-      "cc"\r
-    );\r
-    \r
-  return Result;\r
-}\r
-\r
-/**\r
-  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
-\r
-  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
-  specified by Value.  If Value is equal to CompareValue, then Value is set to\r
-  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
-  then Value is returned.  The compare exchange operation must be performed using\r
-  MP safe mechanisms.\r
-\r
-\r
-  @param  Value         A pointer to the 32-bit value for the compare exchange\r
-                        operation.\r
-  @param  CompareValue  32-bit value used in compare operation.\r
-  @param  ExchangeValue 32-bit value used in exchange operation.\r
-\r
-  @return The original *Value before exchange.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncCompareExchange32 (\r
-  IN OUT volatile  UINT32           *Value,\r
-  IN      UINT32                    CompareValue,\r
-  IN      UINT32                    ExchangeValue\r
-  )\r
-{\r
-\r
-// GCC 4.1 and forward supports atomic builtins  \r
-#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))\r
-\r
-  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);\r
-\r
-#else\r
-\r
-  __asm__ __volatile__ (\r
-    "                     \n\t"\r
-    "lock                 \n\t"\r
-    "cmpxchgl    %1, %2   \n\t"\r
-    : "=a" (CompareValue)     // %0\r
-    : "q"  (ExchangeValue),   // %1\r
-      "m"  (*Value),          // %2\r
-      "0"  (CompareValue)     // %4 \r
-    : "memory",\r
-      "cc"\r
-    );\r
-\r
-    return CompareValue;\r
-\r
-#endif\r
-}\r
-\r
-/**\r
-  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
-\r
-  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
-  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
-  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned.\r
-  The compare exchange operation must be performed using MP safe mechanisms.\r
-\r
-\r
-  @param  Value         A pointer to the 64-bit value for the compare exchange\r
-                        operation.\r
-  @param  CompareValue  64-bit value used in compare operation.\r
-  @param  ExchangeValue 64-bit value used in exchange operation.\r
-\r
-  @return The original *Value before exchange.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-InternalSyncCompareExchange64 (\r
-  IN OUT  volatile UINT64           *Value,\r
-  IN      UINT64                    CompareValue,\r
-  IN      UINT64                    ExchangeValue\r
-  )\r
-{\r
-// GCC 4.1 and forward supports atomic builtins  \r
-#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))\r
-\r
-  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);\r
-\r
-#else\r
-\r
-  __asm__ __volatile__ (\r
-    "                       \n\t"\r
-    "push        %%ebx      \n\t" \r
-    "movl        %2,%%ebx   \n\t"   \r
-    "lock                   \n\t"\r
-    "cmpxchg8b   (%1)       \n\t"\r
-    "pop         %%ebx      \n\t"\r
-    : "+A"  (CompareValue)                    // %0\r
-    : "S"   (Value),                          // %1\r
-      "r"   ((UINT32) ExchangeValue),         // %2\r
-      "c"   ((UINT32) (ExchangeValue >> 32))  // %3\r
-    : "memory",\r
-      "cc"\r
-    );\r
-  \r
-  return CompareValue;\r
-\r
-#endif\r
-}\r
-\r
-\r

diff --git a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
deleted file mode 100644 (file)
index f2f72f8..0000000
--- a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/** @file\r
-  GCC inline implementation of BaseSynchronizationLib processor specific functions.\r
-  \r
-  Copyright (c) 2006 - 2009, Intel Corporation<BR>\r
-  Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR> \r
-  All rights reserved. This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-\r
-\r
-\r
-/**\r
-  Performs an atomic increment of an 32-bit unsigned integer.\r
-\r
-  Performs an atomic increment of the 32-bit unsigned integer specified by\r
-  Value and returns the incremented value. The increment operation must be\r
-  performed using MP safe mechanisms. The state of the return value is not\r
-  guaranteed to be MP safe.\r
-\r
-  @param  Value A pointer to the 32-bit value to increment.\r
-\r
-  @return The incremented value.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncIncrement (\r
-  IN      volatile UINT32    *Value\r
-  )\r
-{\r
-  UINT32  Result;\r
-\r
-  __asm__ __volatile__ (\r
-    "lock               \n\t"\r
-    "incl    %2         \n\t"\r
-    "mov     %2, %%eax      "\r
-    : "=a" (Result),          // %0\r
-      "=m" (*Value)           // %1\r
-    : "m"  (*Value)           // %2 \r
-    : "memory",\r
-      "cc"\r
-    );\r
-    \r
-  return Result;    \r
-\r
-}\r
-\r
-\r
-/**\r
-  Performs an atomic decrement of an 32-bit unsigned integer.\r
-\r
-  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
-  Value and returns the decremented value. The decrement operation must be\r
-  performed using MP safe mechanisms. The state of the return value is not\r
-  guaranteed to be MP safe.\r
-\r
-  @param  Value A pointer to the 32-bit value to decrement.\r
-\r
-  @return The decremented value.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncDecrement (\r
-  IN      volatile UINT32       *Value\r
-  )\r
-{\r
-   UINT32  Result;\r
-  \r
-  __asm__ __volatile__ (\r
-    "lock               \n\t"\r
-    "decl    %2         \n\t"\r
-    "mov     %2, %%eax      "\r
-    : "=a" (Result),          // %0\r
-      "=m" (*Value)           // %1\r
-    : "m"  (*Value)           // %2 \r
-    : "memory",\r
-      "cc"\r
-    );\r
-    \r
-  return Result;\r
-}\r
-\r
-\r
-/**\r
-  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
-\r
-  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
-  specified by Value.  If Value is equal to CompareValue, then Value is set to\r
-  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
-  then Value is returned.  The compare exchange operation must be performed using\r
-  MP safe mechanisms.\r
-\r
-\r
-  @param  Value         A pointer to the 32-bit value for the compare exchange\r
-                        operation.\r
-  @param  CompareValue  32-bit value used in compare operation.\r
-  @param  ExchangeValue 32-bit value used in exchange operation.\r
-\r
-  @return The original *Value before exchange.\r
-\r
-**/\r
-UINT32\r
-EFIAPI\r
-InternalSyncCompareExchange32 (\r
-  IN OUT volatile  UINT32           *Value,\r
-  IN      UINT32                    CompareValue,\r
-  IN      UINT32                    ExchangeValue\r
-  )\r
-{\r
-// GCC 4.1 and forward supports atomic builtins  \r
-#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))\r
-\r
-  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);\r
-\r
-#else\r
-\r
-  __asm__ __volatile__ (\r
-    "lock                 \n\t"\r
-    "cmpxchgl    %3, %1       "\r
-    : "=a" (CompareValue),    // %0\r
-      "=m" (*Value)           // %1\r
-    : "a"  (CompareValue),    // %2\r
-      "r"  (ExchangeValue),   // %3 \r
-      "m"  (*Value)\r
-    : "memory",\r
-      "cc"\r
-    );\r
-    \r
-    return CompareValue;\r
-\r
-#endif\r
-}\r
-\r
-\r
-/**\r
-  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
-\r
-  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
-  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
-  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned.\r
-  The compare exchange operation must be performed using MP safe mechanisms.\r
-\r
-\r
-  @param  Value         A pointer to the 64-bit value for the compare exchange\r
-                        operation.\r
-  @param  CompareValue  64-bit value used in compare operation.\r
-  @param  ExchangeValue 64-bit value used in exchange operation.\r
-\r
-  @return The original *Value before exchange.\r
-\r
-**/\r
-UINT64\r
-EFIAPI\r
-InternalSyncCompareExchange64 (\r
-  IN OUT  volatile UINT64           *Value,\r
-  IN      UINT64                    CompareValue,\r
-  IN      UINT64                    ExchangeValue\r
-  )\r
-{\r
-// GCC 4.1 and forward supports atomic builtins  \r
-#if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 1)))\r
-\r
-  return __sync_val_compare_and_swap (Value, CompareValue, ExchangeValue);\r
-\r
-#else\r
-\r
-  __asm__ __volatile__ (\r
-    "lock                 \n\t"\r
-    "cmpxchgq    %3, %1       "\r
-    : "=a" (CompareValue),    // %0\r
-      "=m" (*Value)           // %1\r
-    : "a"  (CompareValue),    // %2\r
-      "r"  (ExchangeValue),   // %3 \r
-      "m"  (*Value)\r
-    : "memory",\r
-      "cc"\r
-    );\r
-  \r
-  return CompareValue;\r
-\r
-#endif\r
-}\r
-\r
-\r