UefiCpuPkg/CpuExceptionHandlerLib: Fix split lock

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2150

v4:
The v3 posting didn't do what it promised to do, so do it now for real.

V3 changes:
change to mov instruction (non locking instuction) instead
of xchg to simplify design.

V2 changes:
Add xchg 16 bit instructions to handle sgdt and sidt base
63:48 bits and 47:32 bits.
Add comment to explain why xchg 64bit isnt being used

Split lock happens when a locking instruction is used on mis-aligned data
that crosses two cachelines. If close source platform enables Alignment
Check Exception(#AC), They can hit a double fault due to split lock being
in CpuExceptionHandlerLib.

sigt and sgdt saves 10 bytes to memory, 8 bytes is base and 2 bytes is limit.
The data is mis-aligned, can cross two cacheline, and a xchg
instruction(locking instuction) is being utilize.

Signed-off-by: John E Lofgren <john.e.lofgren@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
index 4db1a09f288185ca4af071a500d6d718dedec1a6..19198f273137ead558224ece1a8fc15ff03c9451 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm
@@ -184,17 +184,19 @@ HasErrorCode:
     push    rax\r
     push    rax\r
     sidt    [rsp]\r
-    xchg    rax, [rsp + 2]\r
-    xchg    rax, [rsp]\r
-    xchg    rax, [rsp + 8]\r
+    mov     bx, word [rsp]\r
+    mov     rax, qword [rsp + 2]\r
+    mov     qword [rsp], rax\r
+    mov     word [rsp + 8], bx\r
 \r
     xor     rax, rax\r
     push    rax\r
     push    rax\r
     sgdt    [rsp]\r
-    xchg    rax, [rsp + 2]\r
-    xchg    rax, [rsp]\r
-    xchg    rax, [rsp + 8]\r
+    mov     bx, word [rsp]\r
+    mov     rax, qword [rsp + 2]\r
+    mov     qword [rsp], rax\r
+    mov     word [rsp + 8], bx\r
 \r
 ;; UINT64  Ldtr, Tr;\r
     xor     rax, rax\r