The SDM requires only one thread per core to load the
microcode.
This change enables this solution.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
VOID *MicrocodeData;\r
MSR_IA32_PLATFORM_ID_REGISTER PlatformIdMsr;\r
UINT32 ProcessorFlags;\r
+ UINT32 ThreadId;\r
\r
if (CpuMpData->MicrocodePatchRegionSize == 0) {\r
//\r
return;\r
}\r
\r
+ GetProcessorLocationByApicId (GetInitialApicId (), NULL, NULL, &ThreadId);\r
+ if (ThreadId != 0) {\r
+ //\r
+ // Skip loading microcode if it is not the first thread in one core.\r
+ //\r
+ return;\r
+ }\r
+\r
ExtendedTableLength = 0;\r
//\r
// Here data of CPUID leafs have not been collected into context buffer, so\r