ArmPkg/ArmLib: remove CCSIDR based cache info routines

The ARM architecture does not allow the actual geometries of the caches
to be inferred from the CCSIDR cache info system register, since the
geometry it reports is intended for performing cache maintenance by
set/way and nothing else. Since the ArmLib cache info routines are
based solely on CCSIDR contents, they should not be used.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18753 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index f1de303d952d2cce528b79b5bafc310b6bc4de15..2059a67bbf3c20287ee3f9abf9651359dcef4321 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -26,30 +26,6 @@
  #error "Unknown chipset."\r
 #endif\r
 \r
-typedef enum {\r
-  ARM_CACHE_TYPE_WRITE_BACK,\r
-  ARM_CACHE_TYPE_UNKNOWN\r
-} ARM_CACHE_TYPE;\r
-\r
-typedef enum {\r
-  ARM_CACHE_ARCHITECTURE_UNIFIED,\r
-  ARM_CACHE_ARCHITECTURE_SEPARATE,\r
-  ARM_CACHE_ARCHITECTURE_UNKNOWN\r
-} ARM_CACHE_ARCHITECTURE;\r
-\r
-typedef struct {\r
-  ARM_CACHE_TYPE          Type;\r
-  ARM_CACHE_ARCHITECTURE  Architecture;\r
-  BOOLEAN                 DataCachePresent;\r
-  UINTN                   DataCacheSize;\r
-  UINTN                   DataCacheAssociativity;\r
-  UINTN                   DataCacheLineLength;\r
-  BOOLEAN                 InstructionCachePresent;\r
-  UINTN                   InstructionCacheSize;\r
-  UINTN                   InstructionCacheAssociativity;\r
-  UINTN                   InstructionCacheLineLength;\r
-} ARM_CACHE_INFO;\r
-\r
 /**\r
  * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.\r
  *\r
@@ -126,66 +102,12 @@ typedef enum {
 #define GET_MPID(ClusterId, CoreId)   (((ClusterId) << 8) | (CoreId))\r
 #define PRIMARY_CORE_ID       (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)\r
 \r
-ARM_CACHE_TYPE\r
-EFIAPI\r
-ArmCacheType (\r
-  VOID\r
-  );\r
-\r
-ARM_CACHE_ARCHITECTURE\r
-EFIAPI\r
-ArmCacheArchitecture (\r
-  VOID\r
-  );\r
-\r
-VOID\r
-EFIAPI\r
-ArmCacheInformation (\r
-  OUT ARM_CACHE_INFO  *CacheInfo\r
-  );\r
-\r
-BOOLEAN\r
-EFIAPI\r
-ArmDataCachePresent (\r
-  VOID\r
-  );\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheSize (\r
-  VOID\r
-  );\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheAssociativity (\r
-  VOID\r
-  );\r
-\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheLineLength (\r
   VOID\r
   );\r
 \r
-BOOLEAN\r
-EFIAPI\r
-ArmInstructionCachePresent (\r
-  VOID\r
-  );\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSize (\r
-  VOID\r
-  );\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheAssociativity (\r
-  VOID\r
-  );\r
-\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheLineLength (\r

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index f795a2f896b2e16f92dc616059082a648ebf7e00..4bea20356fa3a5e9c7471b7f9d1debd6f2bef275 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -21,86 +21,6 @@
 #include "AArch64Lib.h"\r
 #include "ArmLibPrivate.h"\r
 \r
-ARM_CACHE_TYPE\r
-EFIAPI\r
-ArmCacheType (\r
-  VOID\r
-  )\r
-{\r
-  return ARM_CACHE_TYPE_WRITE_BACK;\r
-}\r
-\r
-ARM_CACHE_ARCHITECTURE\r
-EFIAPI\r
-ArmCacheArchitecture (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  return (ARM_CACHE_ARCHITECTURE)CLIDR; // BugBug Fix Me\r
-}\r
-\r
-BOOLEAN\r
-EFIAPI\r
-ArmDataCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  if ((CLIDR & 0x2) == 0x2) {\r
-    // Instruction cache exists\r
-    return TRUE;\r
-  }\r
-  if ((CLIDR & 0x7) == 0x4) {\r
-    // Unified cache\r
-    return TRUE;\r
-  }\r
-\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 NumSets;\r
-  UINT32 Associativity;\r
-  UINT32 LineSize;\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  LineSize      = (1 << ((CCSIDR & 0x7) + 2));\r
-  Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;\r
-  NumSets       = ((CCSIDR >> 13) & 0x7fff) + 1;\r
-\r
-  // LineSize is in words (4 byte chunks)\r
-  return  NumSets * Associativity * LineSize * 4;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  return ((CCSIDR >> 3) & 0x3ff) + 1;\r
-}\r
-\r
-UINTN\r
-ArmDataCacheSets (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  return ((CCSIDR >> 13) & 0x7fff) + 1;\r
-}\r
-\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheLineLength (\r
@@ -113,67 +33,6 @@ ArmDataCacheLineLength (
   return (1 << (CCSIDR + 2)) * 4;\r
 }\r
 \r
-BOOLEAN\r
-EFIAPI\r
-ArmInstructionCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  if ((CLIDR & 1) == 1) {\r
-    // Instruction cache exists\r
-    return TRUE;\r
-  }\r
-  if ((CLIDR & 0x7) == 0x4) {\r
-    // Unified cache\r
-    return TRUE;\r
-  }\r
-\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 NumSets;\r
-  UINT32 Associativity;\r
-  UINT32 LineSize;\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  LineSize      = (1 << ((CCSIDR & 0x7) + 2));\r
-  Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;\r
-  NumSets       = ((CCSIDR >> 13) & 0x7fff) + 1;\r
-\r
-  // LineSize is in words (4 byte chunks)\r
-  return  NumSets * Associativity * LineSize * 4;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  return ((CCSIDR >> 3) & 0x3ff) + 1;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSets (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  return ((CCSIDR >> 13) & 0x7fff) + 1;\r
-}\r
-\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheLineLength (\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
index 6a8f0d3fdd984b8a8fd5e1cb0ab219ed81d60546..44edff869eaeb9ad253d4f35c41ac824ffdaef3f 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
@@ -20,86 +20,6 @@
 #include "ArmV7Lib.h"\r
 #include "ArmLibPrivate.h"\r
 \r
-ARM_CACHE_TYPE\r
-EFIAPI\r
-ArmCacheType (\r
-  VOID\r
-  )\r
-{\r
-  return ARM_CACHE_TYPE_WRITE_BACK;\r
-}\r
-\r
-ARM_CACHE_ARCHITECTURE\r
-EFIAPI\r
-ArmCacheArchitecture (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  return (ARM_CACHE_ARCHITECTURE)CLIDR; // BugBug Fix Me\r
-}\r
-\r
-BOOLEAN\r
-EFIAPI\r
-ArmDataCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  if ((CLIDR & 0x2) == 0x2) {\r
-    // Instruction cache exists\r
-    return TRUE;\r
-  }\r
-  if ((CLIDR & 0x7) == 0x4) {\r
-    // Unified cache\r
-    return TRUE;\r
-  }\r
-\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 NumSets;\r
-  UINT32 Associativity;\r
-  UINT32 LineSize;\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  LineSize      = (1 << ((CCSIDR & 0x7) + 2));\r
-  Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;\r
-  NumSets       = ((CCSIDR >> 13) & 0x7fff) + 1;\r
-\r
-  // LineSize is in words (4 byte chunks)\r
-  return  NumSets * Associativity * LineSize * 4;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  return ((CCSIDR >> 3) & 0x3ff) + 1;\r
-}\r
-\r
-UINTN\r
-ArmDataCacheSets (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (0);\r
-\r
-  return ((CCSIDR >> 13) & 0x7fff) + 1;\r
-}\r
-\r
 UINTN\r
 EFIAPI\r
 ArmDataCacheLineLength (\r
@@ -112,68 +32,6 @@ ArmDataCacheLineLength (
   return (1 << (CCSIDR + 2)) * 4;\r
 }\r
 \r
-BOOLEAN\r
-EFIAPI\r
-ArmInstructionCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CLIDR = ReadCLIDR ();\r
-\r
-  if ((CLIDR & 1) == 1) {\r
-    // Instruction cache exists\r
-    return TRUE;\r
-  }\r
-  if ((CLIDR & 0x7) == 0x4) {\r
-    // Unified cache\r
-    return TRUE;\r
-  }\r
-\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 NumSets;\r
-  UINT32 Associativity;\r
-  UINT32 LineSize;\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  LineSize      = (1 << ((CCSIDR & 0x7) + 2));\r
-  Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;\r
-  NumSets       = ((CCSIDR >> 13) & 0x7fff) + 1;\r
-\r
-  // LineSize is in words (4 byte chunks)\r
-  return  NumSets * Associativity * LineSize * 4;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  return ((CCSIDR >> 3) & 0x3ff) + 1;\r
-//  return 4;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSets (\r
-  VOID\r
-  )\r
-{\r
-  UINT32 CCSIDR = ReadCCSIDR (1);\r
-\r
-  return ((CCSIDR >> 13) & 0x7fff) + 1;\r
-}\r
-\r
 UINTN\r
 EFIAPI\r
 ArmInstructionCacheLineLength (\r

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c
index d7316972b7e4dcbd01ad8a934dbb3170777d2d79..4febc45220a3baafff42d7e46ae0b38cd13e3dc6 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLib.c
+++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c
@@ -21,26 +21,6 @@
 \r
 #include "ArmLibPrivate.h"\r
 \r
-VOID\r
-EFIAPI\r
-ArmCacheInformation (\r
-  OUT ARM_CACHE_INFO  *CacheInfo\r
-  )\r
-{\r
-  if (CacheInfo != NULL) {\r
-    CacheInfo->Type                           = ArmCacheType();\r
-    CacheInfo->Architecture                   = ArmCacheArchitecture();\r
-    CacheInfo->DataCachePresent               = ArmDataCachePresent();\r
-    CacheInfo->DataCacheSize                  = ArmDataCacheSize();\r
-    CacheInfo->DataCacheAssociativity         = ArmDataCacheAssociativity();\r
-    CacheInfo->DataCacheLineLength            = ArmDataCacheLineLength();\r
-    CacheInfo->InstructionCachePresent        = ArmInstructionCachePresent();\r
-    CacheInfo->InstructionCacheSize           = ArmInstructionCacheSize();\r
-    CacheInfo->InstructionCacheAssociativity  = ArmInstructionCacheAssociativity();\r
-    CacheInfo->InstructionCacheLineLength     = ArmInstructionCacheLineLength();\r
-  }\r
-}\r
-\r
 VOID\r
 EFIAPI\r
 ArmSetAuxCrBit (\r

diff --git a/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c b/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c
deleted file mode 100644 (file)
index 2eeb42e..0000000
--- a/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/** @file\r
-\r
-  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Library/ArmLib.h>\r
-#include "ArmLibPrivate.h"\r
-\r
-ARM_CACHE_TYPE\r
-EFIAPI\r
-ArmCacheType (\r
-  VOID\r
-  )\r
-{\r
-  return ARM_CACHE_TYPE_UNKNOWN;\r
-}\r
-\r
-ARM_CACHE_ARCHITECTURE\r
-EFIAPI\r
-ArmCacheArchitecture (\r
-  VOID\r
-  )\r
-{\r
-  return ARM_CACHE_ARCHITECTURE_UNKNOWN;\r
-}\r
-\r
-BOOLEAN\r
-EFIAPI\r
-ArmDataCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmDataCacheLineLength (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-BOOLEAN\r
-EFIAPI\r
-ArmInstructionCachePresent (\r
-  VOID\r
-  )\r
-{\r
-  return FALSE;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheSize (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheAssociativity (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r
-\r
-UINTN\r
-EFIAPI\r
-ArmInstructionCacheLineLength (\r
-  VOID\r
-  )\r
-{\r
-  return 0;\r
-}\r

diff --git a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
index 36860a7bf949e90ab6c622212e48fab932bbfef3..6cfb2c4eac8fec961981078b062b298a2f0b0e67 100644 (file)
--- a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
@@ -25,7 +25,6 @@
   ../Common/ArmLib.c\r
 \r
   NullArmLib.c\r
-  NullArmCacheInformation.c\r
 \r
 [Sources.ARM]\r
   ../Common/Arm/ArmLibSupport.S    | GCC\r