--- /dev/null
+/** @file
+ Memory-only library functions with no library constructor/destructor
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseLib.h
+
+**/
+
+#ifndef __BASE_LIB__
+#define __BASE_LIB__
+
+//
+// Definitions for architecture specific types
+// These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER
+//
+
+//
+// SPIN_LOCK
+//
+typedef volatile UINTN SPIN_LOCK;
+
+#if defined (MDE_CPU_IA32)
+//
+// IA32 context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT32 Ebx;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT32 Eip;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+
+#elif defined (MDE_CPU_IPF)
+//
+// IPF context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 F2[2];
+ UINT64 F3[2];
+ UINT64 F4[2];
+ UINT64 F5[2];
+ UINT64 F16[2];
+ UINT64 F17[2];
+ UINT64 F18[2];
+ UINT64 F19[2];
+ UINT64 F20[2];
+ UINT64 F21[2];
+ UINT64 F22[2];
+ UINT64 F23[2];
+ UINT64 F24[2];
+ UINT64 F25[2];
+ UINT64 F26[2];
+ UINT64 F27[2];
+ UINT64 F28[2];
+ UINT64 F29[2];
+ UINT64 F30[2];
+ UINT64 F31[2];
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 SP;
+ UINT64 BR0;
+ UINT64 BR1;
+ UINT64 BR2;
+ UINT64 BR3;
+ UINT64 BR4;
+ UINT64 BR5;
+ UINT64 InitialUNAT;
+ UINT64 AfterSpillUNAT;
+ UINT64 PFS;
+ UINT64 BSP;
+ UINT64 Predicates;
+ UINT64 LoopCount;
+ UINT64 FPSR;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
+
+#elif defined (MDE_CPU_X64)
+//
+// X64 context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 Rbx;
+ UINT64 Rsp;
+ UINT64 Rbp;
+ UINT64 Rdi;
+ UINT64 Rsi;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 Rip;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+
+#elif defined (MDE_CPU_EBC)
+//
+// EBC context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 IP;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
+
+#else
+#error Unknown Processor Type
+#endif
+
+//
+// String Services
+//
+
+/**
+ Copies one Null-terminated Unicode string to another Null-terminated Unicode
+ string and returns the new Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destiantion
+
+**/
+CHAR16 *
+EFIAPI
+StrCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ );
+
+
+/**
+ Copies one Null-terminated Unicode string with a maximum length to another
+ Null-terminated Unicode string with a maximum length and returns the new
+ Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. At most, Length Unicode
+ characters are copied from Source to Destination. If Length is 0, then
+ Destination is returned unmodified. If Length is greater that the number of
+ Unicode characters in Source, then Destination is padded with Null Unicode
+ characters. If Source and Destination overlap, then the results are
+ undefined.
+
+ If Length > 0 and Destination is NULL, then ASSERT().
+ If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to copy.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the length of a Null-terminated Unicode string.
+
+ This function returns the number of Unicode characters in the Null-terminated
+ Unicode string specified by String.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+StrLen (
+ IN CONST CHAR16 *String
+ );
+
+
+/**
+ Returns the size of a Null-terminated Unicode string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated Unicode
+ string specified by String.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+StrSize (
+ IN CONST CHAR16 *String
+ );
+
+
+/**
+ Compares two Null-terminated Unicode strings, and returns the difference
+ between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched Unicode character in SecondString subtracted from the first
+ mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If FirstString is not aligned on a 16-bit boundary, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If SecondString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
+ );
+
+
+/**
+ Compares two Null-terminated Unicode strings with maximum lengths, and
+ returns the difference between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. At most, Length Unicode
+ characters will be compared. If Length is 0, then 0 is returned. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched Unicode character in SecondString
+ subtracted from the first mismatched Unicode character in FirstString.
+
+ If Length > 0 and FirstString is NULL, then ASSERT().
+ If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().
+ If Length > 0 and SecondString is NULL, then ASSERT().
+ If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to compare.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrnCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
+ );
+
+
+/**
+ Concatenates one Null-terminated Unicode string to another Null-terminated
+ Unicode string, and returns the concatenated Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination. The Null-terminated concatenated
+ Unicode String is returned. If Source and Destination overlap, then the
+ results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Destination is not aligned on a 16-bit bounadary, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source is not aligned on a 16-bit bounadary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ );
+
+
+/**
+ Concatenates one Null-terminated Unicode string with a maximum length to the
+ end of another Null-terminated Unicode string, and returns the concatenated
+ Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination, and Destination is returned. At
+ most, Length Unicode characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ );
+
+/**
+ Returns the first occurance of a Null-terminated Unicode sub-string
+ in a Null-terminated Unicode string.
+
+ This function scans the contents of the Null-terminated Unicode string
+ specified by String and returns the first occurrence of SearchString.
+ If SearchString is not found in String, then NULL is returned. If
+ the length of SearchString is zero, then String is
+ returned.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned on a 16-bit boundary, then ASSERT().
+ If SearchString is NULL, then ASSERT().
+ If SearchString is not aligned on a 16-bit boundary, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and SearchString
+ or String contains more than PcdMaximumUnicodeStringLength Unicode
+ characters not including the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+ @param SearchString Pointer to a Null-terminated Unicode string to search for.
+
+ @retval NULL If the SearchString does not appear in String.
+ @retval !NULL If there is a match.
+
+**/
+CHAR16 *
+EFIAPI
+StrStr (
+ IN CONST CHAR16 *String,
+ IN CONST CHAR16 *SearchString
+ );
+
+/**
+ Convert a Null-terminated Unicode decimal string to a value of
+ type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the Unicode string specified by String as a decimal number. The format
+ of the input Unicode string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The
+ function will ignore the pad space, which includes spaces or
+ tab characters, before [decimal digits]. The running zero in the
+ beginning of [decimal digits] will be ignored. Then, the function
+ stops at the first character that is a not a valid decimal character
+ or a Null-terminator, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits,
+ then 0 is returned.
+ If the number represented by String overflows according
+ to the range defined by UINTN, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+StrDecimalToUintn (
+ IN CONST CHAR16 *String
+ );
+
+/**
+ Convert a Null-terminated Unicode decimal string to a value of
+ type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the Unicode string specified by String as a decimal number. The format
+ of the input Unicode string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The
+ function will ignore the pad space, which includes spaces or
+ tab characters, before [decimal digits]. The running zero in the
+ beginning of [decimal digits] will be ignored. Then, the function
+ stops at the first character that is a not a valid decimal character
+ or a Null-terminator, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits,
+ then 0 is returned.
+ If the number represented by String overflows according
+ to the range defined by UINT64, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+StrDecimalToUint64 (
+ IN CONST CHAR16 *String
+ );
+
+
+/**
+ Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the Unicode string specified by String as a hexadecimal number.
+ The format of the input Unicode string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
+ If "x" appears in the input string, it must be prefixed with at least one 0.
+ The function will ignore the pad space, which includes spaces or tab characters,
+ before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
+ [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
+ first valid hexadecimal digit. Then, the function stops at the first character that is
+ a not a valid hexadecimal character or NULL, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then zero is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
+ then zero is returned.
+ If the number represented by String overflows according to the range defined by
+ UINTN, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+StrHexToUintn (
+ IN CONST CHAR16 *String
+ );
+
+
+/**
+ Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the Unicode string specified by String as a hexadecimal number.
+ The format of the input Unicode string String is
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
+ If "x" appears in the input string, it must be prefixed with at least one 0.
+ The function will ignore the pad space, which includes spaces or tab characters,
+ before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
+ [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
+ first valid hexadecimal digit. Then, the function stops at the first character that is
+ a not a valid hexadecimal character or NULL, whichever one comes first.
+
+ If String is NULL, then ASSERT().
+ If String is not aligned in a 16-bit boundary, then ASSERT().
+ If String has only pad spaces, then zero is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
+ then zero is returned.
+ If the number represented by String overflows according to the range defined by
+ UINT64, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+StrHexToUint64 (
+ IN CONST CHAR16 *String
+ );
+
+
+/**
+ Convert one Null-terminated Unicode string to a Null-terminated
+ ASCII string and returns the ASCII string.
+
+ This function converts the content of the Unicode string Source
+ to the ASCII string Destination by copying the lower 8 bits of
+ each Unicode character. It returns Destination.
+
+ If any Unicode characters in Source contain non-zero value in
+ the upper 8 bits, then ASSERT().
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source is not aligned on a 16-bit boundary, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains
+ more than PcdMaximumUnicodeStringLength Unicode characters not including
+ the Null-terminator, then ASSERT().
+
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more
+ than PcdMaximumAsciiStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Destination Pointer to a Null-terminated ASCII string.
+
+ @reture Destination
+
+**/
+CHAR8 *
+EFIAPI
+UnicodeStrToAsciiStr (
+ IN CONST CHAR16 *Source,
+ OUT CHAR8 *Destination
+ );
+
+
+/**
+ Copies one Null-terminated ASCII string to another Null-terminated ASCII
+ string and returns the new ASCII string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ );
+
+
+/**
+ Copies one Null-terminated ASCII string with a maximum length to another
+ Null-terminated ASCII string with a maximum length and returns the new ASCII
+ string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. At most, Length ASCII characters
+ are copied from Source to Destination. If Length is 0, then Destination is
+ returned unmodified. If Length is greater that the number of ASCII characters
+ in Source, then Destination is padded with Null ASCII characters. If Source
+ and Destination overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to copy.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the length of a Null-terminated ASCII string.
+
+ This function returns the number of ASCII characters in the Null-terminated
+ ASCII string specified by String.
+
+ If Length > 0 and Destination is NULL, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Returns the size of a Null-terminated ASCII string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated ASCII string
+ specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrSize (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Compares two Null-terminated ASCII strings, and returns the difference
+ between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched ASCII character in SecondString subtracted from the first
+ mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ );
+
+
+/**
+ Performs a case insensitive comparison of two Null-terminated ASCII strings,
+ and returns the difference between the first mismatched ASCII characters.
+
+ This function performs a case insensitive comparison of the Null-terminated
+ ASCII string FirstString to the Null-terminated ASCII string SecondString. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched lower case ASCII character in
+ SecondString subtracted from the first mismatched lower case ASCII character
+ in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString using case insensitive
+ comparisons.
+ @retval !=0 FirstString is not identical to SecondString using case
+ insensitive comparisons.
+
+**/
+INTN
+EFIAPI
+AsciiStriCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ );
+
+
+/**
+ Compares two Null-terminated ASCII strings with maximum lengths, and returns
+ the difference between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. At most, Length ASCII characters
+ will be compared. If Length is 0, then 0 is returned. If FirstString is
+ identical to SecondString, then 0 is returned. Otherwise, the value returned
+ is the first mismatched ASCII character in SecondString subtracted from the
+ first mismatched ASCII character in FirstString.
+
+ If Length > 0 and FirstString is NULL, then ASSERT().
+ If Length > 0 and SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrnCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
+ );
+
+
+/**
+ Concatenates one Null-terminated ASCII string to another Null-terminated
+ ASCII string, and returns the concatenated ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents of
+ Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination. The Null-terminated concatenated ASCII
+ String is returned.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ );
+
+
+/**
+ Concatenates one Null-terminated ASCII string with a maximum length to the
+ end of another Null-terminated ASCII string, and returns the concatenated
+ ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents
+ of Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination, and Destination is returned. At most,
+ Length ASCII characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Length > 0 and Destination is NULL, then ASSERT().
+ If Length > 0 and Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters not including the Null-terminator, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the first occurance of a Null-terminated ASCII sub-string
+ in a Null-terminated ASCII string.
+
+ This function scans the contents of the ASCII string specified by String
+ and returns the first occurrence of SearchString. If SearchString is not
+ found in String, then NULL is returned. If the length of SearchString is zero,
+ then String is returned.
+
+ If String is NULL, then ASSERT().
+ If SearchString is NULL, then ASSERT().
+
+ If PcdMaximumAsciiStringLength is not zero, and SearchString or
+ String contains more than PcdMaximumAsciiStringLength Unicode characters
+ not including the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+ @param SearchString Pointer to a Null-terminated ASCII string to search for.
+
+ @retval NULL If the SearchString does not appear in String.
+ @retval !NULL If there is a match.
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrStr (
+ IN CONST CHAR8 *String,
+ IN CONST CHAR8 *SearchString
+ );
+
+
+/**
+ Convert a Null-terminated ASCII decimal string to a value of type
+ UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents
+ of the ASCII string String as a decimal number. The format of the input
+ ASCII string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The function will
+ ignore the pad space, which includes spaces or tab characters, before the digits.
+ The running zero in the beginning of [decimal digits] will be ignored. Then, the
+ function stops at the first character that is a not a valid decimal character or
+ Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits, then 0 is returned.
+ If the number represented by String overflows according to the range defined by
+ UINTN, then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+AsciiStrDecimalToUintn (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Convert a Null-terminated ASCII decimal string to a value of type
+ UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents
+ of the ASCII string String as a decimal number. The format of the input
+ ASCII string String is:
+
+ [spaces] [decimal digits].
+
+ The valid decimal digit character is in the range [0-9]. The function will
+ ignore the pad space, which includes spaces or tab characters, before the digits.
+ The running zero in the beginning of [decimal digits] will be ignored. Then, the
+ function stops at the first character that is a not a valid decimal character or
+ Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no pad spaces or valid decimal digits, then 0 is returned.
+ If the number represented by String overflows according to the range defined by
+ UINT64, then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+AsciiStrDecimalToUint64 (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
+
+ This function returns a value of type UINTN by interpreting the contents of
+ the ASCII string String as a hexadecimal number. The format of the input ASCII
+ string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
+ appears in the input string, it must be prefixed with at least one 0. The function
+ will ignore the pad space, which includes spaces or tab characters, before [zeros],
+ [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
+ will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
+ digit. Then, the function stops at the first character that is a not a valid
+ hexadecimal character or Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
+ 0 is returned.
+
+ If the number represented by String overflows according to the range defined by UINTN,
+ then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero,
+ and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINTN
+
+**/
+UINTN
+EFIAPI
+AsciiStrHexToUintn (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
+
+ This function returns a value of type UINT64 by interpreting the contents of
+ the ASCII string String as a hexadecimal number. The format of the input ASCII
+ string String is:
+
+ [spaces][zeros][x][hexadecimal digits].
+
+ The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
+ The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
+ appears in the input string, it must be prefixed with at least one 0. The function
+ will ignore the pad space, which includes spaces or tab characters, before [zeros],
+ [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
+ will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
+ digit. Then, the function stops at the first character that is a not a valid
+ hexadecimal character or Null-terminator, whichever on comes first.
+
+ If String has only pad spaces, then 0 is returned.
+ If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
+ 0 is returned.
+
+ If the number represented by String overflows according to the range defined by UINT64,
+ then ASSERT().
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero,
+ and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
+ the Null-terminator, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @retval UINT64
+
+**/
+UINT64
+EFIAPI
+AsciiStrHexToUint64 (
+ IN CONST CHAR8 *String
+ );
+
+
+/**
+ Convert one Null-terminated ASCII string to a Null-terminated
+ Unicode string and returns the Unicode string.
+
+ This function converts the contents of the ASCII string Source to the Unicode
+ string Destination, and returns Destination. The function terminates the
+ Unicode string Destination by appending a Null-terminator character at the end.
+ The caller is responsible to make sure Destination points to a buffer with size
+ equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
+
+ If Destination is NULL, then ASSERT().
+ If Destination is not aligned on a 16-bit boundary, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
+ then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Destination Pointer to a Null-terminated Unicode string.
+
+ @reture Destination
+
+**/
+CHAR16 *
+EFIAPI
+AsciiStrToUnicodeStr (
+ IN CONST CHAR8 *Source,
+ OUT CHAR16 *Destination
+ );
+
+
+/**
+ Converts an 8-bit value to an 8-bit BCD value.
+
+ Converts the 8-bit value specified by Value to BCD. The BCD value is
+ returned.
+
+ If Value >= 100, then ASSERT().
+
+ @param Value The 8-bit value to convert to BCD. Range 0..99.
+
+ @return The BCD value
+
+**/
+UINT8
+EFIAPI
+DecimalToBcd8 (
+ IN UINT8 Value
+ );
+
+
+/**
+ Converts an 8-bit BCD value to an 8-bit value.
+
+ Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
+ value is returned.
+
+ If Value >= 0xA0, then ASSERT().
+ If (Value & 0x0F) >= 0x0A, then ASSERT().
+
+ @param Value The 8-bit BCD value to convert to an 8-bit value.
+
+ @return The 8-bit value is returned.
+
+**/
+UINT8
+EFIAPI
+BcdToDecimal8 (
+ IN UINT8 Value
+ );
+
+
+//
+// Linked List Functions and Macros
+//
+
+/**
+ Initializes the head node of a doubly linked list that is declared as a
+ global variable in a module.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this macro, the other linked list functions
+ may be used to add and remove nodes from the linked list. This macro results
+ in smaller executables by initializing the linked list in the data section,
+ instead if calling the InitializeListHead() function to perform the
+ equivalent operation.
+
+ @param ListHead The head note of a list to initiailize.
+
+**/
+#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}
+
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN LIST_ENTRY *ListHead
+ );
+
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Entry
+ );
+
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number
+ of nodes in ListHead, including the ListHead node, is greater than or
+ equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Entry
+ );
+
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ );
+
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *ListHead
+ );
+
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the number of nodes
+ in List, including the List node, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing the FirstEntry and SecondEntry nodes, including
+ the FirstEntry and SecondEntry nodes, is greater than or equal to
+ PcdMaximumLinkedListLength, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN LIST_ENTRY *FirstEntry,
+ IN LIST_ENTRY *SecondEntry
+ );
+
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
+ linked list containing Entry, including the Entry node, is greater than
+ or equal to PcdMaximumLinkedListLength, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ );
+
+//
+// Math Services
+//
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ );
+
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ );
+
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ );
+
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ );
+
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ );
+
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ );
+
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Value
+ );
+
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Value
+ );
+
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ );
+
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ );
+
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ );
+
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ );
+
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ );
+
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ );
+
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Uint16
+ );
+
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Uint16,
+ IN UINT16 Value
+ );
+
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ );
+
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Uint32
+ );
+
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Uint32,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Uint64
+ );
+
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Uint64,
+ IN UINT64 Value
+ );
+
+
+//
+// Bit Field Functions
+//
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+
+//
+// Base Library Synchronization Functions
+//
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ );
+
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN SPIN_LOCK *SpinLock
+ );
+
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ );
+
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ );
+
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN OUT UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN OUT UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ );
+
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN OUT VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ );
+
+
+//
+// Base Library Checksum Functions
+//
+
+/**
+ Calculate the sum of all elements in a buffer in unit of UINT8.
+ During calculation, the carry bits are dropped.
+
+ This function calculates the sum of all elements in a buffer
+ in unit of UINT8. The carry bits in result of addition are dropped.
+ The result is returned as UINT8. If Length is Zero, then Zero is
+ returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer .
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT8
+EFIAPI
+CalculateSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer
+ of 8-bit values.
+
+ This function first calculates the sum of the 8-bit values in the
+ buffer specified by Buffer and Length. The carry bits in the result
+ of addition are dropped. Then, the two's complement of the sum is
+ returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT8
+EFIAPI
+CalculateCheckSum8 (
+ IN CONST UINT8 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the sum of all elements in a buffer of 16-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 16-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT16
+EFIAPI
+CalculateSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 16-bit values.
+
+ This function first calculates the sum of the 16-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT16
+EFIAPI
+CalculateCheckSum16 (
+ IN CONST UINT16 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the sum of all elements in a buffer of 32-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 32-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT32
+EFIAPI
+CalculateSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 32-bit values.
+
+ This function first calculates the sum of the 32-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT32
+EFIAPI
+CalculateCheckSum32 (
+ IN CONST UINT32 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the sum of all elements in a buffer of 64-bit values. During
+ calculation, the carry bits are dropped.
+
+ This function calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in result of addition are dropped.
+ The 64-bit result is returned. If Length is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the sum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Sum The sum of Buffer with carry bits dropped during additions.
+
+**/
+UINT64
+EFIAPI
+CalculateSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+ Returns the two's complement checksum of all elements in a buffer of
+ 64-bit values.
+
+ This function first calculates the sum of the 64-bit values in the buffer
+ specified by Buffer and Length. The carry bits in the result of addition
+ are dropped. Then, the two's complement of the sum is returned. If Length
+ is 0, then 0 is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the buffer to carry out the checksum operation.
+ @param Length The size, in bytes, of Buffer.
+
+ @return Checksum The 2's complement checksum of Buffer.
+
+**/
+UINT64
+EFIAPI
+CalculateCheckSum64 (
+ IN CONST UINT64 *Buffer,
+ IN UINTN Length
+ );
+
+
+//
+// Base Library CPU Functions
+//
+typedef
+VOID
+(EFIAPI *SWITCH_STACK_ENTRY_POINT) (
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2 OPTIONAL
+ );
+
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ );
+
+
+/**
+ Saves the current CPU context that can be restored with a call to LongJump()
+ and returns 0.
+
+ Saves the current CPU context in the buffer specified by JumpBuffer and
+ returns 0. The initial call to SetJump() must always return 0. Subsequent
+ calls to LongJump() cause a non-zero value to be returned by SetJump().
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+ @retval 0 Indicates a return from SetJump().
+
+**/
+UINTN
+EFIAPI
+SetJump (
+ OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer. This
+ function never returns to the caller. Instead is resumes execution based on
+ the state of JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Value is 0, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is
+ restored and must be non-zero.
+
+**/
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ );
+
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ );
+
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ );
+
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ );
+
+
+/**
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ );
+
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ );
+
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ );
+
+
+/**
+ Places the CPU in a sleep state until an interrupt is received.
+
+ Places the CPU in a sleep state until an interrupt is received. If interrupts
+ are disabled prior to calling this function, then the CPU will be placed in a
+ sleep state indefinitely.
+
+**/
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ );
+
+
+/**
+ Requests CPU to pause for a short period of time.
+
+ Requests CPU to pause for a short period of time. Typically used in MP
+ systems to prevent memory starvation while waiting for a spin lock.
+
+**/
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ );
+
+
+/**
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+**/
+VOID
+EFIAPI
+CpuFlushTlb (
+ VOID
+ );
+
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the
+ new stack specified by NewStack and passing in the parameters specified
+ by Context1 and Context2. Context1 and Context2 are optional and may
+ be NULL. The function EntryPoint must never return. This function
+ supports a variable number of arguments following the NewStack parameter.
+ These additional arguments are ignored on IA-32, x64, and EBC.
+ IPF CPUs expect one additional parameter of type VOID * that specifies
+ the new backing store pointer.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ ...
+ );
+
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ );
+
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ );
+
+
+#if defined (MDE_CPU_IPF)
+
+/**
+ Flush a range of cache lines in the cache coherency domain of the calling
+ CPU.
+
+ Invalidates the cache lines specified by Address and Length. If Address is
+ not aligned on a cache line boundary, then entire cache line containing
+ Address is invalidated. If Address + Length is not aligned on a cache line
+ boundary, then the entire instruction cache line containing Address + Length
+ -1 is invalidated. This function may choose to invalidate the entire
+ instruction cache if that is more efficient than invalidating the specified
+ range. If Length is 0, the no instruction cache lines are invalidated.
+ Address is returned.
+
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ @param Address The base address of the instruction lines to invalidate. If
+ the CPU is in a physical addressing mode, then Address is a
+ physical address. If the CPU is in a virtual addressing mode,
+ then Address is a virtual address.
+
+ @param Length The number of bytes to invalidate from the instruction cache.
+
+ @return Address
+
+**/
+VOID *
+EFIAPI
+IpfFlushCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ );
+
+
+/**
+ Executes a FC instruction
+ Executes a FC instruction on the cache line specified by Address.
+ The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
+ An implementation may flush a larger region. This function is only available on IPF.
+
+ @param Address The Address of cache line to be flushed.
+
+ @return The address of FC instruction executed.
+
+**/
+UINT64
+EFIAPI
+AsmFc (
+ IN UINT64 Address
+ );
+
+
+/**
+ Executes a FC.I instruction.
+ Executes a FC.I instruction on the cache line specified by Address.
+ The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
+ An implementation may flush a larger region. This function is only available on IPF.
+
+ @param Address The Address of cache line to be flushed.
+
+ @return The address of FC.I instruction executed.
+
+**/
+UINT64
+EFIAPI
+AsmFci (
+ IN UINT64 Address
+ );
+
+
+/**
+ Reads the current value of a Processor Identifier Register (CPUID).
+ The Index of largest implemented CPUID (One less than the number of implemented CPUID
+ registers) is determined by CPUID [3] bits {7:0}.
+ No parameter checking is performed on Index. If the Index value is beyond the
+ implemented CPUID register range, a Reserved Register/Field fault may occur. The caller
+ must either guarantee that Index is valid, or the caller must set up fault handlers to
+ catch the faults. This function is only available on IPF.
+
+ @param Index The 8-bit Processor Identifier Register index to read.
+
+ @return The current value of Processor Identifier Register specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadCpuid (
+ IN UINT8 Index
+ );
+
+
+/**
+ Reads the current value of 64-bit Processor Status Register (PSR).
+ This function is only available on IPF.
+
+ @return The current value of PSR.
+
+**/
+UINT64
+EFIAPI
+AsmReadPsr (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit Processor Status Register (PSR).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur. The caller must either guarantee that Value is valid, or the caller must set up fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to PSR.
+
+ @return The 64-bit value written to the PSR.
+
+**/
+UINT64
+EFIAPI
+AsmWritePsr (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #0 (KR0).
+ This function is only available on IPF.
+
+ @return The current value of KR0.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #1 (KR1).
+ This function is only available on IPF.
+
+ @return The current value of KR1.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr1 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #2 (KR2).
+ This function is only available on IPF.
+
+ @return The current value of KR2.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr2 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #3 (KR3).
+ This function is only available on IPF.
+
+ @return The current value of KR3.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr3 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #4 (KR4).
+ This function is only available on IPF.
+
+ @return The current value of KR4.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr4 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #5 (KR5).
+ This function is only available on IPF.
+
+ @return The current value of KR5.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr5 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #6 (KR6).
+ This function is only available on IPF.
+
+ @return The current value of KR6.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr6 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit Kernel Register #7 (KR7).
+ This function is only available on IPF.
+
+ @return The current value of KR7.
+
+**/
+UINT64
+EFIAPI
+AsmReadKr7 (
+ VOID
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #0 (KR0).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR0.
+
+ @return The 64-bit value written to the KR0.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr0 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #1 (KR1).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR1.
+
+ @return The 64-bit value written to the KR1.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr1 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #2 (KR2).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR2.
+
+ @return The 64-bit value written to the KR2.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr2 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #3 (KR3).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR3.
+
+ @return The 64-bit value written to the KR3.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr3 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #4 (KR4).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR4.
+
+ @return The 64-bit value written to the KR4.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr4 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #5 (KR5).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR5.
+
+ @return The 64-bit value written to the KR5.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr5 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #6 (KR6).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR6.
+
+ @return The 64-bit value written to the KR6.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr6 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Write the current value of 64-bit Kernel Register #7 (KR7).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to KR7.
+
+ @return The 64-bit value written to the KR7.
+
+**/
+UINT64
+EFIAPI
+AsmWriteKr7 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of Interval Timer Counter Register (ITC).
+ This function is only available on IPF.
+
+ @return The current value of ITC.
+
+**/
+UINT64
+EFIAPI
+AsmReadItc (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Interval Timer Vector Register (ITV).
+ This function is only available on IPF.
+
+ @return The current value of ITV.
+
+**/
+UINT64
+EFIAPI
+AsmReadItv (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Interval Timer Match Register (ITM).
+ This function is only available on IPF.
+
+ @return The current value of ITM.
+**/
+UINT64
+EFIAPI
+AsmReadItm (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit Interval Timer Counter Register (ITC).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to ITC.
+
+ @return The 64-bit value written to the ITC.
+
+**/
+UINT64
+EFIAPI
+AsmWriteItc (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Interval Timer Match Register (ITM).
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to ITM.
+
+ @return The 64-bit value written to the ITM.
+
+**/
+UINT64
+EFIAPI
+AsmWriteItm (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Interval Timer Vector Register (ITV).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to ITV.
+
+ @return The 64-bit value written to the ITV.
+
+**/
+UINT64
+EFIAPI
+AsmWriteItv (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of Default Control Register (DCR).
+ This function is only available on IPF.
+
+ @return The current value of DCR.
+
+**/
+UINT64
+EFIAPI
+AsmReadDcr (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Interruption Vector Address Register (IVA).
+ This function is only available on IPF.
+
+ @return The current value of IVA.
+**/
+UINT64
+EFIAPI
+AsmReadIva (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Page Table Address Register (PTA).
+ This function is only available on IPF.
+
+ @return The current value of PTA.
+
+**/
+UINT64
+EFIAPI
+AsmReadPta (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit Default Control Register (DCR).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to DCR.
+
+ @return The 64-bit value written to the DCR.
+
+**/
+UINT64
+EFIAPI
+AsmWriteDcr (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Interruption Vector Address Register (IVA).
+ The size of vector table is 32 K bytes and is 32 K bytes aligned
+ the low 15 bits of Value is ignored when written.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to IVA.
+
+ @return The 64-bit value written to the IVA.
+
+**/
+UINT64
+EFIAPI
+AsmWriteIva (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Page Table Address Register (PTA).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to PTA.
+
+ @return The 64-bit value written to the PTA.
+**/
+UINT64
+EFIAPI
+AsmWritePta (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of Local Interrupt ID Register (LID).
+ This function is only available on IPF.
+
+ @return The current value of LID.
+
+**/
+UINT64
+EFIAPI
+AsmReadLid (
+ VOID
+ );
+
+
+/**
+ Reads the current value of External Interrupt Vector Register (IVR).
+ This function is only available on IPF.
+
+ @return The current value of IVR.
+
+**/
+UINT64
+EFIAPI
+AsmReadIvr (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Task Priority Register (TPR).
+ This function is only available on IPF.
+
+ @return The current value of TPR.
+
+**/
+UINT64
+EFIAPI
+AsmReadTpr (
+ VOID
+ );
+
+
+/**
+ Reads the current value of External Interrupt Request Register #0 (IRR0).
+ This function is only available on IPF.
+
+ @return The current value of IRR0.
+
+**/
+UINT64
+EFIAPI
+AsmReadIrr0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of External Interrupt Request Register #1 (IRR1).
+ This function is only available on IPF.
+
+ @return The current value of IRR1.
+
+**/
+UINT64
+EFIAPI
+AsmReadIrr1 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of External Interrupt Request Register #2 (IRR2).
+ This function is only available on IPF.
+
+ @return The current value of IRR2.
+
+**/
+UINT64
+EFIAPI
+AsmReadIrr2 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of External Interrupt Request Register #3 (IRR3).
+ This function is only available on IPF.
+
+ @return The current value of IRR3.
+
+**/
+UINT64
+EFIAPI
+AsmReadIrr3 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Performance Monitor Vector Register (PMV).
+ This function is only available on IPF.
+
+ @return The current value of PMV.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmv (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Corrected Machine Check Vector Register (CMCV).
+ This function is only available on IPF.
+
+ @return The current value of CMCV.
+
+**/
+UINT64
+EFIAPI
+AsmReadCmcv (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Local Redirection Register #0 (LRR0).
+ This function is only available on IPF.
+
+ @return The current value of LRR0.
+
+**/
+UINT64
+EFIAPI
+AsmReadLrr0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Local Redirection Register #1 (LRR1).
+ This function is only available on IPF.
+
+ @return The current value of LRR1.
+
+**/
+UINT64
+EFIAPI
+AsmReadLrr1 (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to LID.
+
+ @return The 64-bit value written to the LID.
+
+**/
+UINT64
+EFIAPI
+AsmWriteLid (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Task Priority Register (TPR).
+ No parameter checking is performed on Value. All bits of Value corresponding to
+ reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to TPR.
+
+ @return The 64-bit value written to the TPR.
+
+**/
+UINT64
+EFIAPI
+AsmWriteTpr (
+ IN UINT64 Value
+ );
+
+
+/**
+ Performs a write operation on End OF External Interrupt Register (EOI).
+ Writes a value of 0 to the EOI Register. This function is only available on IPF.
+
+**/
+VOID
+EFIAPI
+AsmWriteEoi (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
+ No parameter checking is performed on Value. All bits of Value corresponding
+ to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to PMV.
+
+ @return The 64-bit value written to the PMV.
+
+**/
+UINT64
+EFIAPI
+AsmWritePmv (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
+ No parameter checking is performed on Value. All bits of Value corresponding
+ to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to CMCV.
+
+ @return The 64-bit value written to the CMCV.
+
+**/
+UINT64
+EFIAPI
+AsmWriteCmcv (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
+ No parameter checking is performed on Value. All bits of Value corresponding
+ to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to LRR0.
+
+ @return The 64-bit value written to the LRR0.
+
+**/
+UINT64
+EFIAPI
+AsmWriteLrr0 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
+ No parameter checking is performed on Value. All bits of Value corresponding
+ to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Value is valid, or the caller must
+ set up fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to LRR1.
+
+ @return The 64-bit value written to the LRR1.
+
+**/
+UINT64
+EFIAPI
+AsmWriteLrr1 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of Instruction Breakpoint Register (IBR).
+
+ The Instruction Breakpoint Registers are used in pairs. The even numbered
+ registers contain breakpoint addresses, and the odd numbered registers contain
+ breakpoint mask conditions. At least 4 instruction registers pairs are implemented
+ on all processor models. Implemented registers are contiguous starting with
+ register 0. No parameter checking is performed on Index, and if the Index value
+ is beyond the implemented IBR register range, a Reserved Register/Field fault may
+ occur. The caller must either guarantee that Index is valid, or the caller must
+ set up fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Instruction Breakpoint Register index to read.
+
+ @return The current value of Instruction Breakpoint Register specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadIbr (
+ IN UINT8 Index
+ );
+
+
+/**
+ Reads the current value of Data Breakpoint Register (DBR).
+
+ The Data Breakpoint Registers are used in pairs. The even numbered registers
+ contain breakpoint addresses, and odd numbered registers contain breakpoint
+ mask conditions. At least 4 data registers pairs are implemented on all processor
+ models. Implemented registers are contiguous starting with register 0.
+ No parameter checking is performed on Index. If the Index value is beyond
+ the implemented DBR register range, a Reserved Register/Field fault may occur.
+ The caller must either guarantee that Index is valid, or the caller must set up
+ fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Data Breakpoint Register index to read.
+
+ @return The current value of Data Breakpoint Register specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadDbr (
+ IN UINT8 Index
+ );
+
+
+/**
+ Reads the current value of Performance Monitor Configuration Register (PMC).
+
+ All processor implementations provide at least 4 performance counters
+ (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
+ status registers (PMC [0]¡ PMC [3]). Processor implementations may provide
+ additional implementation-dependent PMC and PMD to increase the number of
+ ¡®generic¡¯ performance counters (PMC/PMD pairs). The remainder of PMC and PMD
+ register set is implementation dependent. No parameter checking is performed
+ on Index. If the Index value is beyond the implemented PMC register range,
+ zero value will be returned.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Performance Monitor Configuration Register index to read.
+
+ @return The current value of Performance Monitor Configuration Register
+ specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT8 Index
+ );
+
+
+/**
+ Reads the current value of Performance Monitor Data Register (PMD).
+
+ All processor implementations provide at least 4 performance counters
+ (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
+ overflow status registers (PMC [0]¡ PMC [3]). Processor implementations may
+ provide additional implementation-dependent PMC and PMD to increase the number
+ of ¡®generic¡¯ performance counters (PMC/PMD pairs). The remainder of PMC and PMD
+ register set is implementation dependent. No parameter checking is performed
+ on Index. If the Index value is beyond the implemented PMD register range,
+ zero value will be returned.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Performance Monitor Data Register index to read.
+
+ @return The current value of Performance Monitor Data Register specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmd (
+ IN UINT8 Index
+ );
+
+
+/**
+ Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
+
+ Writes current value of Instruction Breakpoint Register specified by Index.
+ The Instruction Breakpoint Registers are used in pairs. The even numbered
+ registers contain breakpoint addresses, and odd numbered registers contain
+ breakpoint mask conditions. At least 4 instruction registers pairs are implemented
+ on all processor models. Implemented registers are contiguous starting with
+ register 0. No parameter checking is performed on Index. If the Index value
+ is beyond the implemented IBR register range, a Reserved Register/Field fault may
+ occur. The caller must either guarantee that Index is valid, or the caller must
+ set up fault handlers to catch the faults.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Instruction Breakpoint Register index to write.
+ @param Value The 64-bit value to write to IBR.
+
+ @return The 64-bit value written to the IBR.
+
+**/
+UINT64
+EFIAPI
+AsmWriteIbr (
+ IN UINT8 Index,
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Data Breakpoint Register (DBR).
+
+ Writes current value of Data Breakpoint Register specified by Index.
+ The Data Breakpoint Registers are used in pairs. The even numbered registers
+ contain breakpoint addresses, and odd numbered registers contain breakpoint
+ mask conditions. At least 4 data registers pairs are implemented on all processor
+ models. Implemented registers are contiguous starting with register 0. No parameter
+ checking is performed on Index. If the Index value is beyond the implemented
+ DBR register range, a Reserved Register/Field fault may occur. The caller must
+ either guarantee that Index is valid, or the caller must set up fault handlers to
+ catch the faults.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Data Breakpoint Register index to write.
+ @param Value The 64-bit value to write to DBR.
+
+ @return The 64-bit value written to the DBR.
+
+**/
+UINT64
+EFIAPI
+AsmWriteDbr (
+ IN UINT8 Index,
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
+
+ Writes current value of Performance Monitor Configuration Register specified by Index.
+ All processor implementations provide at least 4 performance counters
+ (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status
+ registers (PMC [0]¡ PMC [3]). Processor implementations may provide additional
+ implementation-dependent PMC and PMD to increase the number of ¡®generic¡¯ performance
+ counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation
+ dependent. No parameter checking is performed on Index. If the Index value is
+ beyond the implemented PMC register range, the write is ignored.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Performance Monitor Configuration Register index to write.
+ @param Value The 64-bit value to write to PMC.
+
+ @return The 64-bit value written to the PMC.
+
+**/
+UINT64
+EFIAPI
+AsmWritePmc (
+ IN UINT8 Index,
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit Performance Monitor Data Register (PMD).
+
+ Writes current value of Performance Monitor Data Register specified by Index.
+ All processor implementations provide at least 4 performance counters
+ (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow
+ status registers (PMC [0]¡ PMC [3]). Processor implementations may provide
+ additional implementation-dependent PMC and PMD to increase the number of ¡®generic¡¯
+ performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set
+ is implementation dependent. No parameter checking is performed on Index. If the
+ Index value is beyond the implemented PMD register range, the write is ignored.
+ This function is only available on IPF.
+
+ @param Index The 8-bit Performance Monitor Data Register index to write.
+ @param Value The 64-bit value to write to PMD.
+
+ @return The 64-bit value written to the PMD.
+
+**/
+UINT64
+EFIAPI
+AsmWritePmd (
+ IN UINT8 Index,
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of 64-bit Global Pointer (GP).
+
+ Reads and returns the current value of GP.
+ This function is only available on IPF.
+
+ @return The current value of GP.
+
+**/
+UINT64
+EFIAPI
+AsmReadGp (
+ VOID
+ );
+
+
+/**
+ Write the current value of 64-bit Global Pointer (GP).
+
+ Writes the current value of GP. The 64-bit value written to the GP is returned.
+ No parameter checking is performed on Value.
+ This function is only available on IPF.
+
+ @param Value The 64-bit value to write to GP.
+
+ @return The 64-bit value written to the GP.
+
+**/
+UINT64
+EFIAPI
+AsmWriteGp (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of 64-bit Stack Pointer (SP).
+
+ Reads and returns the current value of SP.
+ This function is only available on IPF.
+
+ @return The current value of SP.
+
+**/
+UINT64
+EFIAPI
+AsmReadSp (
+ VOID
+ );
+
+
+/**
+ Determines if the CPU is currently executing in virtual, physical, or mixed mode.
+
+ Determines the current execution mode of the CPU.
+ If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
+ If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
+ If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
+ and -1 is returned.
+ This function is only available on IPF.
+
+ @return 1 The CPU is in virtual mode.
+ @return 0 The CPU is in physical mode.
+ @return -1 The CPU is in mixed mode.
+
+**/
+INT64
+EFIAPI
+AsmCpuVirtual (
+ VOID
+ );
+
+
+/**
+ Makes a PAL procedure call.
+
+ This is a wrapper function to make a PAL procedure call. Based on the Index
+ value this API will make static or stacked PAL call. The following table
+ describes the usage of PAL Procedure Index Assignment. Architected procedures
+ may be designated as required or optional. If a PAL procedure is specified
+ as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
+ Status field of the PAL_CALL_RETURN structure.
+ This indicates that the procedure is not present in this PAL implementation.
+ It is the caller¡¯s responsibility to check for this return code after calling
+ any optional PAL procedure.
+ No parameter checking is performed on the 5 input parameters, but there are
+ some common rules that the caller should follow when making a PAL call. Any
+ address passed to PAL as buffers for return parameters must be 8-byte aligned.
+ Unaligned addresses may cause undefined results. For those parameters defined
+ as reserved or some fields defined as reserved must be zero filled or the invalid
+ argument return value may be returned or undefined result may occur during the
+ execution of the procedure. If the PalEntryPoint does not point to a valid
+ PAL entry point then the system behavior is undefined. This function is only
+ available on IPF.
+
+ @param PalEntryPoint The PAL procedure calls entry point.
+ @param Index The PAL procedure Index number.
+ @param Arg2 The 2nd parameter for PAL procedure calls.
+ @param Arg3 The 3rd parameter for PAL procedure calls.
+ @param Arg4 The 4th parameter for PAL procedure calls.
+
+ @return structure returned from the PAL Call procedure, including the status and return value.
+
+**/
+PAL_CALL_RETURN
+EFIAPI
+AsmPalCall (
+ IN UINT64 PalEntryPoint,
+ IN UINT64 Index,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4
+ );
+
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+ @param NewBsp A pointer to the new memory location for RSE backing
+ store.
+
+**/
+VOID
+EFIAPI
+AsmSwitchStackAndBackingStore (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack,
+ IN VOID *NewBsp
+ );
+
+
+//
+// Bugbug: This call should be removed after
+// the PalCall Instance issue has been fixed.
+//
+/**
+ Performs a PAL call using static calling convention.
+
+ An internal function to perform a PAL call using static calling convention.
+
+ @param PalEntryPoint The entry point address of PAL. The address in ar.kr5
+ would be used if this parameter were NULL on input.
+ @param Arg1 The first argument of a PAL call.
+ @param Arg1 The second argument of a PAL call.
+ @param Arg1 The third argument of a PAL call.
+ @param Arg1 The fourth argument of a PAL call.
+
+ @return The values returned in r8, r9, r10 and r11.
+
+**/
+PAL_CALL_RETURN
+PalCallStatic (
+ IN CONST VOID *PalEntryPoint,
+ IN UINT64 Arg1,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4
+ );
+
+
+#elif defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+//
+// IA32 and X64 Specific Functions
+//
+//
+// Byte packed structure for 16-bit Real Mode EFLAGS
+//
+typedef union {
+ struct {
+ UINT32 CF:1; // Carry Flag
+ UINT32 Reserved_0:1; // Reserved
+ UINT32 PF:1; // Parity Flag
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AF:1; // Auxiliary Carry Flag
+ UINT32 Reserved_2:1; // Reserved
+ UINT32 ZF:1; // Zero Flag
+ UINT32 SF:1; // Sign Flag
+ UINT32 TF:1; // Trap Flag
+ UINT32 IF:1; // Interrupt Enable Flag
+ UINT32 DF:1; // Direction Flag
+ UINT32 OF:1; // Overflow Flag
+ UINT32 IOPL:2; // I/O Privilege Level
+ UINT32 NT:1; // Nested Task
+ UINT32 Reserved_3:1; // Reserved
+ } Bits;
+ UINT16 Uint16;
+} IA32_FLAGS16;
+
+//
+// Byte packed structure for EFLAGS/RFLAGS
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 CF:1; // Carry Flag
+ UINT32 Reserved_0:1; // Reserved
+ UINT32 PF:1; // Parity Flag
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AF:1; // Auxiliary Carry Flag
+ UINT32 Reserved_2:1; // Reserved
+ UINT32 ZF:1; // Zero Flag
+ UINT32 SF:1; // Sign Flag
+ UINT32 TF:1; // Trap Flag
+ UINT32 IF:1; // Interrupt Enable Flag
+ UINT32 DF:1; // Direction Flag
+ UINT32 OF:1; // Overflow Flag
+ UINT32 IOPL:2; // I/O Privilege Level
+ UINT32 NT:1; // Nested Task
+ UINT32 Reserved_3:1; // Reserved
+ UINT32 RF:1; // Resume Flag
+ UINT32 VM:1; // Virtual 8086 Mode
+ UINT32 AC:1; // Alignment Check
+ UINT32 VIF:1; // Virtual Interrupt Flag
+ UINT32 VIP:1; // Virtual Interrupt Pending
+ UINT32 ID:1; // ID Flag
+ UINT32 Reserved_4:10; // Reserved
+ } Bits;
+ UINTN UintN;
+} IA32_EFLAGS32;
+
+//
+// Byte packed structure for Control Register 0 (CR0)
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 PE:1; // Protection Enable
+ UINT32 MP:1; // Monitor Coprocessor
+ UINT32 EM:1; // Emulation
+ UINT32 TS:1; // Task Switched
+ UINT32 ET:1; // Extension Type
+ UINT32 NE:1; // Numeric Error
+ UINT32 Reserved_0:10; // Reserved
+ UINT32 WP:1; // Write Protect
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AM:1; // Alignment Mask
+ UINT32 Reserved_2:10; // Reserved
+ UINT32 NW:1; // Mot Write-through
+ UINT32 CD:1; // Cache Disable
+ UINT32 PG:1; // Paging
+ } Bits;
+ UINTN UintN;
+} IA32_CR0;
+
+//
+// Byte packed structure for Control Register 4 (CR4)
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 VME:1; // Virtual-8086 Mode Extensions
+ UINT32 PVI:1; // Protected-Mode Virtual Interrupts
+ UINT32 TSD:1; // Time Stamp Disable
+ UINT32 DE:1; // Debugging Extensions
+ UINT32 PSE:1; // Page Size Extensions
+ UINT32 PAE:1; // Physical Address Extension
+ UINT32 MCE:1; // Machine Check Enable
+ UINT32 PGE:1; // Page Global Enable
+ UINT32 PCE:1; // Performance Monitoring Counter
+ // Enable
+ UINT32 OSFXSR:1; // Operating System Support for
+ // FXSAVE and FXRSTOR instructions
+ UINT32 OSXMMEXCPT:1; // Operating System Support for
+ // Unmasked SIMD Floating Point
+ // Exceptions
+ UINT32 Reserved_0:2; // Reserved
+ UINT32 VMXE:1; // VMX Enable
+ UINT32 Reserved_1:18; // Reseved
+ } Bits;
+ UINTN UintN;
+} IA32_CR4;
+
+//
+// Byte packed structure for an IDTR, GDTR, LDTR descriptor
+/// @bug How to make this structure byte-packed in a compiler independent way?
+//
+#pragma pack (1)
+typedef struct {
+ UINT16 Limit;
+ UINTN Base;
+} IA32_DESCRIPTOR;
+#pragma pack ()
+
+#define IA32_IDT_GATE_TYPE_TASK 0x85
+#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
+#define IA32_IDT_GATE_TYPE_TRAP_16 0x87
+#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
+#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
+
+//
+// Byte packed structure for an Interrupt Gate Descriptor
+//
+typedef union {
+ struct {
+ UINT32 OffsetLow:16; // Offset bits 15..0
+ UINT32 Selector:16; // Selector
+ UINT32 Reserved_0:8; // Reserved
+ UINT32 GateType:8; // Gate Type. See #defines above
+ UINT32 OffsetHigh:16; // Offset bits 31..16
+ } Bits;
+ UINT64 Uint64;
+} IA32_IDT_GATE_DESCRIPTOR;
+
+//
+// Byte packed structure for an FP/SSE/SSE2 context
+//
+typedef struct {
+ UINT8 Buffer[512];
+} IA32_FX_BUFFER;
+
+//
+// Structures for the 16-bit real mode thunks
+//
+typedef struct {
+ UINT32 Reserved1;
+ UINT32 Reserved2;
+ UINT32 Reserved3;
+ UINT32 Reserved4;
+ UINT8 BL;
+ UINT8 BH;
+ UINT16 Reserved5;
+ UINT8 DL;
+ UINT8 DH;
+ UINT16 Reserved6;
+ UINT8 CL;
+ UINT8 CH;
+ UINT16 Reserved7;
+ UINT8 AL;
+ UINT8 AH;
+ UINT16 Reserved8;
+} IA32_BYTE_REGS;
+
+typedef struct {
+ UINT16 DI;
+ UINT16 Reserved1;
+ UINT16 SI;
+ UINT16 Reserved2;
+ UINT16 BP;
+ UINT16 Reserved3;
+ UINT16 SP;
+ UINT16 Reserved4;
+ UINT16 BX;
+ UINT16 Reserved5;
+ UINT16 DX;
+ UINT16 Reserved6;
+ UINT16 CX;
+ UINT16 Reserved7;
+ UINT16 AX;
+ UINT16 Reserved8;
+} IA32_WORD_REGS;
+
+typedef struct {
+ UINT32 EDI;
+ UINT32 ESI;
+ UINT32 EBP;
+ UINT32 ESP;
+ UINT32 EBX;
+ UINT32 EDX;
+ UINT32 ECX;
+ UINT32 EAX;
+ UINT16 DS;
+ UINT16 ES;
+ UINT16 FS;
+ UINT16 GS;
+ IA32_EFLAGS32 EFLAGS;
+ UINT32 Eip;
+ UINT16 CS;
+ UINT16 SS;
+} IA32_DWORD_REGS;
+
+typedef union {
+ IA32_DWORD_REGS E;
+ IA32_WORD_REGS X;
+ IA32_BYTE_REGS H;
+} IA32_REGISTER_SET;
+
+//
+// Byte packed structure for an 16-bit real mode thunks
+//
+typedef struct {
+ IA32_REGISTER_SET *RealModeState;
+ VOID *RealModeBuffer;
+ UINT32 RealModeBufferSize;
+ UINT32 ThunkAttributes;
+} THUNK_CONTEXT;
+
+#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
+
+/**
+ Retrieves CPUID information.
+
+ Executes the CPUID instruction with EAX set to the value specified by Index.
+ This function always returns Index.
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit value to load into EAX prior to invoking the CPUID
+ instruction.
+ @param Eax Pointer to the 32-bit EAX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Edx Pointer to the 32-bit EDX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+
+ @return Index
+
+**/
+UINT32
+EFIAPI
+AsmCpuid (
+ IN UINT32 Index,
+ OUT UINT32 *Eax, OPTIONAL
+ OUT UINT32 *Ebx, OPTIONAL
+ OUT UINT32 *Ecx, OPTIONAL
+ OUT UINT32 *Edx OPTIONAL
+ );
+
+
+/**
+ Retrieves CPUID information using an extended leaf identifier.
+
+ Executes the CPUID instruction with EAX set to the value specified by Index
+ and ECX set to the value specified by SubIndex. This function always returns
+ Index. This function is only available on IA-32 and x64.
+
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
+
+ @param Index The 32-bit value to load into EAX prior to invoking the
+ CPUID instruction.
+ @param SubIndex The 32-bit value to load into ECX prior to invoking the
+ CPUID instruction.
+ @param Eax Pointer to the 32-bit EAX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+ @param Edx Pointer to the 32-bit EDX value returned by the CPUID
+ instruction. This is an optional parameter that may be
+ NULL.
+
+ @return Index
+
+**/
+UINT32
+EFIAPI
+AsmCpuidEx (
+ IN UINT32 Index,
+ IN UINT32 SubIndex,
+ OUT UINT32 *Eax, OPTIONAL
+ OUT UINT32 *Ebx, OPTIONAL
+ OUT UINT32 *Ecx, OPTIONAL
+ OUT UINT32 *Edx OPTIONAL
+ );
+
+
+/**
+ Returns the lower 32-bits of a Machine Specific Register(MSR).
+
+ Reads and returns the lower 32-bits of the MSR specified by Index.
+ No parameter checking is performed on Index, and some Index values may cause
+ CPU exceptions. The caller must either guarantee that Index is valid, or the
+ caller must set up exception handlers to catch the exceptions. This function
+ is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The lower 32 bits of the MSR identified by Index.
+
+**/
+UINT32
+EFIAPI
+AsmReadMsr32 (
+ IN UINT32 Index
+ );
+
+
+/**
+ Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).
+
+ Writes the 32-bit value specified by Value to the MSR specified by Index. The
+ upper 32-bits of the MSR write are set to zero. The 32-bit value written to
+ the MSR is returned. No parameter checking is performed on Index or Value,
+ and some of these may cause CPU exceptions. The caller must either guarantee
+ that Index and Value are valid, or the caller must establish proper exception
+ handlers. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 32-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+AsmWriteMsr32 (
+ IN UINT32 Index,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+
+/**
+ Returns a 64-bit Machine Specific Register(MSR).
+
+ Reads and returns the 64-bit MSR specified by Index. No parameter checking is
+ performed on Index, and some Index values may cause CPU exceptions. The
+ caller must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The value of the MSR identified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ );
+
+
+/**
+ Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
+ value.
+
+ Writes the 64-bit value specified by Value to the MSR specified by Index. The
+ 64-bit value written to the MSR is returned. No parameter checking is
+ performed on Index or Value, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and Value are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 64-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ );
+
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read from the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+
+/**
+ Reads the current value of the EFLAGS register.
+
+ Reads and returns the current value of the EFLAGS register. This function is
+ only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
+ 64-bit value on X64.
+
+ @return EFLAGS on IA-32 or RFLAGS on X64.
+
+**/
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ );
+
+
+/**
+ Reads the current value of the Control Register 0 (CR0).
+
+ Reads and returns the current value of CR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 0 (CR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of the Control Register 2 (CR2).
+
+ Reads and returns the current value of CR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 2 (CR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of the Control Register 3 (CR3).
+
+ Reads and returns the current value of CR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 3 (CR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of the Control Register 4 (CR4).
+
+ Reads and returns the current value of CR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 4 (CR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ );
+
+
+/**
+ Writes a value to Control Register 0 (CR0).
+
+ Writes and returns a new value to CR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr0 The value to write to CR0.
+
+ @return The value written to CR0.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Cr0
+ );
+
+
+/**
+ Writes a value to Control Register 2 (CR2).
+
+ Writes and returns a new value to CR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr2 The value to write to CR2.
+
+ @return The value written to CR2.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Cr2
+ );
+
+
+/**
+ Writes a value to Control Register 3 (CR3).
+
+ Writes and returns a new value to CR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr3 The value to write to CR3.
+
+ @return The value written to CR3.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Cr3
+ );
+
+
+/**
+ Writes a value to Control Register 4 (CR4).
+
+ Writes and returns a new value to CR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr4 The value to write to CR4.
+
+ @return The value written to CR4.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Cr4
+ );
+
+
+/**
+ Reads the current value of Debug Register 0 (DR0).
+
+ Reads and returns the current value of DR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 1 (DR1).
+
+ Reads and returns the current value of DR1. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 2 (DR2).
+
+ Reads and returns the current value of DR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 3 (DR3).
+
+ Reads and returns the current value of DR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 4 (DR4).
+
+ Reads and returns the current value of DR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 5 (DR5).
+
+ Reads and returns the current value of DR5. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 6 (DR6).
+
+ Reads and returns the current value of DR6. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Debug Register 7 (DR7).
+
+ Reads and returns the current value of DR7. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ );
+
+
+/**
+ Writes a value to Debug Register 0 (DR0).
+
+ Writes and returns a new value to DR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr0 The value to write to Dr0.
+
+ @return The value written to Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ UINTN Dr0
+ );
+
+
+/**
+ Writes a value to Debug Register 1 (DR1).
+
+ Writes and returns a new value to DR1. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr1 The value to write to Dr1.
+
+ @return The value written to Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ UINTN Dr1
+ );
+
+
+/**
+ Writes a value to Debug Register 2 (DR2).
+
+ Writes and returns a new value to DR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr2 The value to write to Dr2.
+
+ @return The value written to Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ UINTN Dr2
+ );
+
+
+/**
+ Writes a value to Debug Register 3 (DR3).
+
+ Writes and returns a new value to DR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr3 The value to write to Dr3.
+
+ @return The value written to Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ UINTN Dr3
+ );
+
+
+/**
+ Writes a value to Debug Register 4 (DR4).
+
+ Writes and returns a new value to DR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr4 The value to write to Dr4.
+
+ @return The value written to Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ UINTN Dr4
+ );
+
+
+/**
+ Writes a value to Debug Register 5 (DR5).
+
+ Writes and returns a new value to DR5. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr5 The value to write to Dr5.
+
+ @return The value written to Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ UINTN Dr5
+ );
+
+
+/**
+ Writes a value to Debug Register 6 (DR6).
+
+ Writes and returns a new value to DR6. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr6 The value to write to Dr6.
+
+ @return The value written to Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ UINTN Dr6
+ );
+
+
+/**
+ Writes a value to Debug Register 7 (DR7).
+
+ Writes and returns a new value to DR7. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr7 The value to write to Dr7.
+
+ @return The value written to Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ UINTN Dr7
+ );
+
+
+/**
+ Reads the current value of Code Segment Register (CS).
+
+ Reads and returns the current value of CS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of CS.
+
+**/
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Data Segment Register (DS).
+
+ Reads and returns the current value of DS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of DS.
+
+**/
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Extra Segment Register (ES).
+
+ Reads and returns the current value of ES. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of ES.
+
+**/
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of FS Data Segment Register (FS).
+
+ Reads and returns the current value of FS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of FS.
+
+**/
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of GS Data Segment Register (GS).
+
+ Reads and returns the current value of GS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of GS.
+
+**/
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Stack Segment Register (SS).
+
+ Reads and returns the current value of SS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of SS.
+
+**/
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ );
+
+
+/**
+ Reads the current value of Task Register (TR).
+
+ Reads and returns the current value of TR. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of TR.
+
+**/
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ );
+
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ );
+
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ );
+
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ );
+
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ );
+
+
+/**
+ Reads the current Local Descriptor Table Register(LDTR) selector.
+
+ Reads and returns the current 16-bit LDTR descriptor value. This function is
+ only available on IA-32 and X64.
+
+ @return The current selector of LDT.
+
+**/
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ );
+
+
+/**
+ Writes the current Local Descriptor Table Register (GDTR) selector.
+
+ Writes and the current LDTR descriptor specified by Ldtr. This function is
+ only available on IA-32 and X64.
+
+ @param Ldtr 16-bit LDTR selector value.
+
+**/
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ );
+
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ );
+
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #0 (MM0).
+
+ Reads and returns the current value of MM0. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM0.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #1 (MM1).
+
+ Reads and returns the current value of MM1. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM1.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #2 (MM2).
+
+ Reads and returns the current value of MM2. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM2.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #3 (MM3).
+
+ Reads and returns the current value of MM3. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM3.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #4 (MM4).
+
+ Reads and returns the current value of MM4. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM4.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #5 (MM5).
+
+ Reads and returns the current value of MM5. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM5.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #6 (MM6).
+
+ Reads and returns the current value of MM6. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM6.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ );
+
+
+/**
+ Reads the current value of 64-bit MMX Register #7 (MM7).
+
+ Reads and returns the current value of MM7. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM7.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #0 (MM0).
+
+ Writes the current value of MM0. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM0.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #1 (MM1).
+
+ Writes the current value of MM1. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM1.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #2 (MM2).
+
+ Writes the current value of MM2. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM2.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #3 (MM3).
+
+ Writes the current value of MM3. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM3.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm3 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #4 (MM4).
+
+ Writes the current value of MM4. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM4.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm4 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #5 (MM5).
+
+ Writes the current value of MM5. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM5.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm5 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #6 (MM6).
+
+ Writes the current value of MM6. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM6.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm6 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Writes the current value of 64-bit MMX Register #7 (MM7).
+
+ Writes the current value of MM7. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM7.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm7 (
+ IN UINT64 Value
+ );
+
+
+/**
+ Reads the current value of Time Stamp Counter (TSC).
+
+ Reads and returns the current value of TSC. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of TSC
+
+**/
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ );
+
+
+/**
+ Reads the current value of a Performance Counter (PMC).
+
+ Reads and returns the current value of performance counter specified by
+ Index. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit Performance Counter index to read.
+
+ @return The value of the PMC specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 Index
+ );
+
+
+/**
+ Sets up a monitor buffer that is used by AsmMwait().
+
+ Executes a MONITOR instruction with the register state specified by Eax, Ecx
+ and Edx. Returns Eax. This function is only available on IA-32 and X64.
+
+ @param Eax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+ @param Edx The value to load into EDX or RDX before executing the MONITOR
+ instruction.
+
+ @return Eax
+
+**/
+UINTN
+EFIAPI
+AsmMonitor (
+ IN UINTN Eax,
+ IN UINTN Ecx,
+ IN UINTN Edx
+ );
+
+
+/**
+ Executes an MWAIT instruction.
+
+ Executes an MWAIT instruction with the register state specified by Eax and
+ Ecx. Returns Eax. This function is only available on IA-32 and X64.
+
+ @param Eax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+
+ @return Eax
+
+**/
+UINTN
+EFIAPI
+AsmMwait (
+ IN UINTN Eax,
+ IN UINTN Ecx
+ );
+
+
+/**
+ Executes a WBINVD instruction.
+
+ Executes a WBINVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ );
+
+
+/**
+ Executes a INVD instruction.
+
+ Executes a INVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ );
+
+
+/**
+ Flushes a cache line from all the instruction and data caches within the
+ coherency domain of the CPU.
+
+ Flushed the cache line specified by LinearAddress, and returns LinearAddress.
+ This function is only available on IA-32 and X64.
+
+ @param LinearAddress The address of the cache line to flush. If the CPU is
+ in a physical addressing mode, then LinearAddress is a
+ physical address. If the CPU is in a virtual
+ addressing mode, then LinearAddress is a virtual
+ address.
+
+ @return LinearAddress
+**/
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ );
+
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ );
+
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ );
+
+
+//
+// 16-bit thunking services
+//
+
+/**
+ Retrieves the properties for 16-bit thunk functions.
+
+ Computes the size of the buffer and stack below 1MB required to use the
+ AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
+ buffer size is returned in RealModeBufferSize, and the stack size is returned
+ in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
+ then the actual minimum stack size is ExtraStackSize plus the maximum number
+ of bytes that need to be passed to the 16-bit real mode code.
+
+ If RealModeBufferSize is NULL, then ASSERT().
+ If ExtraStackSize is NULL, then ASSERT().
+
+ @param RealModeBufferSize A pointer to the size of the buffer below 1MB
+ required to use the 16-bit thunk functions.
+ @param ExtraStackSize A pointer to the extra size of stack below 1MB
+ that the 16-bit thunk functions require for
+ temporary storage in the transition to and from
+ 16-bit real mode.
+
+**/
+VOID
+EFIAPI
+AsmGetThunk16Properties (
+ OUT UINT32 *RealModeBufferSize,
+ OUT UINT32 *ExtraStackSize
+ );
+
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ );
+
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ );
+
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ );
+
+#else
+
+#endif
+
+#endif
+
--- /dev/null
+/** @file\r
+ Memory-only library functions with no library constructor/destructor\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: BaseMemoryLib.h\r
+\r
+**/\r
+\r
+#ifndef __BASE_MEMORY_LIB__\r
+#define __BASE_MEMORY_LIB__\r
+\r
+/**\r
+ Copies a source buffer to a destination buffer, and returns the destination buffer.\r
+\r
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns\r
+ DestinationBuffer. The implementation must be reentrant, and it must handle the case\r
+ where SourceBuffer overlaps DestinationBuffer.\r
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+ @param DestinationBuffer Pointer to the destination buffer of the memory copy.\r
+ @param SourceBuffer Pointer to the source buffer of the memory copy.\r
+ @param Length Number of bytes to copy from SourceBuffer to DestinationBuffer.\r
+\r
+ @return DestinationBuffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+CopyMem (\r
+ OUT VOID *DestinationBuffer,\r
+ IN CONST VOID *SourceBuffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Fills a target buffer with a byte value, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with Value, and returns Buffer.\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Memory to set.\r
+ @param Length Number of bytes to set.\r
+ @param Value Value of the set operation.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with the 16-bit value specified by\r
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length\r
+ bytes of Buffer.\r
+\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Buffer Pointer to the target buffer to fill.\r
+ @param Length Number of bytes in Buffer to fill.\r
+ @param Value Value with which to fill Length bytes of Buffer.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem16 (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with the 32-bit value specified by\r
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length\r
+ bytes of Buffer.\r
+\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Buffer Pointer to the target buffer to fill.\r
+ @param Length Number of bytes in Buffer to fill.\r
+ @param Value Value with which to fill Length bytes of Buffer.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem32 (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with the 64-bit value specified by\r
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length\r
+ bytes of Buffer.\r
+\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+ @param Buffer Pointer to the target buffer to fill.\r
+ @param Length Number of bytes in Buffer to fill.\r
+ @param Value Value with which to fill Length bytes of Buffer.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem64 (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Fills a target buffer with zeros, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to fill with zeros.\r
+ @param Length Number of bytes in Buffer to fill with zeros.\r
+\r
+ @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ZeroMem (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Compares the contents of two buffers.\r
+\r
+ This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.\r
+ If all Length bytes of the two buffers are identical, then 0 is returned. Otherwise, the\r
+ value returned is the first mismatched byte in SourceBuffer subtracted from the first\r
+ mismatched byte in DestinationBuffer.\r
+ If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().\r
+ If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+ @param DestinationBuffer Pointer to the destination buffer to compare.\r
+ @param SourceBuffer Pointer to the source buffer to compare.\r
+ @param Length Number of bytes to compare.\r
+\r
+ @return 0 All Length bytes of the two buffers are identical.\r
+ @retval Non-zero The first mismatched byte in SourceBuffer subtracted from the first\r
+ mismatched byte in DestinationBuffer.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+CompareMem (\r
+ IN CONST VOID *DestinationBuffer,\r
+ IN CONST VOID *SourceBuffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value\r
+ in the target buffer.\r
+\r
+ This function searches target the buffer specified by Buffer and Length from the lowest\r
+ address to the highest address for an 8-bit value that matches Value. If a match is found,\r
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,\r
+ then NULL is returned. If Length is 0, then NULL is returned.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to scan.\r
+ @param Length Number of bytes in Buffer to scan.\r
+ @param Value Value to search for in the target buffer.\r
+\r
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem8 (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value\r
+ in the target buffer.\r
+\r
+ This function searches target the buffer specified by Buffer and Length from the lowest\r
+ address to the highest address for a 16-bit value that matches Value. If a match is found,\r
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,\r
+ then NULL is returned. If Length is 0, then NULL is returned.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to scan.\r
+ @param Length Number of bytes in Buffer to scan.\r
+ @param Value Value to search for in the target buffer.\r
+\r
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem16 (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value\r
+ in the target buffer.\r
+\r
+ This function searches target the buffer specified by Buffer and Length from the lowest\r
+ address to the highest address for a 32-bit value that matches Value. If a match is found,\r
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,\r
+ then NULL is returned. If Length is 0, then NULL is returned.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to scan.\r
+ @param Length Number of bytes in Buffer to scan.\r
+ @param Value Value to search for in the target buffer.\r
+\r
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem32 (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value\r
+ in the target buffer.\r
+\r
+ This function searches target the buffer specified by Buffer and Length from the lowest\r
+ address to the highest address for a 64-bit value that matches Value. If a match is found,\r
+ then a pointer to the matching byte in the target buffer is returned. If no match is found,\r
+ then NULL is returned. If Length is 0, then NULL is returned.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to scan.\r
+ @param Length Number of bytes in Buffer to scan.\r
+ @param Value Value to search for in the target buffer.\r
+\r
+ @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem64 (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN UINT64 Value\r
+ );\r
+\r
+/**\r
+ Copies a source GUID to a destination GUID.\r
+\r
+ This function copies the contents of the 128-bit GUID specified by SourceGuid to\r
+ DestinationGuid, and returns DestinationGuid.\r
+ If DestinationGuid is NULL, then ASSERT().\r
+ If SourceGuid is NULL, then ASSERT().\r
+\r
+ @param DestinationGuid Pointer to the destination GUID.\r
+ @param SourceGuid Pointer to the source GUID.\r
+\r
+ @return DestinationGuid.\r
+\r
+**/\r
+GUID *\r
+EFIAPI\r
+CopyGuid (\r
+ OUT GUID *DestinationGuid,\r
+ IN CONST GUID *SourceGuid\r
+ );\r
+\r
+/**\r
+ Compares two GUIDs.\r
+\r
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE is returned.\r
+ If there are any bit differences in the two GUIDs, then FALSE is returned.\r
+ If Guid1 is NULL, then ASSERT().\r
+ If Guid2 is NULL, then ASSERT().\r
+\r
+ @param Guid1 A pointer to a 128 bit GUID.\r
+ @param Guid2 A pointer to a 128 bit GUID.\r
+\r
+ @retval TRUE Guid1 and Guid2 are identical.\r
+ @retval FALSE Guid1 and Guid2 are not identical.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+CompareGuid (\r
+ IN CONST GUID *Guid1,\r
+ IN CONST GUID *Guid2\r
+ );\r
+\r
+/**\r
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID\r
+ in the target buffer.\r
+\r
+ This function searches target the buffer specified by Buffer and Length from\r
+ the lowest address to the highest address at 128-bit increments for the 128-bit\r
+ GUID value that matches Guid. If a match is found, then a pointer to the matching\r
+ GUID in the target buffer is returned. If no match is found, then NULL is returned.\r
+ If Length is 0, then NULL is returned.\r
+ If Length > 0 and Buffer is NULL, then ASSERT().\r
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+ If Length is not aligned on a 128-bit boundary, then ASSERT().\r
+ If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to scan.\r
+ @param Length Number of bytes in Buffer to scan.\r
+ @param Guid Value to search for in the target buffer.\r
+\r
+ @return A pointer to the matching Guid in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanGuid (\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Length,\r
+ IN CONST GUID *Guid\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Cache Maintenance Functions\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: CacheMaintenanceLib.h\r
+\r
+**/\r
+\r
+#ifndef __CACHE_MAINTENANCE_LIB__\r
+#define __CACHE_MAINTENANCE_LIB__\r
+\r
+/**\r
+ Invalidates the entire instruction cache in cache coherency domain of the\r
+ calling CPU.\r
+\r
+ Invalidates the entire instruction cache in cache coherency domain of the\r
+ calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateInstructionCache (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Invalidates a range of instruction cache lines in the cache coherency domain\r
+ of the calling CPU.\r
+\r
+ Invalidates the instruction cache lines specified by Address and Length. If\r
+ Address is not aligned on a cache line boundary, then entire instruction\r
+ cache line containing Address is invalidated. If Address + Length is not\r
+ aligned on a cache line boundary, then the entire instruction cache line\r
+ containing Address + Length -1 is invalidated. This function may choose to\r
+ invalidate the entire instruction cache if that is more efficient than\r
+ invalidating the specified range. If Length is 0, the no instruction cache\r
+ lines are invalidated. Address is returned.\r
+\r
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+ @param Address The base address of the instruction cache lines to\r
+ invalidate. If the CPU is in a physical addressing mode, then\r
+ Address is a physical address. If the CPU is in a virtual\r
+ addressing mode, then Address is a virtual address.\r
+\r
+ @param Length The number of bytes to invalidate from the instruction cache.\r
+\r
+ @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateInstructionCacheRange (\r
+ IN VOID *Address,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Writes Back and Invalidates the entire data cache in cache coherency domain\r
+ of the calling CPU.\r
+\r
+ Writes Back and Invalidates the entire data cache in cache coherency domain\r
+ of the calling CPU. This function guarantees that all dirty cache lines are\r
+ written back to system memory, and also invalidates all the data cache lines\r
+ in the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackInvalidateDataCache (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Writes Back and Invalidates a range of data cache lines in the cache\r
+ coherency domain of the calling CPU.\r
+\r
+ Writes Back and Invalidate the data cache lines specified by Address and\r
+ Length. If Address is not aligned on a cache line boundary, then entire data\r
+ cache line containing Address is written back and invalidated. If Address +\r
+ Length is not aligned on a cache line boundary, then the entire data cache\r
+ line containing Address + Length -1 is written back and invalidated. This\r
+ function may choose to write back and invalidate the entire data cache if\r
+ that is more efficient than writing back and invalidating the specified\r
+ range. If Length is 0, the no data cache lines are written back and\r
+ invalidated. Address is returned.\r
+\r
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+ @param Address The base address of the data cache lines to write back and\r
+ invalidate. If the CPU is in a physical addressing mode, then\r
+ Address is a physical address. If the CPU is in a virtual\r
+ addressing mode, then Address is a virtual address.\r
+ @param Length The number of bytes to write back and invalidate from the\r
+ data cache.\r
+\r
+ @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackInvalidateDataCacheRange (\r
+ IN VOID *Address,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Writes Back the entire data cache in cache coherency domain of the calling\r
+ CPU.\r
+\r
+ Writes Back the entire data cache in cache coherency domain of the calling\r
+ CPU. This function guarantees that all dirty cache lines are written back to\r
+ system memory. This function may also invalidate all the data cache lines in\r
+ the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackDataCache (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Writes Back a range of data cache lines in the cache coherency domain of the\r
+ calling CPU.\r
+\r
+ Writes Back the data cache lines specified by Address and Length. If Address\r
+ is not aligned on a cache line boundary, then entire data cache line\r
+ containing Address is written back. If Address + Length is not aligned on a\r
+ cache line boundary, then the entire data cache line containing Address +\r
+ Length -1 is written back. This function may choose to write back the entire\r
+ data cache if that is more efficient than writing back the specified range.\r
+ If Length is 0, the no data cache lines are written back. This function may\r
+ also invalidate all the data cache lines in the specified range of the cache\r
+ coherency domain of the calling CPU. Address is returned.\r
+\r
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+ @param Address The base address of the data cache lines to write back. If\r
+ the CPU is in a physical addressing mode, then Address is a\r
+ physical address. If the CPU is in a virtual addressing\r
+ mode, then Address is a virtual address.\r
+ @param Length The number of bytes to write back from the data cache.\r
+\r
+ @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackDataCacheRange (\r
+ IN VOID *Address,\r
+ IN UINTN Length\r
+ );\r
+\r
+/**\r
+ Invalidates the entire data cache in cache coherency domain of the calling\r
+ CPU.\r
+\r
+ Invalidates the entire data cache in cache coherency domain of the calling\r
+ CPU. This function must be used with care because dirty cache lines are not\r
+ written back to system memory. It is typically used for cache diagnostics. If\r
+ the CPU does not support invalidation of the entire data cache, then a write\r
+ back and invalidate operation should be performed on the entire data cache.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateDataCache (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Invalidates a range of data cache lines in the cache coherency domain of the\r
+ calling CPU.\r
+\r
+ Invalidates the data cache lines specified by Address and Length. If Address\r
+ is not aligned on a cache line boundary, then entire data cache line\r
+ containing Address is invalidated. If Address + Length is not aligned on a\r
+ cache line boundary, then the entire data cache line containing Address +\r
+ Length -1 is invalidated. This function must never invalidate any cache lines\r
+ outside the specified range. If Length is 0, the no data cache lines are\r
+ invalidated. Address is returned. This function must be used with care\r
+ because dirty cache lines are not written back to system memory. It is\r
+ typically used for cache diagnostics. If the CPU does not support\r
+ invalidation of a data cache range, then a write back and invalidate\r
+ operation should be performed on the data cache range.\r
+\r
+ If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+ @param Address The base address of the data cache lines to invalidate. If\r
+ the CPU is in a physical addressing mode, then Address is a\r
+ physical address. If the CPU is in a virtual addressing mode,\r
+ then Address is a virtual address.\r
+ @param Length The number of bytes to invalidate from the data cache.\r
+\r
+ @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateDataCacheRange (\r
+ IN VOID *Address,\r
+ IN UINTN Length\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Library that provides processor specific library services\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: CpuLib.h\r
+\r
+**/\r
+\r
+#ifndef __CPU_LIB_H__\r
+#define __CPU_LIB_H__\r
+\r
+#endif
\ No newline at end of file
--- /dev/null
+/** @file\r
+ Public include file for the Debug Library\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef __DEBUG_LIB_H__\r
+#define __DEBUG_LIB_H__\r
+\r
+//\r
+// Declare bits for PcdDebugPropertyMask\r
+//\r
+#define DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED 0x01\r
+#define DEBUG_PROPERTY_DEBUG_PRINT_ENABLED 0x02\r
+#define DEBUG_PROPERTY_DEBUG_CODE_ENABLED 0x04\r
+#define DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED 0x08\r
+#define DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED 0x10\r
+#define DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED 0x20\r
+\r
+//\r
+// Declare bits for PcdDebugPrintErrorLevel and the ErrorLevel parameter of DebugPrint()\r
+//\r
+#define DEBUG_INIT 0x00000001 // Initialization\r
+#define DEBUG_WARN 0x00000002 // Warnings\r
+#define DEBUG_LOAD 0x00000004 // Load events\r
+#define DEBUG_FS 0x00000008 // EFI File system\r
+#define DEBUG_POOL 0x00000010 // Alloc & Free's\r
+#define DEBUG_PAGE 0x00000020 // Alloc & Free's\r
+#define DEBUG_INFO 0x00000040 // Verbose\r
+#define DEBUG_VARIABLE 0x00000100 // Variable\r
+#define DEBUG_BM 0x00000400 // Boot Manager\r
+#define DEBUG_BLKIO 0x00001000 // BlkIo Driver\r
+#define DEBUG_NET 0x00004000 // SNI Driver\r
+#define DEBUG_UNDI 0x00010000 // UNDI Driver\r
+#define DEBUG_LOADFILE 0x00020000 // UNDI Driver\r
+#define DEBUG_EVENT 0x00080000 // Event messages\r
+#define DEBUG_ERROR 0x80000000 // Error\r
+\r
+//\r
+// Aliases of debug message mask bits\r
+//\r
+#define EFI_D_INIT DEBUG_INIT\r
+#define EFI_D_WARN DEBUG_WARN\r
+#define EFI_D_LOAD DEBUG_LOAD\r
+#define EFI_D_FS DEBUG_FS\r
+#define EFI_D_POOL DEBUG_POOL\r
+#define EFI_D_PAGE DEBUG_PAGE\r
+#define EFI_D_INFO DEBUG_INFO\r
+#define EFI_D_VARIABLE DEBUG_VARIABLE\r
+#define EFI_D_BM DEBUG_BM\r
+#define EFI_D_BLKIO DEBUG_BLKIO\r
+#define EFI_D_NET DEBUG_NET\r
+#define EFI_D_UNDI DEBUG_UNDI\r
+#define EFI_D_LOADFILE DEBUG_LOADFILE\r
+#define EFI_D_EVENT DEBUG_EVENT\r
+#define EFI_D_ERROR DEBUG_ERROR\r
+\r
+/**\r
+\r
+ Prints a debug message to the debug output device if the specified error level is enabled.\r
+\r
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print \r
+ the message specified by Format and the associated variable argument list to \r
+ the debug output device.\r
+\r
+ If Format is NULL, then ASSERT().\r
+\r
+ @param ErrorLevel The error level of the debug message.\r
+ @param Format Format string for the debug message to print.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugPrint (\r
+ IN UINTN ErrorLevel,\r
+ IN CONST CHAR8 *Format,\r
+ ...\r
+ );\r
+\r
+\r
+/**\r
+\r
+ Prints an assert message containing a filename, line number, and description. \r
+ This may be followed by a breakpoint or a dead loop.\r
+\r
+ Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n"\r
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of \r
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if \r
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then \r
+ CpuDeadLoop() is called. If neither of these bits are set, then this function \r
+ returns immediately after the message is printed to the debug output device.\r
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while\r
+ processing another DebugAssert(), then DebugAssert() must return immediately.\r
+\r
+ If FileName is NULL, then a <FileName> string of ?NULL) Filename?is printed.\r
+\r
+ If Description is NULL, then a <Description> string of ?NULL) Description?is printed.\r
+\r
+ @param FileName Pointer to the name of the source file that generated the assert condition.\r
+ @param LineNumber The line number in the source file that generated the assert condition\r
+ @param Description Pointer to the description of the assert condition.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugAssert (\r
+ IN CONST CHAR8 *FileName,\r
+ IN UINTN LineNumber,\r
+ IN CONST CHAR8 *Description\r
+ );\r
+\r
+\r
+/**\r
+\r
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.\r
+\r
+ This function fills Length bytes of Buffer with the value specified by \r
+ PcdDebugClearMemoryValue, and returns Buffer.\r
+\r
+ If Buffer is NULL, then ASSERT().\r
+\r
+ If Length is greater than (MAX_ADDRESS ?Buffer + 1), then ASSERT(). \r
+\r
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.\r
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue. \r
+\r
+ @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+DebugClearMemory (\r
+ OUT VOID *Buffer,\r
+ IN UINTN Length\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ Returns TRUE if ASSERT() macros are enabled.\r
+\r
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of \r
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.\r
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugAssertEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ Returns TRUE if DEBUG()macros are enabled.\r
+\r
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of \r
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.\r
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugPrintEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ Returns TRUE if DEBUG_CODE()macros are enabled.\r
+\r
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of \r
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.\r
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugCodeEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.\r
+\r
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of \r
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.\r
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugClearMemoryEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ Internal worker macro that calls DebugAssert().\r
+\r
+ This macro calls DebugAssert() passing in the filename, line number, and \r
+ expression that evailated to FALSE.\r
+\r
+ @param Expression Boolean expression that evailated to FALSE\r
+\r
+**/\r
+#define _ASSERT(Expression) DebugAssert (__FILE__, __LINE__, #Expression)\r
+\r
+\r
+/**\r
+ \r
+ Internal worker macro that calls DebugPrint().\r
+\r
+ This macro calls DebugPrint() passing in the debug error level, a format \r
+ string, and a variable argument list.\r
+\r
+ @param Expression Expression containing an error level, a format string, \r
+ and a variable argument list based on the format string.\r
+\r
+**/\r
+#define _DEBUG(Expression) DebugPrint Expression\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugAssert() if a expression evaluates to FALSE.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro evaluates the Boolean expression specified by Expression. If \r
+ Expression evaluates to FALSE, then DebugAssert() is called passing in the \r
+ source filename, source line number, and Expression.\r
+\r
+ @param Expression Boolean expression\r
+\r
+**/\r
+#define ASSERT(Expression) \\r
+ do { \\r
+ if (DebugAssertEnabled ()) { \\r
+ if (!(Expression)) { \\r
+ _ASSERT (Expression); \\r
+ } \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugPrint().\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro passes Expression to DebugPrint().\r
+\r
+ @param Expression Expression containing an error level, a format string, \r
+ and a variable argument list based on the format string.\r
+ \r
+\r
+**/\r
+#define DEBUG(Expression) \\r
+ do { \\r
+ if (DebugPrintEnabled ()) { \\r
+ _DEBUG (Expression); \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugAssert() if an EFI_STATUS evaluates to an error code.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro evaluates the EFI_STATUS value specified by StatusParameter. \r
+ If StatusParameter is an error code, then DebugAssert() is called passing in \r
+ the source filename, source line number, and StatusParameter.\r
+\r
+ @param StatusParameter EFI_STATUS value to evaluate.\r
+\r
+**/\r
+#define ASSERT_EFI_ERROR(StatusParameter) \\r
+ do { \\r
+ if (DebugAssertEnabled ()) { \\r
+ if (EFI_ERROR (StatusParameter)) { \\r
+ DEBUG ((EFI_D_ERROR, "\nASSERT_EFI_ERROR (Status = %r)\n", StatusParameter)); \\r
+ _ASSERT (!EFI_ERROR (StatusParameter)); \\r
+ } \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugAssert() if a protocol is already installed in the \r
+ handle database.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear, \r
+ then return.\r
+\r
+ If Handle is NULL, then a check is made to see if the protocol specified by Guid \r
+ is present on any handle in the handle database. If Handle is not NULL, then \r
+ a check is made to see if the protocol specified by Guid is present on the \r
+ handle specified by Handle. If the check finds the protocol, then DebugAssert() \r
+ is called passing in the source filename, source line number, and Guid.\r
+\r
+ If Guid is NULL, then ASSERT().\r
+\r
+ @param Handle The handle to check for the protocol. This is an optional \r
+ parameter that may be NULL. If it is NULL, then the entire \r
+ handle database is searched.\r
+\r
+ @param Guid Pointer to a protocol GUID.\r
+\r
+**/\r
+#define ASSERT_PROTOCOL_ALREADY_INSTALLED(Handle, Guid) \\r
+ do { \\r
+ if (DebugAssertEnabled ()) { \\r
+ VOID *Instance; \\r
+ ASSERT (Guid != NULL); \\r
+ if (Handle == NULL) { \\r
+ if (!EFI_ERROR (gBS->LocateProtocol ((EFI_GUID *)Guid, NULL, &Instance))) { \\r
+ _ASSERT (Guid already installed in database); \\r
+ } \\r
+ } else { \\r
+ if (!EFI_ERROR (gBS->HandleProtocol (Handle, (EFI_GUID *)Guid, &Instance))) { \\r
+ _ASSERT (Guid already installed on Handle); \\r
+ } \\r
+ } \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+ Macro that marks the beginning of debug source code.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro marks the beginning of source code that is included in a module.\r
+ Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END() \r
+ are not included in a module.\r
+\r
+**/\r
+#define DEBUG_CODE_BEGIN() do { if (DebugCodeEnabled ()) { UINT8 __DebugCodeLocal\r
+\r
+\r
+/**\r
+ \r
+ Macro that marks the end of debug source code.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro marks the end of source code that is included in a module. \r
+ Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END() \r
+ are not included in a module.\r
+\r
+**/\r
+#define DEBUG_CODE_END() __DebugCodeLocal = 0; __DebugCodeLocal++; } } while (FALSE)\r
+\r
+\r
+/**\r
+ \r
+ Macro that declares a section of debug source code.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set, \r
+ then the source code specified by Expression is included in a module. \r
+ Otherwise, the source specified by Expression is not included in a module.\r
+\r
+**/\r
+#define DEBUG_CODE(Expression) \\r
+ DEBUG_CODE_BEGIN (); \\r
+ Expression \\r
+ DEBUG_CODE_END ()\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugClearMemory() to clear a buffer to a default value.\r
+\r
+ If the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro calls DebugClearMemory() passing in Address and Length.\r
+\r
+ @param Address Pointer to a buffer.\r
+ @param Length The number of bytes in the buffer to set.\r
+\r
+**/\r
+#define DEBUG_CLEAR_MEMORY(Address, Length) \\r
+ do { \\r
+ if (DebugClearMemoryEnabled ()) { \\r
+ DebugClearMemory (Address, Length); \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+\r
+ Macro that calls DebugAssert() if the containing record does not have a \r
+ matching signature. If the signatures matches, then a pointer to the data \r
+ structure that contains a specified field of that data structure is returned. \r
+ This is a light weight method hide information by placing a public data \r
+ structure inside a larger private data structure and using a pointer to the \r
+ public data structure to retrieve a pointer to the private data structure.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear, \r
+ then this macro computes the offset, in bytes, of field specified by Field \r
+ from the beginning of the data structure specified by TYPE. This offset is \r
+ subtracted from Record, and is used to return a pointer to a data structure \r
+ of the type specified by TYPE.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro computes the offset, in bytes, of field specified by Field from \r
+ the beginning of the data structure specified by TYPE. This offset is \r
+ subtracted from Record, and is used to compute a pointer to a data structure of \r
+ the type specified by TYPE. The Signature field of the data structure specified \r
+ by TYPE is compared to TestSignature. If the signatures match, then a pointer \r
+ to the pointer to a data structure of the type specified by TYPE is returned. \r
+ If the signatures do not match, then DebugAssert() is called with a description \r
+ of "CR has a bad signature" and Record is returned. \r
+\r
+ If the data type specified by TYPE does not contain the field specified by Field, \r
+ then the module will not compile.\r
+\r
+ If TYPE does not contain a field called Signature, then the module will not \r
+ compile.\r
+\r
+ @param Record Pointer to the field specified by Field within a data \r
+ structure of type TYPE.\r
+\r
+ @param TYPE The name of the data structure type to return This \r
+ data structure must contain the field specified by Field. \r
+\r
+ @param Field The name of the field in the data structure specified \r
+ by TYPE to which Record points.\r
+\r
+ @param TestSignature The 32-bit signature value to match.\r
+\r
+**/\r
+#define CR(Record, TYPE, Field, TestSignature) \\r
+ (DebugAssertEnabled () && (_CR (Record, TYPE, Field)->Signature != TestSignature)) ? \\r
+ (TYPE *) (_ASSERT (CR has Bad Signature), Record) : \\r
+ _CR (Record, TYPE, Field)\r
+ \r
+#endif\r
--- /dev/null
+/** @file\r
+ Entry point to a DXE Boot Services Driver\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: DevicePathLib.h\r
+\r
+**/\r
+\r
+#ifndef __DEVICE_PATH_LIB_H__\r
+#define __DEVICE_PATH_LIB_H__\r
+\r
+/**\r
+ Returns the size of a device path in bytes.\r
+\r
+ This function returns the size, in bytes, of the device path data structure specified by\r
+ DevicePath including the end of device path node. If DevicePath is NULL, then 0 is returned.\r
+\r
+ @param DevicePath A pointer to a device path data structure.\r
+\r
+ @return The size of a device path in bytes.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetDevicePathSize (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath\r
+ );\r
+\r
+/**\r
+ Creates a new device path by appending a second device path to a first device path.\r
+\r
+ This function allocates space for a new copy of the device path specified by DevicePath. If\r
+ DevicePath is NULL, then NULL is returned. If the memory is successfully allocated, then the\r
+ contents of DevicePath are copied to the newly allocated buffer, and a pointer to that buffer\r
+ is returned. Otherwise, NULL is returned. \r
+ \r
+ @param DevicePath A pointer to a device path data structure.\r
+\r
+ @return A pointer to the duplicated device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+DuplicateDevicePath (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath\r
+ );\r
+\r
+/**\r
+ Creates a new device path by appending a second device path to a first device path.\r
+\r
+ This function creates a new device path by appending a copy of SecondDevicePath to a copy of\r
+ FirstDevicePath in a newly allocated buffer. Only the end-of-device-path device node from\r
+ SecondDevicePath is retained. The newly created device path is returned. \r
+ If FirstDevicePath is NULL, then it is ignored, and a duplicate of SecondDevicePath is returned. \r
+ If SecondDevicePath is NULL, then it is ignored, and a duplicate of FirstDevicePath is returned. \r
+ If both FirstDevicePath and SecondDevicePath are NULL, then NULL is returned. \r
+ If there is not enough memory for the newly allocated buffer, then NULL is returned.\r
+ The memory for the new device path is allocated from EFI boot services memory. It is the\r
+ responsibility of the caller to free the memory allocated.\r
+\r
+ @param FirstDevicePath A pointer to a device path data structure.\r
+ @param SecondDevicePath A pointer to a device path data structure.\r
+\r
+ @return A pointer to the new device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+AppendDevicePath (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath, OPTIONAL\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath OPTIONAL\r
+ );\r
+\r
+/**\r
+ Creates a new path by appending the device node to the device path.\r
+\r
+ This function creates a new device path by appending a copy of the device node specified by\r
+ DevicePathNode to a copy of the device path specified by DevicePath in an allocated buffer.\r
+ The end-of-device-path device node is moved after the end of the appended device node.\r
+ If DevicePath is NULL, then NULL is returned.\r
+ If DevicePathNode is NULL, then NULL is returned.\r
+ If there is not enough memory to allocate space for the new device path, then NULL is returned. \r
+ The memory is allocated from EFI boot services memory. It is the responsibility of the caller to\r
+ free the memory allocated.\r
+\r
+ @param DevicePath A pointer to a device path data structure.\r
+ @param DevicePathNode A pointer to a single device path node.\r
+\r
+ @return A pointer to the new device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+AppendDevicePathNode (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath, OPTIONAL\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePathNode OPTIONAL\r
+ );\r
+\r
+/**\r
+ Creates a new device path by appending the specified device path instance to the specified device\r
+ path.\r
+ \r
+ This function creates a new device path by appending a copy of the device path instance specified\r
+ by DevicePathInstance to a copy of the device path secified by DevicePath in a allocated buffer.\r
+ The end-of-device-path device node is moved after the end of the appended device path instance\r
+ and a new end-of-device-path-instance node is inserted between. \r
+ If DevicePath is NULL, then a copy if DevicePathInstance is returned.\r
+ If DevicePathInstance is NULL, then NULL is returned.\r
+ If there is not enough memory to allocate space for the new device path, then NULL is returned. \r
+ The memory is allocated from EFI boot services memory. It is the responsibility of the caller to\r
+ free the memory allocated.\r
+ \r
+ @param DevicePath A pointer to a device path data structure.\r
+ @param DevicePathInstance A pointer to a device path instance.\r
+\r
+ @return A pointer to the new device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+AppendDevicePathInstance (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath, OPTIONAL\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePathInstance OPTIONAL\r
+ );\r
+\r
+/**\r
+ Creates a copy of the current device path instance and returns a pointer to the next device path\r
+ instance.\r
+\r
+ This function creates a copy of the current device path instance. It also updates DevicePath to\r
+ point to the next device path instance in the device path (or NULL if no more) and updates Size\r
+ to hold the size of the device path instance copy.\r
+ If DevicePath is NULL, then NULL is returned.\r
+ If there is not enough memory to allocate space for the new device path, then NULL is returned. \r
+ The memory is allocated from EFI boot services memory. It is the responsibility of the caller to\r
+ free the memory allocated.\r
+ If Size is NULL, then ASSERT().\r
+ \r
+ @param DevicePath On input, this holds the pointer to the current device path\r
+ instance. On output, this holds the pointer to the next device\r
+ path instance or NULL if there are no more device path\r
+ instances in the device path pointer to a device path data\r
+ structure.\r
+ @param Size On output, this holds the size of the device path instance, in\r
+ bytes or zero, if DevicePath is NULL.\r
+\r
+ @return A pointer to the current device path instance.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+GetNextDevicePathInstance (\r
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,\r
+ OUT UINTN *Size\r
+ );\r
+\r
+/**\r
+ Creates a copy of the current device path instance and returns a pointer to the next device path\r
+ instance.\r
+\r
+ This function creates a new device node in a newly allocated buffer of size NodeLength and\r
+ initializes the device path node header with NodeType and NodeSubType. The new device path node\r
+ is returned.\r
+ If NodeLength is smaller than a device path header, then NULL is returned. \r
+ If there is not enough memory to allocate space for the new device path, then NULL is returned. \r
+ The memory is allocated from EFI boot services memory. It is the responsibility of the caller to\r
+ free the memory allocated.\r
+\r
+ @param NodeType The device node type for the new device node.\r
+ @param NodeSubType The device node sub-type for the new device node.\r
+ @param NodeLength The length of the new device node.\r
+\r
+ @return The new device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+CreateDeviceNode (\r
+ IN UINT8 NodeType,\r
+ IN UINT8 NodeSubType,\r
+ IN UINT16 NodeLength\r
+ );\r
+\r
+/**\r
+ Determines if a device path is single or multi-instance.\r
+\r
+ This function returns TRUE if the device path specified by DevicePath is multi-instance.\r
+ Otherwise, FALSE is returned. If DevicePath is NULL, then FALSE is returned.\r
+\r
+ @param DevicePath A pointer to a device path data structure.\r
+\r
+ @retval TRUE DevicePath is multi-instance.\r
+ @retval FALSE DevicePath is not multi-instance or DevicePath is NULL.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsDevicePathMultiInstance (\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath\r
+ );\r
+\r
+/**\r
+ Retrieves the device path protocol from a handle.\r
+\r
+ This function returns the device path protocol from the handle specified by Handle. If Handle is\r
+ NULL or Handle does not contain a device path protocol, then NULL is returned.\r
+ \r
+ @param Handle The handle from which to retrieve the device path protocol.\r
+\r
+ @return The device path protocol from the handle specified by Handle.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+DevicePathFromHandle (\r
+ IN EFI_HANDLE Handle\r
+ );\r
+\r
+/**\r
+ Allocates a device path for a file and appends it to an existing device path.\r
+\r
+ If Device is a valid device handle that contains a device path protocol, then a device path for\r
+ the file specified by FileName is allocated and appended to the device path associated with the\r
+ handle Device. The allocated device path is returned. If Device is NULL or Device is a handle\r
+ that does not support the device path protocol, then a device path containing a single device\r
+ path node for the file specified by FileName is allocated and returned.\r
+ If FileName is NULL, then ASSERT().\r
+\r
+ @param Device A pointer to a device handle. This parameter is optional and\r
+ may be NULL.\r
+ @param FileName A pointer to a Null-terminated Unicode string.\r
+\r
+ @return The allocated device path.\r
+\r
+**/\r
+EFI_DEVICE_PATH_PROTOCOL *\r
+EFIAPI\r
+FileDevicePath (\r
+ IN EFI_HANDLE Device, OPTIONAL\r
+ IN CONST CHAR16 *FileName\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Entry point to the DXE Core\r
+\r
+ Copyright (c) 2006, Intel Corporation<BR>\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __MODULE_ENTRY_POINT_H__\r
+#define __MODULE_ENTRY_POINT_H__\r
+\r
+//\r
+// Declare the cache of copy of HobList. \r
+// \r
+extern VOID *gHobList;\r
+\r
+\r
+/**\r
+ Enrty point to DXE core.\r
+\r
+ @param HobStart Pointer of HobList.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN VOID *HobStart\r
+ );\r
+\r
+\r
+/**\r
+ Wrapper of enrty point to DXE CORE.\r
+\r
+ @param HobStart Pointer of HobList.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiMain (\r
+ IN VOID *HobStart\r
+ );\r
+\r
+\r
+/**\r
+ Call constructs for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Call destructors for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryDestructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param HobStart Pointer to HobList.\r
+ \r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN VOID *HobStart\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Library that provides a global pointer to the DXE Services Table\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: DxeServicesTableLib.h\r
+\r
+**/\r
+\r
+#ifndef __DXE_SERVICES_TABLE_LIB_H__\r
+#define __DXE_SERVICES_TABLE_LIB_H__\r
+\r
+//\r
+// Cache copy of the DXE Services Table\r
+//\r
+extern EFI_DXE_SERVICES *gDS;\r
+\r
+#endif\r
+\r
--- /dev/null
+/** @file\r
+ Entry point to a DXE SMM Driver\r
+\r
+Copyright (c) 2006, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __MODULE_ENTRY_POINT_H__\r
+#define __MODULE_ENTRY_POINT_H__\r
+\r
+//\r
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented \r
+//\r
+extern const UINT32 _gUefiDriverRevision;\r
+\r
+//\r
+// Declare the number of entry points in the image. \r
+//\r
+extern const UINT8 _gDriverEntryPointCount;\r
+\r
+//\r
+// Declare the number of unload handler in the image. \r
+//\r
+extern const UINT8 _gDriverUnloadImageCount;\r
+\r
+/**\r
+ Enrty point to DXE SMM Driver.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Enrty point wrapper of DXE SMM Driver.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiMain (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Computes the cummulative return status for the driver entry point and perform\r
+ a long jump back into DriverEntryPoint().\r
+\r
+ @param Status Status returned by the driver that is exiting.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ExitDriver (\r
+ IN EFI_STATUS Status\r
+ );\r
+\r
+/**\r
+ Call constructs for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Call destructors for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryDestructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @return Status returned by entry points of drivers. \r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Call the unload handlers for all the modules. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ \r
+ @return Status returned by unload handlers of drivers.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleUnloadList (\r
+ IN EFI_HANDLE ImageHandle\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ EdkFvbServiceLib.h\r
+\r
+Abstract:\r
+\r
+--*/\r
+#ifndef __EDK_FVB_SERVICE_LIB_H__\r
+#define __EDK_FVB_SERVICE_LIB_H__\r
+\r
+EFI_STATUS\r
+EfiFvbReadBlock (\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Reads specified number of bytes into a buffer from the specified block\r
+\r
+Arguments:\r
+ Instance - The FV instance to be read from\r
+ Lba - The logical block address to be read from\r
+ Offset - Offset into the block at which to begin reading\r
+ NumBytes - Pointer that on input contains the total size of\r
+ the buffer. On output, it contains the total number\r
+ of bytes read\r
+ Buffer - Pointer to a caller allocated buffer that will be\r
+ used to hold the data read\r
+\r
+Returns: \r
+\r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbWriteBlock (\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Offset,\r
+ IN OUT UINTN *NumBytes,\r
+ IN UINT8 *Buffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Writes specified number of bytes from the input buffer to the block\r
+\r
+Arguments:\r
+ Instance - The FV instance to be written to\r
+ Lba - The starting logical block index to write to\r
+ Offset - Offset into the block at which to begin writing\r
+ NumBytes - Pointer that on input contains the total size of\r
+ the buffer. On output, it contains the total number\r
+ of bytes actually written\r
+ Buffer - Pointer to a caller allocated buffer that contains\r
+ the source for the write\r
+\r
+Returns: \r
+\r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbEraseBlock (\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Erases and initializes a firmware volume block\r
+\r
+Arguments:\r
+ Instance - The FV instance to be erased\r
+ Lba - The logical block index to be erased\r
+ \r
+Returns: \r
+\r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbGetVolumeAttributes (\r
+ IN UINTN Instance,\r
+ OUT EFI_FVB_ATTRIBUTES *Attributes\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Retrieves attributes, insures positive polarity of attribute bits, returns\r
+ resulting attributes in output parameter\r
+\r
+Arguments:\r
+ Instance - The FV instance whose attributes is going to be \r
+ returned\r
+ Attributes - Output buffer which contains attributes\r
+\r
+Returns: \r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbSetVolumeAttributes (\r
+ IN UINTN Instance,\r
+ IN EFI_FVB_ATTRIBUTES Attributes\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Modifies the current settings of the firmware volume according to the \r
+ input parameter, and returns the new setting of the volume\r
+\r
+Arguments:\r
+ Instance - The FV instance whose attributes is going to be \r
+ modified\r
+ Attributes - On input, it is a pointer to EFI_FVB_ATTRIBUTES \r
+ containing the desired firmware volume settings.\r
+ On successful return, it contains the new settings\r
+ of the firmware volume\r
+\r
+Returns: \r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbGetPhysicalAddress (\r
+ IN UINTN Instance,\r
+ OUT EFI_PHYSICAL_ADDRESS *BaseAddress\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Retrieves the physical address of a memory mapped FV\r
+\r
+Arguments:\r
+ Instance - The FV instance whose base address is going to be\r
+ returned\r
+ BaseAddress - Pointer to a caller allocated EFI_PHYSICAL_ADDRESS \r
+ that on successful return, contains the base address\r
+ of the firmware volume. \r
+\r
+Returns: \r
+\r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbGetBlockSize (\r
+ IN UINTN Instance,\r
+ IN EFI_LBA Lba,\r
+ OUT UINTN *BlockSize,\r
+ OUT UINTN *NumOfBlocks\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Retrieve the size of a logical block\r
+\r
+Arguments:\r
+ Instance - The FV instance whose block size is going to be\r
+ returned\r
+ Lba - Indicates which block to return the size for.\r
+ BlockSize - A pointer to a caller allocated UINTN in which\r
+ the size of the block is returned\r
+ NumOfBlocks - a pointer to a caller allocated UINTN in which the\r
+ number of consecutive blocks starting with Lba is\r
+ returned. All blocks in this range have a size of\r
+ BlockSize\r
+\r
+Returns: \r
+ EFI_SUCCESS - The firmware volume was read successfully and \r
+ contents are in Buffer\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiFvbEraseCustomBlockRange (\r
+ IN UINTN Instance,\r
+ IN EFI_LBA StartLba,\r
+ IN UINTN OffsetStartLba,\r
+ IN EFI_LBA LastLba,\r
+ IN UINTN OffsetLastLba\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Erases and initializes a specified range of a firmware volume\r
+\r
+Arguments:\r
+ Instance - The FV instance to be erased\r
+ StartLba - The starting logical block index to be erased\r
+ OffsetStartLba - Offset into the starting block at which to \r
+ begin erasing\r
+ LastLba - The last logical block index to be erased\r
+ OffsetLastLba - Offset into the last block at which to end erasing\r
+\r
+Returns: \r
+\r
+ Status code\r
+ \r
+ EFI_INVALID_PARAMETER - invalid parameter\r
+ \r
+ EFI_UNSUPPORTED - not support\r
+ \r
+--*/\r
+;\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Public include file for the HII Library\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: HiiLib.h\r
+\r
+**/\r
+\r
+#ifndef __HII_LIB_H__\r
+#define __HII_LIB_H__\r
+\r
+#include <Protocol/HiiDatabase.h>\r
+\r
+/**\r
+ This function allocates pool for an EFI_HII_PACKAGES structure\r
+ with enough space for the variable argument list of package pointers.\r
+ The allocated structure is initialized using NumberOfPackages, Guid, \r
+ and the variable length argument list of package pointers.\r
+\r
+ @param NumberOfPackages The number of HII packages to prepare.\r
+ @param Guid Package GUID.\r
+\r
+ @return\r
+ The allocated and initialized packages.\r
+\r
+**/\r
+EFI_HII_PACKAGE_LIST_HEADER*\r
+EFIAPI\r
+PreparePackages (\r
+ IN UINTN NumberOfPackages,\r
+ IN CONST EFI_GUID *Guid OPTIONAL,\r
+ ...\r
+ )\r
+;\r
+\r
+\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Public include file for the HOB Library\r
+\r
+ Copyright (c) 2006 - 2007, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: HobLib.h\r
+\r
+**/\r
+\r
+#ifndef __HOB_LIB_H__\r
+#define __HOB_LIB_H__\r
+\r
+/**\r
+ Returns the pointer to the HOB list.\r
+\r
+ This function returns the pointer to first HOB in the list.\r
+\r
+ @return The pointer to the HOB list.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetHobList (\r
+ VOID\r
+ )\r
+;\r
+\r
+/**\r
+ Returns the next instance of a HOB type from the starting HOB.\r
+\r
+ This function searches the first instance of a HOB type from the starting HOB pointer. \r
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.\r
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer\r
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;\r
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.\r
+ If HobStart is NULL, then ASSERT().\r
+\r
+ @param Type The HOB type to return.\r
+ @param HobStart The starting HOB pointer to search from.\r
+\r
+ @return The next instance of a HOB type from the starting HOB.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetNextHob (\r
+ IN UINT16 Type,\r
+ IN CONST VOID *HobStart\r
+ )\r
+;\r
+\r
+/**\r
+ Returns the first instance of a HOB type among the whole HOB list.\r
+\r
+ This function searches the first instance of a HOB type among the whole HOB list. \r
+ If there does not exist such HOB type in the HOB list, it will return NULL. \r
+\r
+ @param Type The HOB type to return.\r
+\r
+ @return The next instance of a HOB type from the starting HOB.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetFirstHob (\r
+ IN UINT16 Type\r
+ )\r
+;\r
+\r
+/**\r
+ This function searches the first instance of a HOB from the starting HOB pointer. \r
+ Such HOB should satisfy two conditions: \r
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid. \r
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL. \r
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()\r
+ to extract the data section and its size info respectively.\r
+ In contrast with macro GET_NEXT_HOB(), this function does not skip the starting HOB pointer\r
+ unconditionally: it returns HobStart back if HobStart itself meets the requirement;\r
+ caller is required to use GET_NEXT_HOB() if it wishes to skip current HobStart.\r
+ If Guid is NULL, then ASSERT().\r
+ If HobStart is NULL, then ASSERT().\r
+\r
+ @param Guid The GUID to match with in the HOB list.\r
+ @param HobStart A pointer to a Guid.\r
+\r
+ @return The next instance of the matched GUID HOB from the starting HOB.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetNextGuidHob (\r
+ IN CONST EFI_GUID *Guid,\r
+ IN CONST VOID *HobStart\r
+ )\r
+;\r
+\r
+/**\r
+ This function searches the first instance of a HOB among the whole HOB list. \r
+ Such HOB should satisfy two conditions:\r
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.\r
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.\r
+ Caller is required to apply GET_GUID_HOB_DATA () and GET_GUID_HOB_DATA_SIZE ()\r
+ to extract the data section and its size info respectively.\r
+ If Guid is NULL, then ASSERT().\r
+\r
+ @param Guid The GUID to match with in the HOB list.\r
+\r
+ @return The first instance of the matched GUID HOB among the whole HOB list.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+GetFirstGuidHob (\r
+ IN CONST EFI_GUID *Guid\r
+ )\r
+;\r
+\r
+/**\r
+ Get the Boot Mode from the HOB list.\r
+\r
+ This function returns the system boot mode information from the \r
+ PHIT HOB in HOB list.\r
+\r
+ @param VOID\r
+\r
+ @return The Boot Mode.\r
+\r
+**/\r
+EFI_BOOT_MODE\r
+EFIAPI\r
+GetBootModeHob (\r
+ VOID\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB for a loaded PE32 module.\r
+\r
+ This function builds a HOB for a loaded PE32 module.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If ModuleName is NULL, then ASSERT().\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param ModuleName The GUID File Name of the module.\r
+ @param MemoryAllocationModule The 64 bit physical address of the module.\r
+ @param ModuleLength The length of the module in bytes.\r
+ @param EntryPoint The 64 bit physical address of the module entry point.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildModuleHob (\r
+ IN CONST EFI_GUID *ModuleName,\r
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,\r
+ IN UINT64 ModuleLength,\r
+ IN EFI_PHYSICAL_ADDRESS EntryPoint\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB that describes a chunk of system memory.\r
+\r
+ This function builds a HOB that describes a chunk of system memory.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param ResourceType The type of resource described by this HOB.\r
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.\r
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.\r
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildResourceDescriptorHob (\r
+ IN EFI_RESOURCE_TYPE ResourceType,\r
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,\r
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,\r
+ IN UINT64 NumberOfBytes\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a GUID HOB with a certain data length.\r
+\r
+ This function builds a customized HOB tagged with a GUID for identification \r
+ and returns the start address of GUID HOB data so that caller can fill the customized data. \r
+ The HOB Header and Name field is already stripped.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If Guid is NULL, then ASSERT().\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+ If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().\r
+\r
+ @param Guid The GUID to tag the customized HOB.\r
+ @param DataLength The size of the data payload for the GUID HOB.\r
+\r
+ @return The start address of GUID HOB data.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+BuildGuidHob (\r
+ IN CONST EFI_GUID *Guid,\r
+ IN UINTN DataLength\r
+ )\r
+;\r
+\r
+/**\r
+ Copies a data buffer to a newly-built HOB.\r
+\r
+ This function builds a customized HOB tagged with a GUID for identification,\r
+ copies the input data to the HOB data field and returns the start address of the GUID HOB data.\r
+ The HOB Header and Name field is already stripped.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If Guid is NULL, then ASSERT().\r
+ If Data is NULL and DataLength > 0, then ASSERT().\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+ If DataLength >= (0x10000 - sizeof (EFI_HOB_GUID_TYPE)), then ASSERT().\r
+\r
+ @param Guid The GUID to tag the customized HOB.\r
+ @param Data The data to be copied into the data field of the GUID HOB.\r
+ @param DataLength The size of the data payload for the GUID HOB.\r
+\r
+ @return The start address of GUID HOB data.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+BuildGuidDataHob (\r
+ IN CONST EFI_GUID *Guid,\r
+ IN VOID *Data,\r
+ IN UINTN DataLength\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a Firmware Volume HOB.\r
+\r
+ This function builds a Firmware Volume HOB.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param BaseAddress The base address of the Firmware Volume.\r
+ @param Length The size of the Firmware Volume in bytes.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildFvHob (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a Capsule Volume HOB.\r
+\r
+ This function builds a Capsule Volume HOB.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param BaseAddress The base address of the Capsule Volume.\r
+ @param Length The size of the Capsule Volume in bytes.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildCvHob (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB for the CPU.\r
+\r
+ This function builds a HOB for the CPU.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.\r
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildCpuHob (\r
+ IN UINT8 SizeOfMemorySpace,\r
+ IN UINT8 SizeOfIoSpace\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB for the Stack.\r
+\r
+ This function builds a HOB for the stack.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param BaseAddress The 64 bit physical address of the Stack.\r
+ @param Length The length of the stack in bytes.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildStackHob (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB for the BSP store.\r
+\r
+ This function builds a HOB for BSP store.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param BaseAddress The 64 bit physical address of the BSP.\r
+ @param Length The length of the BSP store in bytes.\r
+ @param MemoryType Type of memory allocated by this HOB.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildBspStoreHob (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN EFI_MEMORY_TYPE MemoryType\r
+ )\r
+;\r
+\r
+/**\r
+ Builds a HOB for the memory allocation.\r
+\r
+ This function builds a HOB for the memory allocation.\r
+ It can only be invoked during PEI phase;\r
+ for DXE phase, it will ASSERT() since PEI HOB is read-only for DXE phase.\r
+ If there is no additional space for HOB creation, then ASSERT().\r
+\r
+ @param BaseAddress The 64 bit physical address of the memory.\r
+ @param Length The length of the memory allocation in bytes.\r
+ @param MemoryType Type of memory allocated by this HOB.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+BuildMemoryAllocationHob (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN EFI_MEMORY_TYPE MemoryType\r
+ )\r
+;\r
+\r
+#endif\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ IfrSupportLib.h\r
+\r
+Abstract:\r
+\r
+ The file contain all library function for Ifr Operations.\r
+\r
+--*/\r
+\r
+#ifndef _IFRSUPPORTLIBRARY_H\r
+#define _IFRSUPPORTLIBRARY_H\r
+\r
+#define DEFAULT_FORM_BUFFER_SIZE 0xFFFF\r
+#define DEFAULT_STRING_BUFFER_SIZE 0xFFFF\r
+\r
+#pragma pack(1)\r
+typedef struct {\r
+ CHAR16 *OptionString; // Passed in string to generate a token for in a truly dynamic form creation\r
+ STRING_REF StringToken; // This is used when creating a single op-code without generating a StringToken (have one already)\r
+ UINT16 Value;\r
+ UINT8 Flags;\r
+ UINT16 Key;\r
+} IFR_OPTION;\r
+#pragma pack()\r
+\r
+EFI_STATUS\r
+GetCurrentLanguage (\r
+ OUT CHAR16 *Lang\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Determine what is the current language setting\r
+ \r
+Arguments:\r
+\r
+ Lang - Pointer of system language\r
+ \r
+Returns: \r
+ \r
+ Status code\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+AddString (\r
+ IN VOID *StringBuffer,\r
+ IN CHAR16 *Language,\r
+ IN CHAR16 *String,\r
+ IN OUT STRING_REF *StringToken\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Add a string to the incoming buffer and return the token and offset data\r
+ \r
+Arguments:\r
+\r
+ StringBuffer - The incoming buffer\r
+ \r
+ Language - Currrent language\r
+ \r
+ String - The string to be added\r
+ \r
+ StringToken - The index where the string placed\r
+ \r
+Returns: \r
+\r
+ EFI_OUT_OF_RESOURCES - No enough buffer to allocate\r
+ \r
+ EFI_SUCCESS - String successfully added to the incoming buffer\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+AddOpCode (\r
+ IN VOID *FormBuffer,\r
+ IN OUT VOID *OpCodeData\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Add op-code data to the FormBuffer\r
+ \r
+Arguments:\r
+\r
+ FormBuffer - Form buffer to be inserted to\r
+ \r
+ OpCodeData - Op-code data to be inserted\r
+ \r
+Returns: \r
+\r
+ EFI_OUT_OF_RESOURCES - No enough buffer to allocate\r
+ \r
+ EFI_SUCCESS - Op-code data successfully inserted\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateFormSet (\r
+ IN CHAR16 *FormSetTitle,\r
+ IN EFI_GUID *Guid,\r
+ IN UINT8 Class,\r
+ IN UINT8 SubClass,\r
+ IN OUT VOID **FormBuffer,\r
+ IN OUT VOID **StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a formset\r
+ \r
+Arguments:\r
+\r
+ FormSetTitle - Title of formset\r
+ \r
+ Guid - Guid of formset\r
+ \r
+ Class - Class of formset\r
+ \r
+ SubClass - Sub class of formset\r
+ \r
+ FormBuffer - Pointer of the formset created\r
+ \r
+ StringBuffer - Pointer of FormSetTitile string created\r
+ \r
+Returns: \r
+\r
+ EFI_OUT_OF_RESOURCES - No enough buffer to allocate\r
+ \r
+ EFI_SUCCESS - Formset successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateForm (\r
+ IN CHAR16 *FormTitle,\r
+ IN UINT16 FormId,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a form\r
+ \r
+Arguments:\r
+\r
+ FormTitle - Title of the form\r
+ \r
+ FormId - Id of the form\r
+ \r
+ FormBuffer - Pointer of the form created\r
+ \r
+ StringBuffer - Pointer of FormTitil string created\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Form successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateSubTitle (\r
+ IN CHAR16 *SubTitle,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a SubTitle\r
+ \r
+Arguments:\r
+\r
+ SubTitle - Sub title to be created\r
+ \r
+ FormBuffer - Where this subtitle to add to\r
+ \r
+ StringBuffer - String buffer created for subtitle\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Subtitle successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateText (\r
+ IN CHAR16 *String,\r
+ IN CHAR16 *String2,\r
+ IN CHAR16 *String3,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a line of text\r
+ \r
+Arguments:\r
+\r
+ String - First string of the text\r
+ \r
+ String2 - Second string of the text\r
+ \r
+ String3 - Help string of the text\r
+ \r
+ Flags - Flag of the text\r
+ \r
+ Key - Key of the text\r
+ \r
+ FormBuffer - The form where this text adds to\r
+ \r
+ StringBuffer - String buffer created for String, String2 and String3\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Text successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateGoto (\r
+ IN UINT16 FormId,\r
+ IN CHAR16 *Prompt,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a hyperlink\r
+ \r
+Arguments:\r
+\r
+ FormId - Form ID of the hyperlink\r
+ \r
+ Prompt - Prompt of the hyperlink\r
+ \r
+ FormBuffer - The form where this hyperlink adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Hyperlink successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateOneOf (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN CHAR16 *Prompt,\r
+ IN CHAR16 *Help,\r
+ IN IFR_OPTION *OptionsList,\r
+ IN UINTN OptionCount,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a one-of question with a set of options to choose from. The\r
+ OptionsList is a pointer to a null-terminated list of option descriptions.\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the one-of box\r
+ \r
+ DataWidth - DataWidth of the one-of box\r
+ \r
+ Prompt - Prompt of the one-of box\r
+ \r
+ Help - Help of the one-of box\r
+ \r
+ OptionsList - Each string in it is an option of the one-of box\r
+ \r
+ OptionCount - Option string count\r
+ \r
+ FormBuffer - The form where this one-of box adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt, Help and Option strings\r
+ \r
+Returns: \r
+\r
+ EFI_DEVICE_ERROR - DataWidth > 2\r
+\r
+ EFI_SUCCESS - One-Of box successfully created.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateOrderedList (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 MaxEntries,\r
+ IN CHAR16 *Prompt,\r
+ IN CHAR16 *Help,\r
+ IN IFR_OPTION *OptionsList,\r
+ IN UINTN OptionCount,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a one-of question with a set of options to choose from. The\r
+ OptionsList is a pointer to a null-terminated list of option descriptions.\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the ordered list\r
+ \r
+ MaxEntries - MaxEntries of the ordered list\r
+ \r
+ Prompt - Prompt of the ordered list\r
+ \r
+ Help - Help of the ordered list\r
+ \r
+ OptionsList - Each string in it is an option of the ordered list\r
+ \r
+ OptionCount - Option string count\r
+ \r
+ FormBuffer - The form where this ordered list adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt, Help and Option strings\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Ordered list successfully created.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateCheckBox (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN CHAR16 *Prompt,\r
+ IN CHAR16 *Help,\r
+ IN UINT8 Flags,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a checkbox\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the check box\r
+ \r
+ DataWidth - DataWidth of the check box\r
+ \r
+ Prompt - Prompt of the check box\r
+ \r
+ Help - Help of the check box\r
+ \r
+ Flags - Flags of the check box\r
+ \r
+ FormBuffer - The form where this check box adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt and Help.\r
+ \r
+Returns: \r
+\r
+ EFI_DEVICE_ERROR - DataWidth > 1\r
+\r
+ EFI_SUCCESS - Check box successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateNumeric (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN CHAR16 *Prompt,\r
+ IN CHAR16 *Help,\r
+ IN UINT16 Minimum,\r
+ IN UINT16 Maximum,\r
+ IN UINT16 Step,\r
+ IN UINT16 Default,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a numeric\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the numeric\r
+ \r
+ DataWidth - DataWidth of the numeric\r
+ \r
+ Prompt - Prompt of the numeric\r
+ \r
+ Help - Help of the numeric\r
+ \r
+ Minimum - Minumun boundary of the numeric\r
+ \r
+ Maximum - Maximum boundary of the numeric\r
+ \r
+ Step - Step of the numeric\r
+ \r
+ Default - Default value\r
+ \r
+ Flags - Flags of the numeric\r
+ \r
+ Key - Key of the numeric\r
+ \r
+ FormBuffer - The form where this numeric adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt and Help.\r
+ \r
+Returns: \r
+\r
+ EFI_DEVICE_ERROR - DataWidth > 2\r
+ \r
+ EFI_SUCCESS - Numeric is successfully created\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateString (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN CHAR16 *Prompt,\r
+ IN CHAR16 *Help,\r
+ IN UINT8 MinSize,\r
+ IN UINT8 MaxSize,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer,\r
+ IN OUT VOID *StringBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a string\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the string\r
+ \r
+ DataWidth - DataWidth of the string\r
+ \r
+ Prompt - Prompt of the string\r
+ \r
+ Help - Help of the string\r
+ \r
+ MinSize - Min size boundary of the string\r
+ \r
+ MaxSize - Max size boundary of the string\r
+ \r
+ Flags - Flags of the string\r
+ \r
+ Key - Key of the string\r
+ \r
+ FormBuffer - The form where this string adds to\r
+ \r
+ StringBuffer - String buffer created for Prompt and Help.\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - String successfully created.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+ExtractDataFromHiiHandle (\r
+ IN EFI_HII_HANDLE HiiHandle,\r
+ IN OUT UINT16 *ImageLength,\r
+ OUT UINT8 *DefaultImage,\r
+ OUT EFI_GUID *Guid\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Extract information pertaining to the HiiHandle\r
+ \r
+Arguments:\r
+\r
+ HiiHandle - Hii handle\r
+ \r
+ ImageLength - For input, length of DefaultImage;\r
+ For output, length of actually required\r
+ \r
+ DefaultImage - Image buffer prepared by caller\r
+ \r
+ Guid - Guid information about the form\r
+ \r
+Returns: \r
+\r
+ EFI_OUT_OF_RESOURCES - No enough buffer to allocate\r
+ \r
+ EFI_BUFFER_TOO_SMALL - DefualtImage has no enough ImageLength\r
+ \r
+ EFI_SUCCESS - Successfully extract data from Hii database.\r
+ \r
+ \r
+--*/\r
+;\r
+\r
+EFI_HII_HANDLE\r
+FindHiiHandle (\r
+ IN OUT EFI_HII_PROTOCOL **HiiProtocol, OPTIONAL\r
+ IN EFI_GUID *Guid\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Finds HII handle for given pack GUID previously registered with the HII.\r
+\r
+Arguments:\r
+ HiiProtocol - pointer to pointer to HII protocol interface. \r
+ If NULL, the interface will be found but not returned.\r
+ If it points to NULL, the interface will be found and \r
+ written back to the pointer that is pointed to.\r
+ Guid - The GUID of the pack that registered with the HII.\r
+\r
+Returns:\r
+ Handle to the HII pack previously registered by the memory driver.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateSubTitleOpCode (\r
+ IN STRING_REF StringToken,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a SubTitle opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ StringToken - StringToken of the subtitle\r
+ \r
+ FormBuffer - Output of subtitle as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Subtitle created to be a form\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateTextOpCode (\r
+ IN STRING_REF StringToken,\r
+ IN STRING_REF StringTokenTwo,\r
+ IN STRING_REF StringTokenThree,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a Text opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ StringToken - First string token of the text\r
+ \r
+ StringTokenTwo - Second string token of the text\r
+ \r
+ StringTokenThree - Help string token of the text\r
+ \r
+ Flags - Flag of the text\r
+ \r
+ Key - Key of the text\r
+ \r
+ FormBuffer - Output of text as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Text created to be a form\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateGotoOpCode (\r
+ IN UINT16 FormId,\r
+ IN STRING_REF StringToken,\r
+ IN STRING_REF StringTokenTwo,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a hyperlink opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ FormId - Form ID of the hyperlink\r
+ \r
+ StringToken - Prompt string token of the hyperlink\r
+ \r
+ StringTokenTwo - Help string token of the hyperlink\r
+ \r
+ Flags - Flags of the hyperlink\r
+ \r
+ Key - Key of the hyperlink\r
+ \r
+ FormBuffer - Output of hyperlink as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Hyperlink created to be a form\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateOneOfOpCode (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN STRING_REF PromptToken,\r
+ IN STRING_REF HelpToken,\r
+ IN IFR_OPTION *OptionsList,\r
+ IN UINTN OptionCount,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a one-of opcode with a set of option op-codes to choose from independent of string creation.\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+\r
+ OptionsList is a pointer to a null-terminated list of option descriptions. Ensure that OptionsList[x].StringToken\r
+ has been filled in since this routine will not generate StringToken values.\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the one-of box\r
+ \r
+ DataWidth - DataWidth of the one-of box\r
+ \r
+ PromptToken - Prompt string token of the one-of box\r
+ \r
+ HelpToken - Help string token of the one-of box\r
+ \r
+ OptionsList - Each string in it is an option of the one-of box\r
+ \r
+ OptionCount - Option string count\r
+ \r
+ FormBuffer - Output of One-Of box as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - One-Of box created to be a form\r
+ \r
+ EFI_DEVICE_ERROR - DataWidth > 2\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateOrderedListOpCode (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 MaxEntries,\r
+ IN STRING_REF PromptToken,\r
+ IN STRING_REF HelpToken,\r
+ IN IFR_OPTION *OptionsList,\r
+ IN UINTN OptionCount,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a ordered list opcode with a set of option op-codes to choose from independent of string creation.\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+\r
+ OptionsList is a pointer to a null-terminated list of option descriptions. Ensure that OptionsList[x].StringToken\r
+ has been filled in since this routine will not generate StringToken values.\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the ordered list\r
+ \r
+ MaxEntries - MaxEntries of the ordered list\r
+ \r
+ PromptToken - Prompt string token of the ordered list\r
+ \r
+ HelpToken - Help string token of the ordered list\r
+ \r
+ OptionsList - Each string in it is an option of the ordered list\r
+ \r
+ OptionCount - Option string count\r
+ \r
+ FormBuffer - Output of ordered list as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Ordered list created to be a form\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateCheckBoxOpCode (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN STRING_REF PromptToken,\r
+ IN STRING_REF HelpToken,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a checkbox opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the check box\r
+ \r
+ DataWidth - DataWidth of the check box\r
+ \r
+ PromptToken - Prompt string token of the check box\r
+ \r
+ HelpToken - Help string token of the check box\r
+ \r
+ Flags - Flags of the check box\r
+ \r
+ Key - Key of the check box\r
+ \r
+ FormBuffer - Output of the check box as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Checkbox created to be a form\r
+ \r
+ EFI_DEVICE_ERROR - DataWidth > 1\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateNumericOpCode (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN STRING_REF PromptToken,\r
+ IN STRING_REF HelpToken,\r
+ IN UINT16 Minimum,\r
+ IN UINT16 Maximum,\r
+ IN UINT16 Step,\r
+ IN UINT16 Default,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a numeric opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the numeric\r
+ \r
+ DataWidth - DataWidth of the numeric\r
+ \r
+ PromptToken - Prompt string token of the numeric\r
+ \r
+ HelpToken - Help string token of the numeric\r
+ \r
+ Minimum - Minumun boundary of the numeric\r
+ \r
+ Maximum - Maximum boundary of the numeric\r
+ \r
+ Step - Step of the numeric\r
+ \r
+ Default - Default value of the numeric\r
+ \r
+ Flags - Flags of the numeric\r
+ \r
+ Key - Key of the numeric\r
+ \r
+ FormBuffer - Output of the numeric as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - The numeric created to be a form.\r
+ \r
+ EFI_DEVICE_ERROR - DataWidth > 2\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateStringOpCode (\r
+ IN UINT16 QuestionId,\r
+ IN UINT8 DataWidth,\r
+ IN STRING_REF PromptToken,\r
+ IN STRING_REF HelpToken,\r
+ IN UINT8 MinSize,\r
+ IN UINT8 MaxSize,\r
+ IN UINT8 Flags,\r
+ IN UINT16 Key,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a numeric opcode independent of string creation\r
+ This is used primarily by users who need to create just one particular valid op-code and the string\r
+ data will be assumed to exist in the HiiDatabase already. (Useful when exporting op-codes at a label\r
+ location to pre-defined forms in HII)\r
+ \r
+Arguments:\r
+\r
+ QuestionId - Question ID of the string\r
+ \r
+ DataWidth - DataWidth of the string\r
+ \r
+ PromptToken - Prompt token of the string\r
+ \r
+ HelpToken - Help token of the string\r
+ \r
+ MinSize - Min size boundary of the string\r
+ \r
+ MaxSize - Max size boundary of the string\r
+ \r
+ Flags - Flags of the string\r
+ \r
+ Key - Key of the string\r
+ \r
+ FormBuffer - Output of the string as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - String created to be a form.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+ValidateDataFromHiiHandle (\r
+ IN EFI_HII_HANDLE HiiHandle,\r
+ OUT BOOLEAN *Results\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Validate that the data associated with the HiiHandle in NVRAM is within\r
+ the reasonable parameters for that FormSet. Values for strings and passwords\r
+ are not verified due to their not having the equivalent of valid range settings.\r
+ \r
+Arguments:\r
+\r
+ HiiHandle - Handle of the HII database entry to query\r
+\r
+ Results - If return Status is EFI_SUCCESS, Results provides valid data\r
+ TRUE = NVRAM Data is within parameters\r
+ FALSE = NVRAM Data is NOT within parameters\r
+ \r
+Returns: \r
+\r
+ EFI_OUT_OF_RESOURCES - No enough buffer to allocate\r
+ \r
+ EFI_SUCCESS - Data successfully validated\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+CreateBannerOpCode (\r
+ IN UINT16 Title,\r
+ IN UINT16 LineNumber,\r
+ IN UINT8 Alignment,\r
+ IN OUT VOID *FormBuffer\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Create a banner opcode. This is primarily used by the FrontPage implementation from BDS.\r
+ \r
+Arguments:\r
+\r
+ Title - Title of the banner\r
+ \r
+ LineNumber - LineNumber of the banner\r
+ \r
+ Alignment - Alignment of the banner\r
+ \r
+ FormBuffer - Output of banner as a form\r
+ \r
+Returns: \r
+\r
+ EFI_SUCCESS - Banner created to be a form.\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+EfiLibHiiVariablePackGetMap (\r
+ IN EFI_HII_VARIABLE_PACK *Pack, \r
+ OUT CHAR16 **Name, OPTIONAL\r
+ OUT EFI_GUID **Guid, OPTIONAL\r
+ OUT UINT16 *Id, OPTIONAL\r
+ OUT VOID **Var, OPTIONAL\r
+ OUT UINTN *Size OPTIONAL\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Extracts a variable form a Pack.\r
+\r
+Arguments:\r
+\r
+ Pack - List of variables\r
+ Name - Name of the variable/map\r
+ Guid - GUID of the variable/map\r
+ Var - Pointer to the variable/map\r
+ Size - Size of the variable/map in bytes\r
+\r
+Returns: \r
+\r
+ VOID.\r
+\r
+--*/\r
+;\r
+\r
+UINTN\r
+EfiLibHiiVariablePackListGetMapCnt (\r
+ IN EFI_HII_VARIABLE_PACK_LIST *List\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Finds a count of the variables/maps in the List.\r
+\r
+Arguments:\r
+\r
+ List - List of variables\r
+\r
+Returns: \r
+\r
+ Number of Map in the variable pack list.\r
+\r
+--*/\r
+;\r
+\r
+typedef VOID (EFI_LIB_HII_VARIABLE_PACK_LIST_CALLBACK) (\r
+ IN CHAR16 *Name,\r
+ IN EFI_GUID *Guid,\r
+ IN UINT16 Id,\r
+ IN VOID *Var,\r
+ IN UINTN Size\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+\r
+ type definition for the callback to be \r
+ used with EfiLibHiiVariablePackListForEachVar().\r
+\r
+Arguments:\r
+\r
+ Id - Variable/Map ID\r
+ Name - Name of the variable/map\r
+ Guid - GUID of the variable/map\r
+ Var - Pointer to the variable/map\r
+ Size - Size of the variable/map in bytes\r
+\r
+Returns: \r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+VOID\r
+EfiLibHiiVariablePackListForEachVar (\r
+ IN EFI_HII_VARIABLE_PACK_LIST *List,\r
+ IN EFI_LIB_HII_VARIABLE_PACK_LIST_CALLBACK *Callback\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Will iterate all variable/maps as appearing \r
+ in List and for each, it will call the Callback.\r
+\r
+Arguments:\r
+\r
+ List - List of variables\r
+ Callback - Routine to be called for each iterated variable.\r
+\r
+Returns: \r
+\r
+ VOID\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariablePackListGetMapByIdx (\r
+ IN UINTN Idx, \r
+ IN EFI_HII_VARIABLE_PACK_LIST *List, \r
+ OUT CHAR16 **Name, OPTIONAL\r
+ OUT EFI_GUID **Guid, OPTIONAL\r
+ OUT UINT16 *Id, OPTIONAL\r
+ OUT VOID **Var,\r
+ OUT UINTN *Size\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Finds a variable form List given \r
+ the order number as appears in the List.\r
+\r
+Arguments:\r
+\r
+ Idx - The index of the variable/map to retrieve\r
+ List - List of variables\r
+ Name - Name of the variable/map\r
+ Guid - GUID of the variable/map\r
+ Var - Pointer to the variable/map\r
+ Size - Size of the variable/map in bytes\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - Variable is found, OUT parameters are valid\r
+ EFI_NOT_FOUND - Variable is not found, OUT parameters are not valid\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariablePackListGetMapById (\r
+ IN UINT16 Id, \r
+ IN EFI_HII_VARIABLE_PACK_LIST *List,\r
+ OUT CHAR16 **Name, OPTIONAL\r
+ OUT EFI_GUID **Guid, OPTIONAL\r
+ OUT VOID **Var,\r
+ OUT UINTN *Size\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Finds a variable form List given the \r
+ order number as appears in the List.\r
+\r
+Arguments:\r
+\r
+ Id - The ID of the variable/map to retrieve\r
+ List - List of variables\r
+ Name - Name of the variable/map\r
+ Guid - GUID of the variable/map\r
+ Var - Pointer to the variable/map\r
+ Size - Size of the variable/map in bytes\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - Variable is found, OUT parameters are valid\r
+ EFI_NOT_FOUND - Variable is not found, OUT parameters are not valid\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariablePackListGetMap (\r
+ IN EFI_HII_VARIABLE_PACK_LIST *List,\r
+ IN CHAR16 *Name,\r
+ IN EFI_GUID *Guid,\r
+ OUT UINT16 *Id,\r
+ OUT VOID **Var, \r
+ OUT UINTN *Size\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+\r
+ Finds a variable form EFI_HII_VARIABLE_PACK_LIST given name and GUID.\r
+\r
+Arguments:\r
+\r
+ List - List of variables\r
+ Name - Name of the variable/map to be found\r
+ Guid - GUID of the variable/map to be found\r
+ Var - Pointer to the variable/map found\r
+ Size - Size of the variable/map in bytes found\r
+\r
+Returns:\r
+\r
+ EFI_SUCCESS - variable is found, OUT parameters are valid\r
+ EFI_NOT_FOUND - variable is not found, OUT parameters are not valid\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariableRetrieveFromNv (\r
+ IN CHAR16 *Name,\r
+ IN EFI_GUID *Guid,\r
+ IN UINTN Size,\r
+ OUT VOID **Var\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+ Finds out if a variable of specific Name/Guid/Size exists in NV. \r
+ If it does, it will retrieve it into the Var. \r
+\r
+Arguments:\r
+ Name, Guid, Size - Parameters of the variable to retrieve. Must match exactly.\r
+ Var - Variable will be retrieved into buffer pointed by this pointer.\r
+ If pointing to NULL, the buffer will be allocated. Caller is responsible for releasing the buffer.\r
+Returns:\r
+ EFI_SUCCESS - The variable of exact Name/Guid/Size parameters was retrieved and written to Var.\r
+ EFI_NOT_FOUND - The variable of this Name/Guid was not found in the NV.\r
+ EFI_LOAD_ERROR - The variable in the NV was of different size, or NV API returned error.\r
+\r
+--*/\r
+;\r
+\r
+////\r
+//// Variable override support.\r
+////\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariableOverrideIfSuffix (\r
+ IN CHAR16 *Suffix,\r
+ IN CHAR16 *Name,\r
+ IN EFI_GUID *Guid,\r
+ IN UINTN Size,\r
+ OUT VOID *Var\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+ Overrrides the variable with NV data if found.\r
+ But it only does it if the Name ends with specified Suffix.\r
+ For example, if Suffix="MyOverride" and the Name="XyzSetupMyOverride",\r
+ the Suffix matches the end of Name, so the variable will be loaded from NV\r
+ provided the variable exists and the GUID and Size matches.\r
+\r
+Arguments:\r
+ Suffix - Suffix the Name should end with.\r
+ Name, Guid, Size - Parameters of the variable to retrieve. Must match exactly.\r
+ Var - Variable will be retrieved into this buffer.\r
+ Caller is responsible for providing storage of exactly Size size in bytes.\r
+Returns:\r
+ EFI_SUCCESS - The variable was overriden with NV variable of same Name/Guid/Size.\r
+ EFI_INVALID_PARAMETER - The name of the variable does not end with <Suffix>.\r
+ EFI_NOT_FOUND - The variable of this Name/Guid was not found in the NV.\r
+ EFI_LOAD_ERROR - The variable in the NV was of different size, or NV API returned error.\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+EfiLibHiiVariableOverrideBySuffix (\r
+ IN CHAR16 *Suffix,\r
+ IN CHAR16 *Name,\r
+ IN EFI_GUID *Guid,\r
+ IN UINTN Size,\r
+ OUT VOID *Var\r
+ ) \r
+/*++\r
+\r
+Routine Description:\r
+ Overrrides the variable with NV data if found.\r
+ But it only does it if the NV contains the same variable with Name is appended with Suffix. \r
+ For example, if Suffix="MyOverride" and the Name="XyzSetup",\r
+ the Suffix will be appended to the end of Name, and the variable with Name="XyzSetupMyOverride"\r
+ will be loaded from NV provided the variable exists and the GUID and Size matches.\r
+\r
+Arguments:\r
+ Suffix - Suffix the variable will be appended with.\r
+ Name, Guid, Size - Parameters of the variable to retrieve. Must match exactly.\r
+ Var - Variable will be retrieved into this buffer.\r
+ Caller is responsible for providing storage of exactly Size size in bytes.\r
+\r
+Returns:\r
+ EFI_SUCCESS - The variable was overriden with NV variable of same Name/Guid/Size.\r
+ EFI_NOT_FOUND - The variable of this Name/Guid was not found in the NV.\r
+ EFI_LOAD_ERROR - The variable in the NV was of different size, or NV API returned error.\r
+\r
+--*/\r
+;\r
+\r
+#endif\r
--- /dev/null
+/** @file
+ I/O and MMIO Library Services
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.h
+
+**/
+
+#ifndef __IO_LIB_H__
+#define __IO_LIB_H__
+
+#define IO_LIB_ADDRESS(Segment,Port) \
+ ( ((Port) & 0xffff) | (((Segment) & 0xffff) << 16) )
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ );
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Copy data from MMIO region to system memory by using 8-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT8 *
+EFIAPI
+MmioReadBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Copy data from MMIO region to system memory by using 16-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT16 *
+EFIAPI
+MmioReadBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT16 *Buffer
+ );
+
+/**
+ Copy data from MMIO region to system memory by using 32-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT32 *
+EFIAPI
+MmioReadBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT32 *Buffer
+ );
+
+/**
+ Copy data from MMIO region to system memory by using 64-bit access.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied from.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer
+
+**/
+UINT64 *
+EFIAPI
+MmioReadBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT64 *Buffer
+ );
+
+/**
+ Copy data from system memory to MMIO region by using 8-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT8 *
+EFIAPI
+MmioWriteBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT8 *Buffer
+ );
+
+/**
+ Copy data from system memory to MMIO region by using 16-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT16 *
+EFIAPI
+MmioWriteBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT16 *Buffer
+ );
+
+/**
+ Copy data from system memory to MMIO region by using 32-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT32 *
+EFIAPI
+MmioWriteBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT32 *Buffer
+ );
+
+/**
+ Copy data from system memory to MMIO region by using 64-bit access.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
+ of byte to be copied is specified by Length. Length is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param StartAddress Starting address for the MMIO region to be copied to.
+ @param Length Size in bytes of the copy.
+ @param Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Size in bytes of the copy.
+
+**/
+UINT64 *
+EFIAPI
+MmioWriteBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT64 *Buffer
+ );
+
+
+#endif
+
--- /dev/null
+/** @file\r
+ Memory Allocation Library Services\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: MemoryAllocationLib.h\r
+\r
+**/\r
+\r
+#ifndef __MEMORY_ALLOCATION_LIB_H__\r
+#define __MEMORY_ALLOCATION_LIB_H__\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiBootServicesData.\r
+\r
+ Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the\r
+ allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r
+ is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r
+ returned.\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocatePages (\r
+ IN UINTN Pages\r
+ );\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiRuntimeServicesData.\r
+\r
+ Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r
+ allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r
+ is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r
+ returned.\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateRuntimePages (\r
+ IN UINTN Pages\r
+ );\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiReservedMemoryType.\r
+\r
+ Allocates the number of 4KB pages of type EfiReservedMemoryType and returns a pointer to the\r
+ allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r
+ is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r
+ returned.\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateReservedPages (\r
+ IN UINTN Pages\r
+ );\r
+\r
+/**\r
+ Frees one or more 4KB pages that were previously allocated with one of the page allocation\r
+ functions in the Memory Allocation Library.\r
+\r
+ Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer\r
+ must have been allocated on a previous call to the page allocation services of the Memory\r
+ Allocation Library.\r
+ If Buffer was not allocated with a page allocation function in the Memory Allocation Library,\r
+ then ASSERT().\r
+ If Pages is zero, then ASSERT().\r
+ \r
+ @param Buffer Pointer to the buffer of pages to free.\r
+ @param Pages The number of 4 KB pages to free.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+FreePages (\r
+ IN VOID *Buffer,\r
+ IN UINTN Pages\r
+ );\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiBootServicesData at a specified alignment.\r
+\r
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is\r
+ returned. If there is not enough memory at the specified alignment remaining to satisfy the\r
+ request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedPages (\r
+ IN UINTN Pages,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiRuntimeServicesData at a specified alignment.\r
+\r
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is\r
+ returned. If there is not enough memory at the specified alignment remaining to satisfy the\r
+ request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedRuntimePages (\r
+ IN UINTN Pages,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.\r
+\r
+ Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is\r
+ returned. If there is not enough memory at the specified alignment remaining to satisfy the\r
+ request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param Pages The number of 4 KB pages to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedReservedPages (\r
+ IN UINTN Pages,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Frees one or more 4KB pages that were previously allocated with one of the aligned page\r
+ allocation functions in the Memory Allocation Library.\r
+\r
+ Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer\r
+ must have been allocated on a previous call to the aligned page allocation services of the Memory\r
+ Allocation Library.\r
+ If Buffer was not allocated with an aligned page allocation function in the Memory Allocation\r
+ Library, then ASSERT().\r
+ If Pages is zero, then ASSERT().\r
+ \r
+ @param Buffer Pointer to the buffer of pages to free.\r
+ @param Pages The number of 4 KB pages to free.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+FreeAlignedPages (\r
+ IN VOID *Buffer,\r
+ IN UINTN Pages\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfiBootServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData and returns a\r
+ pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is\r
+ returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocatePool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfiRuntimeServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData and returns\r
+ a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is\r
+ returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateRuntimePool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfieservedMemoryType.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType and returns\r
+ a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is\r
+ returned. If there is not enough memory remaining to satisfy the request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateReservedPool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfiBootServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the\r
+ buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a\r
+ valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the\r
+ request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateZeroPool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfiRuntimeServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, clears the\r
+ buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a\r
+ valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the\r
+ request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateRuntimeZeroPool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfiReservedMemoryType.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, clears the\r
+ buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a\r
+ valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the\r
+ request, then NULL is returned.\r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateReservedZeroPool (\r
+ IN UINTN AllocationSize\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiBootServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, copies\r
+ AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory remaining to satisfy the request, then NULL is returned.\r
+ If Buffer is NULL, then ASSERT().\r
+ If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, copies\r
+ AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory remaining to satisfy the request, then NULL is returned.\r
+ If Buffer is NULL, then ASSERT().\r
+ If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateRuntimeCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, copies\r
+ AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory remaining to satisfy the request, then NULL is returned.\r
+ If Buffer is NULL, then ASSERT().\r
+ If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+ @param AllocationSize The number of bytes to allocate and zero.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateReservedCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Frees a buffer that was previously allocated with one of the pool allocation functions in the\r
+ Memory Allocation Library.\r
+\r
+ Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the\r
+ pool allocation services of the Memory Allocation Library.\r
+ If Buffer was not allocated with a pool allocation function in the Memory Allocation Library,\r
+ then ASSERT().\r
+\r
+ @param Buffer Pointer to the buffer to free.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+FreePool (\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfiBootServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedPool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedRuntimePool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates a buffer of type EfieservedMemoryType at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedReservedPool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an\r
+ alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory at the specified alignment remaining to satisfy the request, then NULL is\r
+ returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedZeroPool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an\r
+ alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory at the specified alignment remaining to satisfy the request, then NULL is\r
+ returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedRuntimeZeroPool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Allocates and zeros a buffer of type EfieservedMemoryType at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an\r
+ alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the\r
+ allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there\r
+ is not enough memory at the specified alignment remaining to satisfy the request, then NULL is\r
+ returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedReservedZeroPool (\r
+ IN UINTN AllocationSize,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiBootServicesData type with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData type with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedRuntimeCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.\r
+\r
+ Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType type with an\r
+ alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0,\r
+ then a valid buffer of 0 size is returned. If there is not enough memory at the specified\r
+ alignment remaining to satisfy the request, then NULL is returned.\r
+ If Alignment is not a power of two and Alignment is not zero, then ASSERT().\r
+\r
+ @param AllocationSize The number of bytes to allocate.\r
+ @param Buffer The buffer to copy to the allocated buffer.\r
+ @param Alignment The requested alignment of the allocation. Must be a power of two.\r
+ If Alignment is zero, then byte alignment is used.\r
+\r
+ @return A pointer to the allocated buffer or NULL if allocation fails.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+AllocateAlignedReservedCopyPool (\r
+ IN UINTN AllocationSize,\r
+ IN CONST VOID *Buffer,\r
+ IN UINTN Alignment\r
+ );\r
+\r
+/**\r
+ Frees a buffer that was previously allocated with one of the aligned pool allocation functions \r
+ in the Memory Allocation Library.\r
+\r
+ Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the\r
+ aligned pool allocation services of the Memory Allocation Library.\r
+ If Buffer was not allocated with an aligned pool allocation function in the Memory Allocation\r
+ Library, then ASSERT().\r
+\r
+ @param Buffer Pointer to the buffer to free.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+FreeAlignedPool (\r
+ IN VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ PAL Call Services\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PalCallLib.h\r
+\r
+**/\r
+\r
+#ifndef __PAL_CALL_LIB_H__\r
+#define __PAL_CALL_LIB_H__\r
+\r
+\r
+#include <Base.h>\r
+//\r
+// PAL_CALL_RETURN\r
+//\r
+\r
+/**\r
+ Makes a PAL procedure call.\r
+\r
+ This is a wrapper function to make a PAL procedure call. Based on the Index value,\r
+ this API will make static or stacked PAL call. Architected procedures may be designated\r
+ as required or optional. If a PAL procedure is specified as optional, a unique return\r
+ code of 0xFFFFFFFFFFFFFFFF is returned in the Status field of the PAL_CALL_RETURN structure.\r
+ This indicates that the procedure is not present in this PAL implementation. It is the\r
+ caller¡¯s responsibility to check for this return code after calling any optional PAL\r
+ procedure. No parameter checking is performed on the 4 input parameters, but there are\r
+ some common rules that the caller should follow when making a PAL call. Any address\r
+ passed to PAL as buffers for return parameters must be 8-byte aligned. Unaligned addresses\r
+ may cause undefined results. For those parameters defined as reserved or some fields\r
+ defined as reserved must be zero filled or the invalid argument return value may be\r
+ returned or undefined result may occur during the execution of the procedure.\r
+ This function is only available on IPF.\r
+\r
+ @param Index - The PAL procedure Index number.\r
+ @param Arg2 - The 2nd parameter for PAL procedure calls.\r
+ @param Arg3 - The 3rd parameter for PAL procedure calls.\r
+ @param Arg4 - The 4th parameter for PAL procedure calls.\r
+\r
+ @return structure returned from the PAL Call procedure, including the status and return value.\r
+\r
+**/\r
+PAL_CALL_RETURN\r
+EFIAPI\r
+PalCall (\r
+ IN UINT64 Index,\r
+ IN UINT64 Arg2,\r
+ IN UINT64 Arg3,\r
+ IN UINT64 Arg4\r
+ );\r
+\r
+#endif\r
+\r
--- /dev/null
+/** @file\r
+PCD Library Class Interface Declarations\r
+\r
+Copyright (c) 2006 - 2007, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+\r
+Module Name: PcdLib.h\r
+\r
+**/\r
+\r
+#ifndef __PCD_LIB_H__\r
+#define __PCD_LIB_H__\r
+\r
+#define PCD_INVALID_TOKEN_NUMBER ((UINTN) 0)\r
+\r
+#define PcdToken(TokenName) _PCD_TOKEN_##TokenName\r
+\r
+\r
+//\r
+// Feature Flag is in the form of a global constant\r
+//\r
+#define FeaturePcdGet(TokenName) _PCD_GET_MODE_BOOL_##TokenName\r
+\r
+\r
+//\r
+// Fixed is fixed at build time\r
+//\r
+#define FixedPcdGet8(TokenName) _PCD_VALUE_##TokenName\r
+#define FixedPcdGet16(TokenName) _PCD_VALUE_##TokenName\r
+#define FixedPcdGet32(TokenName) _PCD_VALUE_##TokenName\r
+#define FixedPcdGet64(TokenName) _PCD_VALUE_##TokenName\r
+#define FixedPcdGetBool(TokenName) _PCD_VALUE_##TokenName\r
+\r
+\r
+#define FixedPcdGetPtr(TokenName) ((VOID *)_PCD_VALUE_##TokenName)\r
+\r
+\r
+//\r
+// (Binary) Patch is in the form of a global variable\r
+//\r
+#define PatchPcdGet8(TokenName) _gPcd_BinaryPatch_##TokenName\r
+#define PatchPcdGet16(TokenName) _gPcd_BinaryPatch_##TokenName\r
+#define PatchPcdGet32(TokenName) _gPcd_BinaryPatch_##TokenName\r
+#define PatchPcdGet64(TokenName) _gPcd_BinaryPatch_##TokenName\r
+#define PatchPcdGetBool(TokenName) _gPcd_BinaryPatch_##TokenName\r
+#define PatchPcdGetPtr(TokenName) ((VOID *)_gPcd_BinaryPatch_##TokenName)\r
+\r
+#define PatchPcdSet8(TokenName, Value) (_gPcd_BinaryPatch_##TokenName = (Value))\r
+#define PatchPcdSet16(TokenName, Value) (_gPcd_BinaryPatch_##TokenName = (Value))\r
+#define PatchPcdSet32(TokenName, Value) (_gPcd_BinaryPatch_##TokenName = (Value))\r
+#define PatchPcdSet64(TokenName, Value) (_gPcd_BinaryPatch_##TokenName = (Value))\r
+#define PatchPcdSetBool(TokenName, Value) (_gPcd_BinaryPatch_##TokenName = (Value))\r
+#define PatchPcdSetPtr(TokenName, Size, Buffer) \\r
+ LibPatchPcdSetPtr ( \\r
+ _gPcd_BinaryPatch_##TokenName, \\r
+ (UINTN)_PCD_PATCHABLE_##TokenName##_SIZE, \\r
+ (Size), \\r
+ (Buffer) \\r
+ )\r
+\r
+//\r
+// Dynamic is via the protocol with only the TokenNumber as argument\r
+// It can also be Patch or Fixed type based on a build option\r
+//\r
+#define PcdGet8(TokenName) _PCD_GET_MODE_8_##TokenName\r
+#define PcdGet16(TokenName) _PCD_GET_MODE_16_##TokenName\r
+#define PcdGet32(TokenName) _PCD_GET_MODE_32_##TokenName\r
+#define PcdGet64(TokenName) _PCD_GET_MODE_64_##TokenName\r
+#define PcdGetPtr(TokenName) _PCD_GET_MODE_PTR_##TokenName\r
+#define PcdGetBool(TokenName) _PCD_GET_MODE_BOOL_##TokenName\r
+\r
+//\r
+// Dynamic Set\r
+//\r
+#define PcdSet8(TokenName, Value) _PCD_SET_MODE_8_##TokenName ((Value))\r
+#define PcdSet16(TokenName, Value) _PCD_SET_MODE_16_##TokenName ((Value))\r
+#define PcdSet32(TokenName, Value) _PCD_SET_MODE_32_##TokenName ((Value))\r
+#define PcdSet64(TokenName, Value) _PCD_SET_MODE_64_##TokenName ((Value))\r
+#define PcdSetPtr(TokenName, SizeOfBuffer, Buffer) \\r
+ _PCD_SET_MODE_PTR_##TokenName ((SizeOfBuffer), (Buffer))\r
+#define PcdSetBool(TokenName, Value) _PCD_SET_MODE_BOOL_##TokenName ((Value))\r
+\r
+//\r
+// Dynamic Ex is to support binary distribution\r
+//\r
+#define PcdGetEx8(Guid, TokenName) LibPcdGetEx8 ((Guid), _PCD_TOKEN_##TokenName)\r
+#define PcdGetEx16(Guid, TokenName) LibPcdGetEx16 ((Guid), _PCD_TOKEN_##TokenName)\r
+#define PcdGetEx32(Guid, TokenName) LibPcdGetEx32 ((Guid), _PCD_TOKEN_##TokenName)\r
+#define PcdGetEx64(Guid, TokenName) LibPcdGetEx64 ((Guid), _PCD_TOKEN_##TokenName)\r
+#define PcdGetExPtr(Guid, TokenName) LibPcdGetExPtr ((Guid), _PCD_TOKEN_##TokenName)\r
+#define PcdGetExBool(Guid, TokenName) LibPcdGetExBool ((Guid), _PCD_TOKEN_##TokenName)\r
+\r
+//\r
+// Dynamic Set Ex\r
+//\r
+#define PcdSetEx8(Guid, TokenName, Value) LibPcdSetEx8 ((Guid), _PCD_TOKEN_##TokenName, (Value))\r
+#define PcdSetEx16(Guid, TokenName, Value) LibPcdSetEx16 ((Guid), _PCD_TOKEN_##TokenName, (Value))\r
+#define PcdSetEx32(Guid, TokenName, Value) LibPcdSetEx32 ((Guid), _PCD_TOKEN_##TokenName, (Value))\r
+#define PcdSetEx64(Guid, TokenName, Value) LibPcdSetEx64 ((Guid), _PCD_TOKEN_##TokenName, (Value))\r
+#define PcdSetExPtr(Guid, TokenName, SizeOfBuffer, Buffer) \\r
+ LibPcdSetExPtr ((Guid), _PCD_TOKEN_##TokenName, (SizeOfBuffer), (Buffer))\r
+#define PcdSetExBool(Guid, TokenName, Value) \\r
+ LibPcdSetExBool((Guid), _PCD_TOKEN_##TokenName, (Value))\r
+\r
+\r
+/**\r
+ Sets the current SKU in the PCD database to the value specified by SkuId. SkuId is returned.\r
+\r
+ @param[in] SkuId The SKU value that will be used when the PCD service will retrieve and \r
+ set values associated with a PCD token.\r
+\r
+ @retval SKU_ID Return the SKU ID that just be set.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+LibPcdSetSku (\r
+ IN UINTN SkuId\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 8-bit value for the token specified by TokenNumber. \r
+\r
+ @param[in] The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT8 Returns the 8-bit value for the token specified by TokenNumber. \r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+LibPcdGet8 (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 16-bit value for the token specified by TokenNumber. \r
+\r
+ @param[in] The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT16 Returns the 16-bit value for the token specified by TokenNumber. \r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+LibPcdGet16 (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 32-bit value for the token specified by TokenNumber. \r
+\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT32 Returns the 32-bit value for the token specified by TokenNumber.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+LibPcdGet32 (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 64-bit value for the token specified by TokenNumber.\r
+\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT64 Returns the 64-bit value for the token specified by TokenNumber.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LibPcdGet64 (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the pointer to the buffer of the token specified by TokenNumber.\r
+\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval VOID* Returns the pointer to the token specified by TokenNumber.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+LibPcdGetPtr (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the Boolean value of the token specified by TokenNumber. \r
+\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval BOOLEAN Returns the Boolean value of the token specified by TokenNumber. \r
+\r
+**/\r
+BOOLEAN \r
+EFIAPI\r
+LibPcdGetBool (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the size of the token specified by TokenNumber. \r
+\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINTN Returns the size of the token specified by TokenNumber. \r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+LibPcdGetSize (\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 8-bit value for the token specified by TokenNumber and Guid.\r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT8 Return the UINT8.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+LibPcdGetEx8 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 16-bit value for the token specified by TokenNumber and Guid.\r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT16 Return the UINT16.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+LibPcdGetEx16 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 32-bit value for the token specified by TokenNumber and Guid.\r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT32 Return the UINT32.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+LibPcdGetEx32 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the 64-bit value for the token specified by TokenNumber and Guid.\r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINT64 Return the UINT64.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LibPcdGetEx64 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the pointer to the buffer of token specified by TokenNumber and Guid.\r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval VOID* Return the VOID* pointer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+LibPcdGetExPtr (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the Boolean value of the token specified by TokenNumber and Guid. \r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval BOOLEAN Return the BOOLEAN.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+LibPcdGetExBool (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Returns the size of the token specified by TokenNumber and Guid. \r
+ If Guid is NULL, then ASSERT(). \r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates \r
+ which namespace to retrieve a value from.\r
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.\r
+\r
+ @retval UINTN Return the size.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+LibPcdGetExSize (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 8-bit value for the token specified by TokenNumber \r
+ to the value specified by Value. Value is returned.\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 8-bit value to set.\r
+\r
+ @retval UINT8 Return the value been set.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+LibPcdSet8 (\r
+ IN UINTN TokenNumber,\r
+ IN UINT8 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 16-bit value for the token specified by TokenNumber \r
+ to the value specified by Value. Value is returned.\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 16-bit value to set.\r
+\r
+ @retval UINT16 Return the value been set.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+LibPcdSet16 (\r
+ IN UINTN TokenNumber,\r
+ IN UINT16 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 32-bit value for the token specified by TokenNumber \r
+ to the value specified by Value. Value is returned.\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 32-bit value to set.\r
+\r
+ @retval UINT32 Return the value been set.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+LibPcdSet32 (\r
+ IN UINTN TokenNumber,\r
+ IN UINT32 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 64-bit value for the token specified by TokenNumber \r
+ to the value specified by Value. Value is returned.\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 64-bit value to set.\r
+\r
+ @retval UINT64 Return the value been set.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LibPcdSet64 (\r
+ IN UINTN TokenNumber,\r
+ IN UINT64 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets a buffer for the token specified by TokenNumber to the value \r
+ specified by Buffer and SizeOfValue. Buffer is returned. \r
+ If SizeOfValue is greater than the maximum size support by TokenNumber, \r
+ then set SizeOfValue to the maximum size supported by TokenNumber and \r
+ return NULL to indicate that the set operation was not actually performed. \r
+\r
+ If SizeOfValue is set to MAX_ADDRESS, then SizeOfValue must be set to the \r
+ maximum size supported by TokenName and NULL must be returned.\r
+ \r
+ If SizeOfValue is NULL, then ASSERT().\r
+ If SizeOfValue > 0 and Buffer is NULL, then ASSERT().\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in,out] SizeOfBuffer The size, in bytes, of Buffer.\r
+ @param[in] Value A pointer to the buffer to set.\r
+\r
+ @retval VOID* Return the pointer for the buffer been set.\r
+\r
+**/\r
+VOID*\r
+EFIAPI\r
+LibPcdSetPtr (\r
+ IN UINTN TokenNumber,\r
+ IN OUT UINTN *SizeOfBuffer,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+\r
+/**\r
+ Sets the Boolean value for the token specified by TokenNumber \r
+ to the value specified by Value. Value is returned.\r
+ \r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The boolean value to set.\r
+\r
+ @retval BOOLEAN Return the value been set.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+LibPcdSetBool (\r
+ IN UINTN TokenNumber,\r
+ IN BOOLEAN Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 8-bit value for the token specified by TokenNumber and \r
+ Guid to the value specified by Value. Value is returned.\r
+ If Guid is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 8-bit value to set.\r
+\r
+ @retval UINT8 Return the value been set.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+LibPcdSetEx8 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN UINT8 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 16-bit value for the token specified by TokenNumber and \r
+ Guid to the value specified by Value. Value is returned.\r
+ If Guid is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 16-bit value to set.\r
+\r
+ @retval UINT8 Return the value been set.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+LibPcdSetEx16 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN UINT16 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 32-bit value for the token specified by TokenNumber and \r
+ Guid to the value specified by Value. Value is returned.\r
+ If Guid is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 32-bit value to set.\r
+\r
+ @retval UINT32 Return the value been set.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+LibPcdSetEx32 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN UINT32 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets the 64-bit value for the token specified by TokenNumber and \r
+ Guid to the value specified by Value. Value is returned.\r
+ If Guid is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The 64-bit value to set.\r
+\r
+ @retval UINT64 Return the value been set.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LibPcdSetEx64 (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN UINT64 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sets a buffer for the token specified by TokenNumber to the value specified by \r
+ Buffer and SizeOfValue. Buffer is returned. If SizeOfValue is greater than \r
+ the maximum size support by TokenNumber, then set SizeOfValue to the maximum size \r
+ supported by TokenNumber and return NULL to indicate that the set operation \r
+ was not actually performed. \r
+ \r
+ If Guid is NULL, then ASSERT().\r
+ If SizeOfValue is NULL, then ASSERT().\r
+ If SizeOfValue > 0 and Buffer is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in, out] SizeOfBuffer The size, in bytes, of Buffer.\r
+ @param[in] Buffer A pointer to the buffer to set.\r
+\r
+ @retval VOID * Return the pinter to the buffer been set.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+LibPcdSetExPtr (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN OUT UINTN *SizeOfBuffer,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+\r
+/**\r
+ Sets the Boolean value for the token specified by TokenNumber and \r
+ Guid to the value specified by Value. Value is returned.\r
+ If Guid is NULL, then ASSERT().\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that \r
+ designates which namespace to set a value from.\r
+ @param[in] TokenNumber The PCD token number to set a current value for.\r
+ @param[in] Value The Boolean value to set.\r
+\r
+ @retval Boolean Return the value been set.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+LibPcdSetExBool (\r
+ IN CONST GUID *Guid,\r
+ IN UINTN TokenNumber,\r
+ IN BOOLEAN Value\r
+ );\r
+\r
+\r
+/**\r
+ When the token specified by TokenNumber and Guid is set, \r
+ then notification function specified by NotificationFunction is called. \r
+ If Guid is NULL, then the default token space is used. \r
+ If NotificationFunction is NULL, then ASSERT().\r
+\r
+ This notification function serves two purposes. Firstly, it notifies the module which \r
+ did the registration that the value of this PCD token has been set. Secondly, \r
+ it provides a mechanism for the module which did the registration to intercept \r
+ the set operation and override the value been set if necessary. After the invocation \r
+ of the callback function, TokenData will be used by PCD service PEIM or driver to \r
+ modify the internal data in PCD database. \r
+\r
+\r
+ @param[in] CallBackGuid The PCD token GUID being set.\r
+ @param[in] CallBackToken The PCD token number being set.\r
+ @param[in, out] TokenData A pointer to the token data being set.\r
+ @param[in] TokenDataSize The size, in bytes, of the data being set.\r
+\r
+ @retval VOID\r
+\r
+**/\r
+typedef\r
+VOID\r
+(EFIAPI *PCD_CALLBACK) (\r
+ IN CONST GUID *CallBackGuid, OPTIONAL\r
+ IN UINTN CallBackToken,\r
+ IN OUT VOID *TokenData,\r
+ IN UINTN TokenDataSize\r
+ );\r
+\r
+\r
+/**\r
+ When the token specified by TokenNumber and Guid is set, \r
+ then notification function specified by NotificationFunction is called. \r
+ If Guid is NULL, then the default token space is used. \r
+ If NotificationFunction is NULL, then ASSERT().\r
+\r
+ @param[in] Guid Pointer to a 128-bit unique value that designates which \r
+ namespace to set a value from. If NULL, then the default \r
+ token space is used.\r
+ @param[in] TokenNumber The PCD token number to monitor.\r
+ @param[in] NotificationFunction The function to call when the token \r
+ specified by Guid and TokenNumber is set.\r
+\r
+ @retval VOID\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+LibPcdCallbackOnSet (\r
+ IN CONST GUID *Guid, OPTIONAL\r
+ IN UINTN TokenNumber,\r
+ IN PCD_CALLBACK NotificationFunction\r
+ );\r
+\r
+\r
+/**\r
+ Disable a notification function that was established with LibPcdCallbackonSet().\r
+\r
+ @param[in] Guid Specify the GUID token space.\r
+ @param[in] TokenNumber Specify the token number.\r
+ @param[in] NotificationFunction The callback function to be unregistered.\r
+\r
+ @retval VOID\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+LibPcdCancelCallback (\r
+ IN CONST GUID *Guid, OPTIONAL\r
+ IN UINTN TokenNumber,\r
+ IN PCD_CALLBACK NotificationFunction\r
+ );\r
+\r
+\r
+/**\r
+ Retrieves the next PCD token number from the token space specified by Guid. \r
+ If Guid is NULL, then the default token space is used. If TokenNumber is 0, \r
+ then the first token number is returned. Otherwise, the token number that \r
+ follows TokenNumber in the token space is returned. If TokenNumber is the last \r
+ token number in the token space, then 0 is returned. If TokenNumber is not 0 and \r
+ is not in the token space specified by Guid, then ASSERT().\r
+\r
+ @param[in] Pointer to a 128-bit unique value that designates which namespace \r
+ to set a value from. If NULL, then the default token space is used.\r
+ @param[in] The previous PCD token number. If 0, then retrieves the first PCD \r
+ token number.\r
+\r
+ @retval UINTN The next valid token number.\r
+\r
+**/\r
+UINTN \r
+EFIAPI\r
+LibPcdGetNextToken (\r
+ IN CONST GUID *Guid, OPTIONAL\r
+ IN UINTN TokenNumber\r
+ );\r
+\r
+\r
+\r
+/**\r
+ Retrieves the next PCD token space from a token space specified by Guid.\r
+ Guid of NULL is reserved to mark the default local token namespace on the current\r
+ platform. If Guid is NULL, then the GUID of the first non-local token space of the \r
+ current platform is returned. If Guid is the last non-local token space, \r
+ then NULL is returned. \r
+\r
+ If Guid is not NULL and is not a valid token space in the current platform, then ASSERT().\r
+\r
+\r
+ \r
+ @param[in] Guid Pointer to a 128-bit unique value that designates from which namespace \r
+ to start the search.\r
+\r
+ @retval CONST GUID * The next valid token namespace.\r
+\r
+**/\r
+GUID * \r
+EFIAPI\r
+LibPcdGetNextTokenSpace (\r
+ IN CONST GUID *Guid\r
+ );\r
+\r
+\r
+/**\r
+ Sets the PCD entry specified by PatchVariable to the value specified by Buffer \r
+ and SizeOfValue. Buffer is returned. If SizeOfValue is greater than \r
+ MaximumDatumSize, then set SizeOfValue to MaximumDatumSize and return \r
+ NULL to indicate that the set operation was not actually performed. \r
+ If SizeOfValue is set to MAX_ADDRESS, then SizeOfValue must be set to \r
+ MaximumDatumSize and NULL must be returned.\r
+ \r
+ If PatchVariable is NULL, then ASSERT().\r
+ If SizeOfValue is NULL, then ASSERT().\r
+ If SizeOfValue > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param[in] PatchVariable A pointer to the global variable in a module that is \r
+ the target of the set operation.\r
+ @param[in] MaximumDatumSize The maximum size allowed for the PCD entry specified by PatchVariable.\r
+ @param[in, out] SizeOfBuffer A pointer to the size, in bytes, of Buffer.\r
+ @param[in] Buffer A pointer to the buffer to used to set the target variable.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+LibPatchPcdSetPtr (\r
+ IN VOID *PatchVariable,\r
+ IN UINTN MaximumDatumSize,\r
+ IN OUT UINTN *SizeOfBuffer,\r
+ IN CONST VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ PCI CF8 Library Services for PCI Segment #0\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PciCf8Lib.h\r
+\r
+**/\r
+\r
+#ifndef __PCI_CF8_LIB_H__\r
+#define __PCI_CF8_LIB_H__\r
+\r
+\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ address that can be passed to the PCI Library functions.\r
+\r
+ Computes an address that is compatible with the PCI Library functions. The\r
+ unused upper bits of Bus, Device, Function and Register are stripped prior to\r
+ the generation of the address.\r
+\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..255.\r
+\r
+ @return The encode PCI address.\r
+\r
+**/\r
+#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
+ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
+/**\r
+ Reads an 8-bit PCI configuration register.\r
+\r
+ Reads and returns the 8-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Read8 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Write8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ an 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Or8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8And8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, followed a bitwise inclusive OR with another 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8AndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 8-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Read16 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Write16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ a 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Or16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8And16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, followed a bitwise inclusive OR with another 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8AndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 16-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Read32 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Write32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ a 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Or32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8And32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, followed a bitwise inclusive OR with another 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8AndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 32-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If the register specified by Address >= 0x100, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress and\r
+ Size into the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be read. Size is\r
+ returned. When possible 32-bit PCI configuration read cycles are used to read\r
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+ and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+ end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by StartAddress >= 0x100, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer receiving the data read.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciCf8ReadBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI\r
+ configuration space.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress and\r
+ Size from the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be written. Size is\r
+ returned. When possible 32-bit PCI configuration write cycles are used to\r
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+ and the end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If the register specified by StartAddress >= 0x100, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer containing the data to write.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciCf8WriteBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Pci Express Library Services for PCI Segment #0\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PciExpressLib.h\r
+\r
+**/\r
+\r
+#ifndef __PCI_EXPRESS_LIB_H__\r
+#define __PCI_EXPRESS_LIB_H__\r
+\r
+#include <Library/PciLib.h>\r
+\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ address that can be passed to the PCI Library functions.\r
+\r
+ Computes an address that is compatible with the PCI Library functions. The\r
+ unused upper bits of Bus, Device, Function and Register are stripped prior to\r
+ the generation of the address.\r
+\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..4095.\r
+\r
+ @return The encode PCI address.\r
+\r
+**/\r
+#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
+ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
+/**\r
+ Reads an 8-bit PCI configuration register.\r
+\r
+ Reads and returns the 8-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressRead8 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ an 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, followed a bitwise inclusive OR with another 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 8-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressRead16 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ a 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, followed a bitwise inclusive OR with another 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 16-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressRead32 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ a 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, followed a bitwise inclusive OR with another 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 32-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress and\r
+ Size into the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be read. Size is\r
+ returned. When possible 32-bit PCI configuration read cycles are used to read\r
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+ and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+ end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer receiving the data read.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciExpressReadBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI\r
+ configuration space.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress and\r
+ Size from the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be written. Size is\r
+ returned. When possible 32-bit PCI configuration write cycles are used to\r
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+ and the end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer containing the data to write.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciExpressWriteBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ PCI Library Services for PCI Segment #0\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PciLib.h\r
+\r
+**/\r
+\r
+#ifndef __PCI_LIB_H__\r
+#define __PCI_LIB_H__\r
+\r
+/**\r
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an\r
+ address that can be passed to the PCI Library functions.\r
+\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095\r
+ for PCI Express.\r
+\r
+ @return The encoded PCI address.\r
+\r
+**/\r
+#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \\r
+ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))\r
+\r
+/**\r
+ Reads an 8-bit PCI configuration register.\r
+\r
+ Reads and returns the 8-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciRead8 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciWrite8 (\r
+ IN UINTN Address,\r
+ IN UINT8 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ an 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAnd8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+ value, followed a bitwise inclusive OR with another 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldRead8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 8-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldWrite8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 8-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 8-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAnd8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 8-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..7.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..7.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAndThenOr8 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciRead16 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciWrite16 (\r
+ IN UINTN Address,\r
+ IN UINT16 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ a 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAnd16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+ value, followed a bitwise inclusive OR with another 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldRead16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 16-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldWrite16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 16-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 16-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAnd16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 16-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+ If StartBit is greater than 15, then ASSERT().\r
+ If EndBit is greater than 15, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..15.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..15.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAndThenOr16 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ );\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+\r
+ @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciRead32 (\r
+ IN UINTN Address\r
+ );\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the\r
+ value specified by Value. Value is returned. This function must guarantee\r
+ that all PCI read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param Value The value to write.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciWrite32 (\r
+ IN UINTN Address,\r
+ IN UINT32 Data\r
+ );\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ a 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAnd32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+ value, followed a bitwise inclusive OR with another 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and\r
+ the value specified by OrData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Bus, Device, Function and\r
+ Register.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+ specified by the StartBit and the EndBit. The value of the bit field is\r
+ returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to read.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+\r
+ @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldRead32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ );\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register. The bit\r
+ field is specified by the StartBit and the EndBit. All other bits in the\r
+ destination PCI configuration register are preserved. The new value of the\r
+ 32-bit register is returned.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldWrite32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+ writes the result back to the bit field in the 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise inclusive OR between the read result and the value specified by\r
+ OrData, and writes the result to the 32-bit PCI configuration register\r
+ specified by Address. The value written to the PCI configuration register is\r
+ returned. This function must guarantee that all PCI read and write operations\r
+ are serialized. Extra left bits in OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+ AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND between the read result and the value specified by AndData, and\r
+ writes the result to the 32-bit PCI configuration register specified by\r
+ Address. The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are\r
+ serialized. Extra left bits in AndData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAnd32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ );\r
+\r
+/**\r
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+ bitwise inclusive OR, and writes the result back to the bit field in the\r
+ 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address, performs a\r
+ bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ the value specified by AndData, and writes the result to the 32-bit PCI\r
+ configuration register specified by Address. The value written to the PCI\r
+ configuration register is returned. This function must guarantee that all PCI\r
+ read and write operations are serialized. Extra left bits in both AndData and\r
+ OrData are stripped.\r
+\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+ If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+ If StartBit is greater than 31, then ASSERT().\r
+ If EndBit is greater than 31, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address PCI configuration register to write.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ Range 0..31.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ Range 0..31.\r
+ @param AndData The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the result of the AND operation.\r
+\r
+ @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAndThenOr32 (\r
+ IN UINTN Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ );\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress and\r
+ Size into the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be read. Size is\r
+ returned. When possible 32-bit PCI configuration read cycles are used to read\r
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+ and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+ end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer receiving the data read.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciReadBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI\r
+ configuration space.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress and\r
+ Size from the buffer specified by Buffer. This function only allows the PCI\r
+ configuration registers from a single PCI function to be written. Size is\r
+ returned. When possible 32-bit PCI configuration write cycles are used to\r
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+ and the end of the range.\r
+\r
+ If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Bus, Device,\r
+ Function and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer containing the data to write.\r
+\r
+ @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciWriteBuffer (\r
+ IN UINTN StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Functions accessing PCI configuration registers on any supported PCI segment\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PciSegmentLib.h\r
+\r
+**/\r
+\r
+#ifndef __PCI_SEGMENT_LIB__\r
+#define __PCI_SEGMENT_LIB__\r
+\r
+\r
+/**\r
+ Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,\r
+ and PCI Register to an address that can be passed to the PCI Segment Library functions.\r
+\r
+ Computes an address that is compatible with the PCI Segment Library functions.\r
+ The unused upper bits of Segment, Bus, Device, Function,\r
+ and Register are stripped prior to the generation of the address.\r
+\r
+ @param Segment PCI Segment number. Range 0..65535.\r
+ @param Bus PCI Bus number. Range 0..255.\r
+ @param Device PCI Device number. Range 0..31.\r
+ @param Function PCI Function number. Range 0..7.\r
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.\r
+\r
+ @return The address that is compatible with the PCI Segment Library functions.\r
+\r
+**/\r
+#define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \\r
+ ( ((Register) & 0xfff) | \\r
+ (((Function) & 0x07) << 12) | \\r
+ (((Device) & 0x1f) << 15) | \\r
+ (((Bus) & 0xff) << 20) | \\r
+ (LShiftU64((Segment) & 0xffff, 32)) \\r
+ )\r
+\r
+/**\r
+ Reads an 8-bit PCI configuration register.\r
+\r
+ Reads and returns the 8-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ \r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+\r
+ @return The 8-bit PCI configuration register specified by Address.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentRead8 (\r
+ IN UINT64 Address\r
+ )\r
+;\r
+\r
+/**\r
+ Writes an 8-bit PCI configuration register.\r
+\r
+ Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.\r
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Value The value to write.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentWrite8 (\r
+ IN UINT64 Address,\r
+ IN UINT8 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentOr8 (\r
+ IN UINT64 Address,\r
+ IN UINT8 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentAnd8 (\r
+ IN UINT64 Address,\r
+ IN UINT8 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
+ followed a bitwise inclusive OR with another 8-bit value.\r
+ \r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentAndThenOr8 (\r
+ IN UINT64 Address,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in an 8-bit PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ The value of the bit field is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+\r
+ @return The value of the bit field.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentBitFieldRead8 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+;\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ All other bits in the destination PCI configuration register are preserved.\r
+ The new value of the 8-bit register is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The new value of the 8-bit register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentBitFieldWrite8 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address. \r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentBitFieldOr8 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR,\r
+ and writes the result back to the bit field in the 8-bit port.\r
+\r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in OrData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentBitFieldAnd8 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND,\r
+ and writes the result back to the bit field in the 8-bit register.\r
+ \r
+ Reads the 8-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 8-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in AndData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciSegmentBitFieldAndThenOr8 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT8 AndData,\r
+ IN UINT8 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a 16-bit PCI configuration register.\r
+\r
+ Reads and returns the 16-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ \r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+\r
+ @return The 16-bit PCI configuration register specified by Address.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentRead16 (\r
+ IN UINT64 Address\r
+ )\r
+;\r
+\r
+/**\r
+ Writes a 16-bit PCI configuration register.\r
+\r
+ Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.\r
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Value The value to write.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentWrite16 (\r
+ IN UINT64 Address,\r
+ IN UINT16 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with a 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentOr16 (\r
+ IN UINT64 Address,\r
+ IN UINT16 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentAnd16 (\r
+ IN UINT64 Address,\r
+ IN UINT16 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
+ followed a bitwise inclusive OR with another 16-bit value.\r
+ \r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentAndThenOr16 (\r
+ IN UINT64 Address,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 16-bit PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ The value of the bit field is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+\r
+ @return The value of the bit field.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentBitFieldRead16 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+;\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ All other bits in the destination PCI configuration register are preserved.\r
+ The new value of the 16-bit register is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The new value of the 16-bit register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentBitFieldWrite16 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address. \r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentBitFieldOr16 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,\r
+ and writes the result back to the bit field in the 16-bit port.\r
+\r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in OrData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentBitFieldAnd16 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND,\r
+ and writes the result back to the bit field in the 16-bit register.\r
+ \r
+ Reads the 16-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 16-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in AndData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciSegmentBitFieldAndThenOr16 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT16 AndData,\r
+ IN UINT16 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a 32-bit PCI configuration register.\r
+\r
+ Reads and returns the 32-bit PCI configuration register specified by Address.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ \r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+\r
+ @return The 32-bit PCI configuration register specified by Address.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentRead32 (\r
+ IN UINT64 Address\r
+ )\r
+;\r
+\r
+/**\r
+ Writes a 32-bit PCI configuration register.\r
+\r
+ Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.\r
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.\r
+ If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Value The value to write.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentWrite32 (\r
+ IN UINT64 Address,\r
+ IN UINT32 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentOr32 (\r
+ IN UINT64 Address,\r
+ IN UINT32 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentAnd32 (\r
+ IN UINT64 Address,\r
+ IN UINT32 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
+ followed a bitwise inclusive OR with another 32-bit value.\r
+ \r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Andata The value to AND with the PCI configuration register.\r
+ @param OrData The value to OR with the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentAndThenOr32 (\r
+ IN UINT64 Address,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field of a PCI configuration register.\r
+\r
+ Reads the bit field in a 32-bit PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ The value of the bit field is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+\r
+ @return The value of the bit field.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentBitFieldRead32 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit\r
+ )\r
+;\r
+\r
+/**\r
+ Writes a bit field to a PCI configuration register.\r
+\r
+ Writes Value to the bit field of the PCI configuration register.\r
+ The bit field is specified by the StartBit and the EndBit.\r
+ All other bits in the destination PCI configuration register are preserved.\r
+ The new value of the 32-bit register is returned.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param Value New value of the bit field.\r
+\r
+ @return The new value of the 32-bit register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentBitFieldWrite32 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 Value\r
+ )\r
+;\r
+\r
+/**\r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address. \r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentBitFieldOr32 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR,\r
+ and writes the result back to the bit field in the 32-bit port.\r
+\r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in OrData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentBitFieldAnd32 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND,\r
+ and writes the result back to the bit field in the 32-bit register.\r
+ \r
+ Reads the 32-bit PCI configuration register specified by Address,\r
+ performs a bitwise AND between the read result and the value specified by AndData,\r
+ and writes the result to the 32-bit PCI configuration register specified by Address.\r
+ The value written to the PCI configuration register is returned.\r
+ This function must guarantee that all PCI read and write operations are serialized.\r
+ Extra left bits in AndData are stripped.\r
+ If any reserved bits in Address are set, then ASSERT().\r
+ If StartBit is greater than 7, then ASSERT().\r
+ If EndBit is greater than 7, then ASSERT().\r
+ If EndBit is less than StartBit, then ASSERT().\r
+\r
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param StartBit The ordinal of the least significant bit in the bit field.\r
+ The ordinal of the least significant bit in a byte is bit 0.\r
+ @param EndBit The ordinal of the most significant bit in the bit field.\r
+ The ordinal of the most significant bit in a byte is bit 7.\r
+ @param AndData The value to AND with the read value from the PCI configuration register.\r
+ @param OrData The value to OR with the read value from the PCI configuration register.\r
+\r
+ @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciSegmentBitFieldAndThenOr32 (\r
+ IN UINT64 Address,\r
+ IN UINTN StartBit,\r
+ IN UINTN EndBit,\r
+ IN UINT32 AndData,\r
+ IN UINT32 OrData\r
+ )\r
+;\r
+\r
+/**\r
+ Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+ Reads the range of PCI configuration registers specified by StartAddress\r
+ and Size into the buffer specified by Buffer.\r
+ This function only allows the PCI configuration registers from a single PCI function to be read.\r
+ Size is returned.\r
+ If any reserved bits in StartAddress are set, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer receiving the data read.\r
+\r
+ @return The paramter of Size.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciSegmentReadBuffer (\r
+ IN UINT64 StartAddress,\r
+ IN UINTN Size,\r
+ OUT VOID *Buffer\r
+ )\r
+;\r
+\r
+/**\r
+ Copies the data in a caller supplied buffer to a specified range of PCI configuration space.\r
+\r
+ Writes the range of PCI configuration registers specified by StartAddress\r
+ and Size from the buffer specified by Buffer.\r
+ This function only allows the PCI configuration registers from a single PCI function to be written.\r
+ Size is returned.\r
+ If any reserved bits in StartAddress are set, then ASSERT().\r
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+\r
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.\r
+ @param Size Size in bytes of the transfer.\r
+ @param Buffer Pointer to a buffer containing the data to write.\r
+\r
+ @return The paramter of Size.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciSegmentWriteBuffer (\r
+ IN UINT64 StartAddress,\r
+ IN UINTN Size,\r
+ IN VOID *Buffer\r
+ )\r
+;\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Memory Only PE COFF loader\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: PeCoffGetEntryPointLib.h\r
+\r
+**/\r
+\r
+#ifndef __PE_COFF_GET_ENTRY_POINT_LIB_H__\r
+#define __PE_COFF_GET_ENTRY_POINT_LIB_H__\r
+\r
+/**\r
+ Retrieves and returns a pointer to the entry point to a PE/COFF image that has been loaded\r
+ into system memory with the PE/COFF Loader Library functions.\r
+\r
+ Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry\r
+ point in EntryPoint. If the entry point could not be retrieved from the PE/COFF image, then\r
+ return RETURN_INVALID_PARAMETER. Otherwise return RETURN_SUCCESS.\r
+ If Pe32Data is NULL, then ASSERT().\r
+ If EntryPoint is NULL, then ASSERT().\r
+\r
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system memory.\r
+ @param EntryPoint Pointer to entry point to the PE/COFF image to return.\r
+\r
+ @retval RETURN_SUCCESS EntryPoint was returned.\r
+ @retval RETURN_INVALID_PARAMETER The entry point could not be found in the PE/COFF image.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderGetEntryPoint (\r
+ IN VOID *Pe32Data,\r
+ OUT VOID **EntryPoint\r
+ );\r
+\r
+/**\r
+ Returns the machine type of a PE/COFF image.\r
+\r
+ Returns the machine type from the PE/COFF image specified by Pe32Data.\r
+ If Pe32Data is NULL, then ASSERT().\r
+\r
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system\r
+ memory.\r
+\r
+ @return Machine type or zero if not a valid iamge.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeCoffLoaderGetMachineType (\r
+ IN VOID *Pe32Data\r
+ );\r
+\r
+/**\r
+ Returns a pointer to the PDB file name for a PE/COFF image that has been\r
+ loaded into system memory with the PE/COFF Loader Library functions. \r
+\r
+ Returns the PDB file name for the PE/COFF image specified by Pe32Data. If\r
+ the PE/COFF image specified by Pe32Data is not a valid, then NULL is\r
+ returned. If the PE/COFF image specified by Pe32Data does not contain a\r
+ debug directory entry, then NULL is returned. If the debug directory entry\r
+ in the PE/COFF image specified by Pe32Data does not contain a PDB file name,\r
+ then NULL is returned.\r
+ If Pe32Data is NULL, then ASSERT().\r
+\r
+ @param Pe32Data Pointer to the PE/COFF image that is loaded in system\r
+ memory.\r
+\r
+ @return The PDB file name for the PE/COFF image specified by Pe32Data or NULL\r
+ if it cannot be retrieved.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+PeCoffLoaderGetPdbPointer (\r
+ IN VOID *Pe32Data\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Memory Only PE COFF loader. \r
+\r
+ Copyright (c) 2006 - 2007, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: PeCoffLib.h\r
+\r
+**/\r
+\r
+#ifndef __BASE_PE_COFF_LIB_H__\r
+#define __BASE_PE_COFF_LIB_H__\r
+\r
+#include <Common/PeCoffLoaderImageContext.h>\r
+\r
+//\r
+// Return status codes from the PE/COFF Loader services\r
+// BUGBUG: Find where used and see if can be replaced by RETURN_STATUS codes\r
+//\r
+#define IMAGE_ERROR_SUCCESS 0\r
+#define IMAGE_ERROR_IMAGE_READ 1 \r
+#define IMAGE_ERROR_INVALID_PE_HEADER_SIGNATURE 2\r
+#define IMAGE_ERROR_INVALID_MACHINE_TYPE 3\r
+#define IMAGE_ERROR_INVALID_SUBSYSTEM 4\r
+#define IMAGE_ERROR_INVALID_IMAGE_ADDRESS 5\r
+#define IMAGE_ERROR_INVALID_IMAGE_SIZE 6\r
+#define IMAGE_ERROR_INVALID_SECTION_ALIGNMENT 7\r
+#define IMAGE_ERROR_SECTION_NOT_LOADED 8\r
+#define IMAGE_ERROR_FAILED_RELOCATION 9\r
+#define IMAGE_ERROR_FAILED_ICACHE_FLUSH 10\r
+\r
+\r
+/**\r
+ Retrieves information about a PE/COFF image.\r
+\r
+ Computes the PeCoffHeaderOffset, ImageAddress, ImageSize, DestinationAddress, CodeView,\r
+ PdbPointer, RelocationsStripped, SectionAlignment, SizeOfHeaders, and DebugDirectoryEntryRva\r
+ fields of the ImageContext structure. If ImageContext is NULL, then return RETURN_INVALID_PARAMETER.\r
+ If the PE/COFF image accessed through the ImageRead service in the ImageContext structure is not\r
+ a supported PE/COFF image type, then return RETURN_UNSUPPORTED. If any errors occur while\r
+ computing the fields of ImageContext, then the error status is returned in the ImageError field of\r
+ ImageContext. \r
+\r
+ @param ImageContext Pointer to the image context structure that describes the PE/COFF\r
+ image that needs to be examined by this function.\r
+\r
+ @retval RETURN_SUCCESS The information on the PE/COFF image was collected.\r
+ @retval RETURN_INVALID_PARAMETER ImageContext is NULL.\r
+ @retval RETURN_UNSUPPORTED The PE/COFF image is not supported.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderGetImageInfo (\r
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext\r
+ )\r
+;\r
+\r
+/**\r
+ Applies relocation fixups to a PE/COFF image that was loaded with PeCoffLoaderLoadImage().\r
+\r
+ If the DestinationAddress field of ImageContext is 0, then use the ImageAddress field of\r
+ ImageContext as the relocation base address. Otherwise, use the DestinationAddress field\r
+ of ImageContext as the relocation base address. The caller must allocate the relocation\r
+ fixup log buffer and fill in the FixupData field of ImageContext prior to calling this function. \r
+ If ImageContext is NULL, then ASSERT().\r
+\r
+ @param ImageContext Pointer to the image context structure that describes the PE/COFF\r
+ image that is being relocated.\r
+\r
+ @retval RETURN_SUCCESS The PE/COFF image was relocated.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+ @retval RETURN_LOAD_ERROR The image in not a valid PE/COFF image.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+ @retval RETURN_UNSUPPORTED A relocation record type is not supported.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderRelocateImage (\r
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext\r
+ )\r
+;\r
+\r
+/**\r
+ Loads a PE/COFF image into memory.\r
+\r
+ Loads the PE/COFF image accessed through the ImageRead service of ImageContext into the buffer\r
+ specified by the ImageAddress and ImageSize fields of ImageContext. The caller must allocate\r
+ the load buffer and fill in the ImageAddress and ImageSize fields prior to calling this function.\r
+ The EntryPoint, FixupDataSize, CodeView, and PdbPointer fields of ImageContext are computed.\r
+ If ImageContext is NULL, then ASSERT().\r
+\r
+ @param ImageContext Pointer to the image context structure that describes the PE/COFF\r
+ image that is being loaded.\r
+\r
+ @retval RETURN_SUCCESS The PE/COFF image was loaded into the buffer specified by\r
+ the ImageAddress and ImageSize fields of ImageContext.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+ @retval RETURN_BUFFER_TOO_SMALL The caller did not provide a large enough buffer.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+ @retval RETURN_LOAD_ERROR The PE/COFF image is an EFI Runtime image with no relocations.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+ @retval RETURN_INVALID_PARAMETER The image address is invalid.\r
+ Extended status information is in the ImageError field of ImageContext.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderLoadImage (\r
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext\r
+ )\r
+;\r
+\r
+\r
+/**\r
+ ImageRead function that operates on a memory buffer whos base is passed into\r
+ FileHandle. \r
+\r
+ @param FileHandle Ponter to baes of the input stream\r
+ @param FileOffset Offset to the start of the buffer\r
+ @param ReadSize Number of bytes to copy into the buffer\r
+ @param Buffer Location to place results of read\r
+\r
+ @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into \r
+ the buffer.\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderImageReadFromMemory (\r
+ IN VOID *FileHandle,\r
+ IN UINTN FileOffset,\r
+ IN OUT UINTN *ReadSize,\r
+ OUT VOID *Buffer\r
+ )\r
+;\r
+\r
+\r
+/**\r
+ Reapply fixups on a fixed up PE32/PE32+ image to allow virutal calling at EFI\r
+ runtime. \r
+ \r
+ PE_COFF_LOADER_IMAGE_CONTEXT.FixupData stores information needed to reapply\r
+ the fixups with a virtual mapping.\r
+\r
+\r
+ @param ImageBase Base address of relocated image\r
+ @param VirtImageBase Virtual mapping for ImageBase\r
+ @param ImageSize Size of the image to relocate\r
+ @param RelocationData Location to place results of read\r
+ \r
+**/\r
+VOID\r
+EFIAPI\r
+PeCoffLoaderRelocateImageForRuntime (\r
+ IN PHYSICAL_ADDRESS ImageBase,\r
+ IN PHYSICAL_ADDRESS VirtImageBase,\r
+ IN UINTN ImageSize,\r
+ IN VOID *RelocationData\r
+ )\r
+;\r
+\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Entry point to the PEI Core\r
+\r
+Copyright (c) 2006, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __MODULE_ENTRY_POINT_H__\r
+#define __MODULE_ENTRY_POINT_H__\r
+\r
+/**\r
+ Enrty point to PEI core.\r
+\r
+ @param PeiStartupDescriptor Pointer of start up information.\r
+ \r
+ @return Status returned by entry points of core and drivers. \r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,\r
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList\r
+ );\r
+\r
+/**\r
+ Wrapper of enrty point to PEI core.\r
+\r
+ @param PeiStartupDescriptor Pointer of start up information.\r
+ \r
+ @return Status returned by entry points of core and drivers. \r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiMain (\r
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,\r
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList\r
+ );\r
+\r
+/**\r
+ Call constructs for all libraries. Automatics Generated by tool.\r
+\r
+ @param FfsHeader Pointer to header of FFS.\r
+ @param PeiServices Pointer to the PEI Services Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param PeiStartupDescriptor Pointer to startup information .\r
+ @param OldCoreData Pointer to Original startup information.\r
+\r
+ @return Status returned by entry points of drivers. \r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,\r
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList,\r
+ IN VOID *OldCoreData\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Header file for PEI Services Library.\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: PeiServicesLib.h\r
+\r
+**/\r
+\r
+#ifndef __PEI_SERVICES_LIB_H__\r
+#define __PEI_SERVICES_LIB_H__\r
+\r
+/**\r
+ This service enables a given PEIM to register an interface into the PEI Foundation. \r
+\r
+ @param PpiList A pointer to the list of interfaces that the caller shall install.\r
+\r
+ @retval EFI_SUCCESS The interface was successfully installed.\r
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL.\r
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have the\r
+ EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.\r
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesInstallPpi (\r
+ IN EFI_PEI_PPI_DESCRIPTOR *PpiList\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to replace an entry in the PPI database with an alternate entry.\r
+\r
+ @param OldPpi Pointer to the old PEI PPI Descriptors.\r
+ @param NewPpi Pointer to the new PEI PPI Descriptors.\r
+\r
+ @retval EFI_SUCCESS The interface was successfully installed.\r
+ @retval EFI_INVALID_PARAMETER The OldPpi or NewPpi is NULL.\r
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have the\r
+ EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.\r
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.\r
+ @retval EFI_NOT_FOUND The PPI for which the reinstallation was requested has not been\r
+ installed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesReInstallPpi (\r
+ IN EFI_PEI_PPI_DESCRIPTOR *OldPpi,\r
+ IN EFI_PEI_PPI_DESCRIPTOR *NewPpi\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to discover a given instance of an interface.\r
+\r
+ @param Guid A pointer to the GUID whose corresponding interface needs to be\r
+ found.\r
+ @param Instance The N-th instance of the interface that is required.\r
+ @param PpiDescriptor A pointer to instance of the EFI_PEI_PPI_DESCRIPTOR.\r
+ @param Ppi A pointer to the instance of the interface.\r
+\r
+ @retval EFI_SUCCESS The interface was successfully returned.\r
+ @retval EFI_NOT_FOUND The PPI descriptor is not found in the database.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesLocatePpi (\r
+ IN EFI_GUID *Guid,\r
+ IN UINTN Instance,\r
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor,\r
+ IN OUT VOID **Ppi\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to register a given service to be invoked when another service is\r
+ installed or reinstalled.\r
+\r
+ @param NotifyList A pointer to the list of notification interfaces that the caller\r
+ shall install.\r
+\r
+ @retval EFI_SUCCESS The interface was successfully installed.\r
+ @retval EFI_INVALID_PARAMETER The NotifyList pointer is NULL.\r
+ @retval EFI_INVALID_PARAMETER Any of the PEI notify descriptors in the list do not have the\r
+ EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES bit set in the Flags field.\r
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesNotifyPpi (\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to ascertain the present value of the boot mode. \r
+\r
+ @param BootMode A pointer to contain the value of the boot mode.\r
+\r
+ @retval EFI_SUCCESS The boot mode was returned successfully.\r
+ @retval EFI_INVALID_PARAMETER BootMode is NULL.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesGetBootMode (\r
+ IN OUT EFI_BOOT_MODE *BootMode\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to update the boot mode variable. \r
+\r
+ @param BootMode The value of the boot mode to set.\r
+\r
+ @retval EFI_SUCCESS The value was successfully updated\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesSetBootMode (\r
+ IN EFI_BOOT_MODE BootMode\r
+ );\r
+\r
+/**\r
+ This service enables a PEIM to ascertain the address of the list of HOBs in memory.\r
+\r
+ @param HobList A pointer to the list of HOBs that the PEI Foundation will initialize.\r
+\r
+ @retval EFI_SUCCESS The list was successfully returned.\r
+ @retval EFI_NOT_AVAILABLE_YET The HOB list is not yet published.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesGetHobList (\r
+ IN OUT VOID **HobList\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to create various types of HOBs.\r
+\r
+ @param Type The type of HOB to be installed.\r
+ @param Length The length of the HOB to be added.\r
+ @param Hob The address of a pointer that will contain the HOB header.\r
+\r
+ @retval EFI_SUCCESS The HOB was successfully created.\r
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesCreateHob (\r
+ IN UINT16 Type,\r
+ IN UINT16 Length,\r
+ IN OUT VOID **Hob\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to discover additional firmware volumes.\r
+\r
+ @param Instance This instance of the firmware volume to find. The value 0 is the\r
+ Boot Firmware Volume (BFV).\r
+ @param FwVolHeader Pointer to the firmware volume header of the volume to return.\r
+\r
+ @retval EFI_SUCCESS The volume was found.\r
+ @retval EFI_NOT_FOUND The volume was not found.\r
+ @retval EFI_INVALID_PARAMETER FwVolHeader is NULL.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesFfsFindNextVolume (\r
+ IN UINTN Instance,\r
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to discover additional firmware files.\r
+\r
+ @param SearchType A filter to find files only of this type.\r
+ @param FwVolHeader Pointer to the firmware volume header of the volume to search.\r
+ This parameter must point to a valid FFS volume.\r
+ @param FileHeader Pointer to the current file from which to begin searching.\r
+\r
+ @retval EFI_SUCCESS The file was found.\r
+ @retval EFI_NOT_FOUND The file was not found.\r
+ @retval EFI_NOT_FOUND The header checksum was not zero.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesFfsFindNextFile (\r
+ IN EFI_FV_FILETYPE SearchType,\r
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,\r
+ IN OUT EFI_FFS_FILE_HEADER **FileHeader\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to discover sections of a given type within a valid FFS file.\r
+\r
+ @param SearchType The value of the section type to find.\r
+ @param FfsFileHeader A pointer to the file header that contains the set of sections to\r
+ be searched.\r
+ @param SectionData A pointer to the discovered section, if successful.\r
+\r
+ @retval EFI_SUCCESS The section was found.\r
+ @retval EFI_NOT_FOUND The section was not found.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesFfsFindSectionData (\r
+ IN EFI_SECTION_TYPE SectionType,\r
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,\r
+ IN OUT VOID **SectionData\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to register the permanent memory configuration\r
+ that has been initialized with the PEI Foundation.\r
+\r
+ @param MemoryBegin The value of a region of installed memory.\r
+ @param MemoryLength The corresponding length of a region of installed memory.\r
+\r
+ @retval EFI_SUCCESS The region was successfully installed in a HOB.\r
+ @retval EFI_INVALID_PARAMETER MemoryBegin and MemoryLength are illegal for this system.\r
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesInstallPeiMemory (\r
+ IN EFI_PHYSICAL_ADDRESS MemoryBegin,\r
+ IN UINT64 MemoryLength\r
+ );\r
+\r
+/**\r
+ This service enables PEIMs to allocate memory after the permanent memory has been installed by a\r
+ PEIM.\r
+\r
+ @param MemoryType Type of memory to allocate.\r
+ @param Pages Number of pages to allocate.\r
+ @param Memory Pointer of memory allocated.\r
+\r
+ @retval EFI_SUCCESS The memory range was successfully allocated.\r
+ @retval EFI_INVALID_PARAMETER Type is not equal to AllocateAnyPages.\r
+ @retval EFI_NOT_AVAILABLE_YET Called with permanent memory not available.\r
+ @retval EFI_OUT_OF_RESOURCES The pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesAllocatePages (\r
+ IN EFI_MEMORY_TYPE MemoryType,\r
+ IN UINTN Pages,\r
+ IN OUT EFI_PHYSICAL_ADDRESS *Memory\r
+ );\r
+\r
+/**\r
+ This service allocates memory from the Hand-Off Block (HOB) heap.\r
+\r
+ @param Size The number of bytes to allocate from the pool.\r
+ @param Buffer If the call succeeds, a pointer to a pointer to the allocate\r
+ buffer; undefined otherwise.\r
+\r
+ @retval EFI_SUCCESS The allocation was successful\r
+ @retval EFI_OUT_OF_RESOURCES There is not enough heap to allocate the requested size.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesAllocatePool (\r
+ IN UINTN Size,\r
+ OUT VOID **Buffer\r
+ );\r
+\r
+/**\r
+ This service resets the entire platform, including all processors and devices, and reboots the\r
+ system. \r
+\r
+ @retval EFI_NOT_AVAILABLE_YET The service has not been installed yet.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiServicesResetSystem (\r
+ VOID\r
+ );\r
+\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ PEI Services Table Pointer Library services\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: PeiServicesTablePointerLib.h\r
+\r
+**/\r
+\r
+#ifndef __PEI_SERVICES_TABLE_POINTER_LIB_H__\r
+#define __PEI_SERVICES_TABLE_POINTER_LIB_H__\r
+\r
+/**\r
+ The function returns the pointer to PEI services.\r
+\r
+ The function returns the pointer to PEI services.\r
+ It will ASSERT() if the pointer to PEI services is NULL.\r
+\r
+ @retval The pointer to PeiServices.\r
+\r
+**/\r
+EFI_PEI_SERVICES **\r
+EFIAPI\r
+GetPeiServicesTablePointer (\r
+ VOID\r
+ );\r
+\r
+#endif\r
+\r
--- /dev/null
+/** @file\r
+ Entry point to a PEIM\r
+\r
+Copyright (c) 2006, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __MODULE_ENTRY_POINT_H__\r
+#define __MODULE_ENTRY_POINT_H__\r
+\r
+//\r
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented \r
+//\r
+extern const UINT32 _gPeimRevision;\r
+\r
+/**\r
+ Image entry point of Peim.\r
+\r
+ @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param PeiServices Pointer to the PEI services.\r
+\r
+ @return Status returned by entry points of Peims.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+\r
+/**\r
+ Wrapper of Peim image entry point.\r
+\r
+ @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param PeiServices Pointer to the PEI services.\r
+\r
+ @return Status returned by entry points of Peims.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiMain (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+\r
+/**\r
+ Call constructs for all libraries. Automatics Generated by tool.\r
+\r
+ @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param PeiServices Pointer to the PEI services.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+\r
+/**\r
+ Call destructors for all libraries. Automatics Generated by tool.\r
+\r
+ @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param PeiServices Pointer to the PEI services.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryDestructorList (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param FfsHeader Pointer to FFS header the loaded driver.\r
+ @param PeiServices Pointer to the PEI services.\r
+\r
+ @return Status returned by entry points of drivers. \r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN EFI_FFS_FILE_HEADER *FfsHeader,\r
+ IN EFI_PEI_SERVICES **PeiServices\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Library that provides services to measure module execution performance\r
+\r
+ Copyright (c) 2006, Intel Corporation.\r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: PerformanceLib.h\r
+\r
+**/\r
+\r
+#ifndef __PERFORMANCE_LIB_H__\r
+#define __PERFORMANCE_LIB_H__\r
+\r
+//\r
+// Performance library propery mask bits\r
+//\r
+#define PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED 0x00000001\r
+\r
+/**\r
+ Creates a record for the beginning of a performance measurement. \r
+ \r
+ Creates a record that contains the Handle, Token, and Module.\r
+ If TimeStamp is not zero, then TimeStamp is added to the record as the start time.\r
+ If TimeStamp is zero, then this function reads the current time stamp\r
+ and adds that time stamp value to the record as the start time.\r
+\r
+ @param Handle Pointer to environment specific context used\r
+ to identify the component being measured.\r
+ @param Token Pointer to a Null-terminated ASCII string\r
+ that identifies the component being measured.\r
+ @param Module Pointer to a Null-terminated ASCII string\r
+ that identifies the module being measured.\r
+ @param TimeStamp 64-bit time stamp.\r
+\r
+ @retval RETURN_SUCCESS The start of the measurement was recorded.\r
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+StartPerformanceMeasurement (\r
+ IN CONST VOID *Handle, OPTIONAL\r
+ IN CONST CHAR8 *Token, OPTIONAL\r
+ IN CONST CHAR8 *Module, OPTIONAL\r
+ IN UINT64 TimeStamp\r
+ );\r
+\r
+/**\r
+ Fills in the end time of a performance measurement. \r
+ \r
+ Looks up the record that matches Handle, Token, and Module.\r
+ If the record can not be found then return RETURN_NOT_FOUND.\r
+ If the record is found and TimeStamp is not zero,\r
+ then TimeStamp is added to the record as the end time.\r
+ If the record is found and TimeStamp is zero, then this function reads\r
+ the current time stamp and adds that time stamp value to the record as the end time.\r
+ If this function is called multiple times for the same record, then the end time is overwritten.\r
+\r
+ @param Handle Pointer to environment specific context used\r
+ to identify the component being measured.\r
+ @param Token Pointer to a Null-terminated ASCII string\r
+ that identifies the component being measured.\r
+ @param Module Pointer to a Null-terminated ASCII string\r
+ that identifies the module being measured.\r
+ @param TimeStamp 64-bit time stamp.\r
+\r
+ @retval RETURN_SUCCESS The end of the measurement was recorded.\r
+ @retval RETURN_NOT_FOUND The specified measurement record could not be found.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+EndPerformanceMeasurement (\r
+ IN CONST VOID *Handle, OPTIONAL\r
+ IN CONST CHAR8 *Token, OPTIONAL\r
+ IN CONST CHAR8 *Module, OPTIONAL\r
+ IN UINT64 TimeStamp\r
+ );\r
+\r
+/**\r
+ Attempts to retrieve a performance measurement log entry from the performance measurement log. \r
+ \r
+ Attempts to retrieve the performance log entry specified by LogEntryKey. If LogEntryKey is\r
+ zero on entry, then an attempt is made to retrieve the first entry from the performance log,\r
+ and the key for the second entry in the log is returned. If the performance log is empty,\r
+ then no entry is retrieved and zero is returned. If LogEntryKey is not zero, then the performance\r
+ log entry associated with LogEntryKey is retrieved, and the key for the next entry in the log is\r
+ returned. If LogEntryKey is the key for the last entry in the log, then the last log entry is\r
+ retrieved and an implementation specific non-zero key value that specifies the end of the performance\r
+ log is returned. If LogEntryKey is equal this implementation specific non-zero key value, then no entry\r
+ is retrieved and zero is returned. In the cases where a performance log entry can be returned,\r
+ the log entry is returned in Handle, Token, Module, StartTimeStamp, and EndTimeStamp.\r
+ If LogEntryKey is not a valid log entry key for the performance measurement log, then ASSERT().\r
+ If Handle is NULL, then ASSERT().\r
+ If Token is NULL, then ASSERT().\r
+ If Module is NULL, then ASSERT().\r
+ If StartTimeStamp is NULL, then ASSERT().\r
+ If EndTimeStamp is NULL, then ASSERT().\r
+\r
+ @param LogEntryKey On entry, the key of the performance measurement log entry to retrieve.\r
+ 0, then the first performance measurement log entry is retrieved.\r
+ On exit, the key of the next performance lof entry entry.\r
+ @param Handle Pointer to environment specific context used to identify the component\r
+ being measured. \r
+ @param Token Pointer to a Null-terminated ASCII string that identifies the component\r
+ being measured. \r
+ @param Module Pointer to a Null-terminated ASCII string that identifies the module\r
+ being measured.\r
+ @param StartTimeStamp Pointer to the 64-bit time stamp that was recorded when the measurement\r
+ was started.\r
+ @param EndTimeStamp Pointer to the 64-bit time stamp that was recorded when the measurement\r
+ was ended.\r
+\r
+ @return The key for the next performance log entry (in general case).\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetPerformanceMeasurement (\r
+ IN UINTN LogEntryKey, \r
+ OUT CONST VOID **Handle,\r
+ OUT CONST CHAR8 **Token,\r
+ OUT CONST CHAR8 **Module,\r
+ OUT UINT64 *StartTimeStamp,\r
+ OUT UINT64 *EndTimeStamp\r
+ );\r
+\r
+/**\r
+ Returns TRUE if the performance measurement macros are enabled. \r
+ \r
+ This function returns TRUE if the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+ PcdPerformanceLibraryPropertyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+ PcdPerformanceLibraryPropertyMask is set.\r
+ @retval FALSE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+ PcdPerformanceLibraryPropertyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PerformanceMeasurementEnabled (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Macro that calls EndPerformanceMeasurement().\r
+\r
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,\r
+ then EndPerformanceMeasurement() is called.\r
+\r
+**/\r
+#define PERF_END(Handle, Token, Module, TimeStamp) \\r
+ do { \\r
+ if (PerformanceMeasurementEnabled ()) { \\r
+ EndPerformanceMeasurement (Handle, Token, Module, TimeStamp); \\r
+ } \\r
+ } while (FALSE)\r
+\r
+/**\r
+ Macro that calls StartPerformanceMeasurement().\r
+\r
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,\r
+ then StartPerformanceMeasurement() is called.\r
+\r
+**/\r
+#define PERF_START(Handle, Token, Module, TimeStamp) \\r
+ do { \\r
+ if (PerformanceMeasurementEnabled ()) { \\r
+ StartPerformanceMeasurement (Handle, Token, Module, TimeStamp); \\r
+ } \\r
+ } while (FALSE)\r
+\r
+/**\r
+ Macro that marks the beginning of performance measurement source code.\r
+\r
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,\r
+ then this macro marks the beginning of source code that is included in a module.\r
+ Otherwise, the source lines between PERF_CODE_BEGIN() and PERF_CODE_END() are not included in a module.\r
+\r
+**/\r
+#define PERF_CODE_BEGIN() do { if (PerformanceMeasurementEnabled ()) { UINT8 __PerformanceCodeLocal\r
+\r
+/**\r
+ Macro that marks the end of performance measurement source code.\r
+\r
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,\r
+ then this macro marks the end of source code that is included in a module.\r
+ Otherwise, the source lines between PERF_CODE_BEGIN() and PERF_CODE_END() are not included in a module.\r
+\r
+**/\r
+#define PERF_CODE_END() __PerformanceCodeLocal = 0; __PerformanceCodeLocal++; } } while (FALSE)\r
+\r
+/**\r
+ Macro that declares a section of performance measurement source code.\r
+\r
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,\r
+ then the source code specified by Expression is included in a module.\r
+ Otherwise, the source specified by Expression is not included in a module.\r
+\r
+ @param Expression Performance measurement source code to include in a module.\r
+\r
+**/\r
+#define PERF_CODE(Expression) \\r
+ PERF_CODE_BEGIN (); \\r
+ Expression \\r
+ PERF_CODE_END ()\r
+\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Report Status Code Library public .h file\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef __POST_CODE_LIB_H__\r
+#define __POST_CODE_LIB_H__\r
+\r
+#define POST_CODE_PROPERTY_POST_CODE_ENABLED 0x00000008\r
+#define POST_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED 0x00000010\r
+\r
+/**\r
+ Sends an 32-bit value to a POST card.\r
+\r
+ Sends the 32-bit value specified by Value to a POST card, and returns Value. \r
+ Some implementations of this library function may perform I/O operations \r
+ directly to a POST card device. Other implementations may send Value to \r
+ ReportStatusCode(), and the status code reporting mechanism will eventually \r
+ display the 32-bit value on the status reporting device.\r
+ \r
+ PostCode() must actively prevent recursion. If PostCode() is called while \r
+ processing another any other Report Status Code Library function, then \r
+ PostCode() must return Value immediately.\r
+\r
+ @param Value The 32-bit value to write to the POST card.\r
+\r
+ @return Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCode (\r
+ IN UINT32 Value\r
+ );\r
+\r
+\r
+/**\r
+ Sends an 32-bit value to a POST and associated ASCII string.\r
+\r
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.\r
+ If Description is not NULL, then the ASCII string specified by Description is \r
+ also passed to the handler that displays the POST card value. Some \r
+ implementations of this library function may perform I/O operations directly \r
+ to a POST card device. Other implementations may send Value to ReportStatusCode(), \r
+ and the status code reporting mechanism will eventually display the 32-bit \r
+ value on the status reporting device. \r
+\r
+ PostCodeWithDescription()must actively prevent recursion. If \r
+ PostCodeWithDescription() is called while processing another any other Report \r
+ Status Code Library function, then PostCodeWithDescription() must return Value \r
+ immediately.\r
+\r
+ @param Value The 32-bit value to write to the POST card.\r
+ @param Description Pointer to an ASCII string that is a description of the \r
+ POST code value. This is an optional parameter that may \r
+ be NULL.\r
+\r
+ @return Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCodeWithDescription (\r
+ IN UINT32 Value,\r
+ IN CONST CHAR8 *Description OPTIONAL\r
+ );\r
+\r
+\r
+/**\r
+ Returns TRUE if POST Codes are enabled.\r
+\r
+ This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+ bit of PcdPostCodePropertyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+ PcdPostCodeProperyMask is set.\r
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+ PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Returns TRUE if POST code descriptions are enabled.\r
+\r
+ This function returns TRUE if the \r
+ POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+ PcdPostCodePropertyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+ bit of PcdPostCodeProperyMask is set.\r
+ @retval FALSE The POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+ bit of PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeDescriptionEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Sends an 32-bit value to a POST card.\r
+\r
+ If POST codes are enabled in PcdPostCodeProperyMask, then call PostCode() \r
+ passing in Value. Value is returned.\r
+\r
+ @param Value The 32-bit value to write to the POST card.\r
+\r
+ @return Value\r
+\r
+**/\r
+#define POST_CODE(Value) PostCodeEnabled() ? PostCode(Value) : Value\r
+\r
+/**\r
+ Sends an 32-bit value to a POST and associated ASCII string.\r
+\r
+ If POST codes and POST code descriptions are enabled in \r
+ PcdPostCodeProperyMask, then call PostCodeWithDescription() passing in \r
+ Value and Description. If only POST codes are enabled, then call PostCode() \r
+ passing in Value. Value is returned.\r
+\r
+ @param Value The 32-bit value to write to the POST card.\r
+ @param Description Pointer to an ASCII string that is a description of the \r
+ POST code value.\r
+\r
+**/\r
+#define POST_CODE_WITH_DESCRIPTION(Value,Description) \\r
+ PostCodeEnabled() ? \\r
+ (PostCodeDescriptionEnabled() ? \\r
+ PostCodeWithDescription(Value,Description) : \\r
+ PostCode(Value)) : \\r
+ Value\r
+\r
+#endif\r
--- /dev/null
+/** @file
+ Library that provides print services
+
+ Copyright (c) 2006 - 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLib.h
+
+**/
+
+#ifndef __PRINT_LIB_H__
+#define __PRINT_LIB_H__
+
+///
+/// Define the maximum number of characters that are required to
+/// encode a decimal, hexidecimal, GUID, or TIME value with a NULL
+/// terminator.
+///
+/// Maximum Length Decimal String = 28
+/// "-9,223,372,036,854,775,808"
+/// Maximum Length Hexidecimal String = 17
+/// "FFFFFFFFFFFFFFFF"
+/// Maximum Length GUID = 37
+/// "00000000-0000-0000-0000-000000000000"
+/// Maximum Length TIME = 18
+/// "12/12/2006 12:12"
+///
+#define MAXIMUM_VALUE_CHARACTERS 38
+
+///
+/// Flags bitmask values use in UnicodeValueToString() and
+/// AsciiValueToString()
+///
+#define LEFT_JUSTIFY 0x01
+#define COMMA_TYPE 0x08
+#define PREFIX_ZERO 0x20
+#define RADIX_HEX 0x80
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on
+ a Null-terminated Unicode format string and a VA_LIST argument list
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on the
+ contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeVSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ );
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ Unicode format string and variable argument list.
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ );
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on the
+ contents of the format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeVSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ );
+
+/**
+ Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The Unicode string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of Unicode characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().
+ If BufferSize > 1 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string
+ contains more than PcdMaximumUnicodeStringLength Unicode characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of Unicode characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+/**
+ Converts a decimal value to a Null-terminated Unicode string.
+
+ Converts the decimal number specified by Value to a Null-terminated Unicode
+ string specified by Buffer containing at most Width characters. No padding of spaces
+ is ever performed. If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The number of Unicode characters in Buffer is returned not including the Null-terminator.
+ If the conversion contains more than Width characters, then only the first
+ Width characters are returned, and the total number of characters
+ required to perform the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If HEX_RADIX is set in Flags, then the output buffer will be
+ formatted in hexadecimal format.
+ If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ Unicode string.
+ @param Flags The bitmask of flags that specify left justification, zero pad, and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of Unicode characters to place in Buffer, not including
+ the Null-terminator.
+
+ @return The number of Unicode characters in Buffer not including the Null-terminator.
+
+**/
+UINTN
+EFIAPI
+UnicodeValueToString (
+ IN OUT CHAR16 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ );
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on
+ the contents of the format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiVSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ );
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than
+ PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and a VA_LIST argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list specified by Marker based on
+ the contents of the format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+ @param Marker VA_LIST marker for the variable argument list.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiVSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ );
+
+/**
+ Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated
+ ASCII format string and variable argument list.
+
+ Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer
+ and BufferSize.
+ The ASCII string is produced by parsing the format string specified by FormatString.
+ Arguments are pulled from the variable argument list based on the contents of the
+ format string.
+ The number of ASCII characters in the produced output buffer is returned not including
+ the Null-terminator.
+ If BufferSize is 0, then no output buffer is produced and 0 is returned.
+
+ If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is NULL, then ASSERT().
+ If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than
+ PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then
+ ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string
+ contains more than PcdMaximumAsciiStringLength ASCII characters not including the
+ Null-terminator, then ASSERT().
+
+ @param StartOfBuffer A pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param BufferSize The size, in bytes, of the output buffer specified by StartOfBuffer.
+ @param FormatString Null-terminated Unicode format string.
+
+ @return The number of ASCII characters in the produced output buffer not including the
+ Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ );
+
+/**
+ Converts a decimal value to a Null-terminated ASCII string.
+
+ Converts the decimal number specified by Value to a Null-terminated ASCII string
+ specified by Buffer containing at most Width characters. No padding of spaces
+ is ever performed.
+ If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.
+ The number of ASCII characters in Buffer is returned not including the Null-terminator.
+ If the conversion contains more than Width characters, then only the first Width
+ characters are returned, and the total number of characters required to perform
+ the conversion is returned.
+ Additional conversion parameters are specified in Flags.
+ The Flags bit LEFT_JUSTIFY is always ignored.
+ All conversions are left justified in Buffer.
+ If Width is 0, PREFIX_ZERO is ignored in Flags.
+ If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas
+ are inserted every 3rd digit starting from the right.
+ If HEX_RADIX is set in Flags, then the output buffer will be
+ formatted in hexadecimal format.
+ If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.
+ If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored,
+ then Buffer is padded with '0' characters so the combination of the optional '-'
+ sign character, '0' characters, digit characters for Value, and the Null-terminator
+ add up to Width characters.
+
+ If Buffer is NULL, then ASSERT().
+ If unsupported bits are set in Flags, then ASSERT().
+ If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().
+ If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()
+
+ @param Buffer Pointer to the output buffer for the produced Null-terminated
+ ASCII string.
+ @param Flags The bitmask of flags that specify left justification, zero pad, and commas.
+ @param Value The 64-bit signed value to convert to a string.
+ @param Width The maximum number of ASCII characters to place in Buffer, not including
+ the Null-terminator.
+
+ @return The number of ASCII characters in Buffer not including the Null-terminator.
+
+**/
+UINTN
+EFIAPI
+AsciiValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ );
+
+#endif
--- /dev/null
+/** @file\r
+ Report Status Code Library public .h file\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef __REPORT_STATUS_CODE_LIB_H__\r
+#define __REPORT_STATUS_CODE_LIB_H__\r
+\r
+//\r
+// Declare bits for PcdReportStatusCodePropertyMask\r
+//\r
+#define REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED 0x00000001\r
+#define REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED 0x00000002\r
+#define REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED 0x00000004\r
+\r
+//\r
+// Extended Data structure definitions with EFI_STATUS_CODE_DATA headers removed\r
+//\r
+\r
+///\r
+/// Voltage Extended Error Data\r
+///\r
+typedef struct {\r
+ EFI_EXP_BASE10_DATA Voltage;\r
+ EFI_EXP_BASE10_DATA Threshold;\r
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;\r
+\r
+///\r
+/// Microcode Update Extended Error Data\r
+///\r
+typedef struct {\r
+ UINT32 Version;\r
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;\r
+\r
+///\r
+/// Asynchronous Timer Extended Error Data\r
+///\r
+typedef struct {\r
+ EFI_EXP_BASE10_DATA TimerLimit;\r
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;\r
+\r
+///\r
+/// Host Processor Mismatch Extended Error Data\r
+///\r
+typedef struct {\r
+ UINT32 Instance;\r
+ UINT16 Attributes;\r
+} REPORT_STATUS_CODE_LIBRARY_HOST_PROCESSOR_MISMATCH_ERROR_DATA;\r
+\r
+///\r
+/// Thermal Extended Error Data\r
+///\r
+typedef struct {\r
+ EFI_EXP_BASE10_DATA Temperature;\r
+ EFI_EXP_BASE10_DATA Threshold;\r
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_THERMAL_ERROR_DATA;\r
+\r
+///\r
+/// Processor Disabled Extended Error Data\r
+///\r
+typedef struct {\r
+ UINT32 Cause;\r
+ BOOLEAN SoftwareDisabled;\r
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;\r
+\r
+///\r
+/// Embedded cache init extended data\r
+///\r
+typedef struct {\r
+ UINT32 Level;\r
+ EFI_INIT_CACHE_TYPE Type;\r
+} REPORT_STATUS_CODE_LIBRARY_CACHE_INIT_DATA;\r
+\r
+///\r
+/// Memory Extended Error Data\r
+///\r
+typedef struct {\r
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;\r
+ EFI_MEMORY_ERROR_OPERATION Operation;\r
+ UINTN Syndrome;\r
+ EFI_PHYSICAL_ADDRESS Address;\r
+ UINTN Resolution;\r
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_EXTENDED_ERROR_DATA;\r
+\r
+///\r
+/// DIMM number\r
+///\r
+typedef struct {\r
+ UINT16 Array;\r
+ UINT16 Device;\r
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_DIMM_NUMBER;\r
+\r
+///\r
+/// Memory Module Mismatch Extended Error Data\r
+///\r
+typedef struct {\r
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;\r
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_MODULE_MISMATCH_ERROR_DATA;\r
+\r
+///\r
+/// Memory Range Extended Data\r
+///\r
+typedef struct {\r
+ EFI_PHYSICAL_ADDRESS Start;\r
+ EFI_PHYSICAL_ADDRESS Length;\r
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_RANGE_EXTENDED_DATA;\r
+\r
+///\r
+/// Device handle Extended Data. Used for many\r
+/// errors and progress codes to point to the device.\r
+///\r
+typedef struct {\r
+ EFI_HANDLE Handle;\r
+} REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA;\r
+\r
+typedef struct {\r
+ UINT8 *DevicePath;\r
+} REPORT_STATUS_CODE_LIBRARY_DEVICE_PATH_EXTENDED_DATA;\r
+\r
+typedef struct {\r
+ EFI_HANDLE ControllerHandle;\r
+ EFI_HANDLE DriverBindingHandle;\r
+ UINT16 DevicePathSize;\r
+ UINT8 *RemainingDevicePath;\r
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_START_EXTENDED_DATA;\r
+\r
+///\r
+/// Resource Allocation Failure Extended Error Data\r
+///\r
+typedef struct {\r
+ UINT32 Bar;\r
+ UINT16 DevicePathSize;\r
+ UINT16 ReqResSize;\r
+ UINT16 AllocResSize;\r
+ UINT8 *DevicePath;\r
+ UINT8 *ReqRes;\r
+ UINT8 *AllocRes;\r
+} REPORT_STATUS_CODE_LIBRARY_RESOURCE_ALLOC_FAILURE_ERROR_DATA;\r
+\r
+///\r
+/// Extended Error Data for Assert\r
+///\r
+typedef struct {\r
+ UINT32 LineNumber;\r
+ UINT32 FileNameSize;\r
+ EFI_STATUS_CODE_STRING_DATA *FileName;\r
+} REPORT_STATUS_CODE_LIBRARY_DEBUG_ASSERT_DATA;\r
+\r
+///\r
+/// System Context Data EBC/IA32/IPF\r
+///\r
+typedef struct {\r
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;\r
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_EXCEP_EXTENDED_DATA;\r
+\r
+///\r
+/// Legacy Oprom extended data\r
+///\r
+typedef struct {\r
+ EFI_HANDLE DeviceHandle;\r
+ EFI_PHYSICAL_ADDRESS RomImageBase;\r
+} REPORT_STATUS_CODE_LIBRARY_LEGACY_OPROM_EXTENDED_DATA;\r
+\r
+//\r
+// Extern for the modules Caller ID GUID\r
+//\r
+extern EFI_GUID gEfiCallerIdGuid;\r
+\r
+/**\r
+ Converts a status code to an 8-bit POST code value.\r
+\r
+ Converts the status code specified by CodeType and Value to an 8-bit POST code \r
+ and returns the 8-bit POST code in PostCode. If CodeType is an \r
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode \r
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits \r
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned. \r
+\r
+ If PostCode is NULL, then ASSERT().\r
+\r
+ @param CodeType The type of status code being converted.\r
+ @param Value The status code value being converted.\r
+ @param PostCode A pointer to the 8-bit POST code value to return. \r
+\r
+ @retval TRUE The status code specified by CodeType and Value was converted \r
+ to an 8-bit POST code and returned in PostCode.\r
+ @retval FALSE The status code specified by CodeType and Value could not be \r
+ converted to an 8-bit POST code value.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+CodeTypeToPostCode (\r
+ IN EFI_STATUS_CODE_TYPE CodeType,\r
+ IN EFI_STATUS_CODE_VALUE Value,\r
+ OUT UINT8 *PostCode\r
+ );\r
+\r
+\r
+/**\r
+ Extracts ASSERT() information from a status code structure.\r
+\r
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()\r
+ arguments specified by Filename, Description, and LineNumber. If CodeType is \r
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and \r
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract \r
+ Filename, Description, and LineNumber from the optional data area of the \r
+ status code buffer specified by Data. The optional data area of Data contains \r
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated \r
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the \r
+ ASSERT() information could be extracted from Data, then return TRUE. \r
+ Otherwise, FALSE is returned. \r
+\r
+ If Data is NULL, then ASSERT().\r
+ If Filename is NULL, then ASSERT().\r
+ If Description is NULL, then ASSERT().\r
+ If LineNumber is NULL, then ASSERT().\r
+\r
+ @param CodeType The type of status code being converted.\r
+ @param Value The status code value being converted.\r
+ @param Data Pointer to status code data buffer. \r
+ @param Filename Pointer to the source file name that generated the ASSERT().\r
+ @param Description Pointer to the description of the ASSERT().\r
+ @param LineNumber Pointer to source line number that generated the ASSERT().\r
+\r
+ @retval TRUE The status code specified by CodeType, Value, and Data was \r
+ converted ASSERT() arguments specified by Filename, Description, \r
+ and LineNumber.\r
+ @retval FALSE The status code specified by CodeType, Value, and Data could \r
+ not be converted to ASSERT() arguments.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ReportStatusCodeExtractAssertInfo (\r
+ IN EFI_STATUS_CODE_TYPE CodeType,\r
+ IN EFI_STATUS_CODE_VALUE Value, \r
+ IN CONST EFI_STATUS_CODE_DATA *Data, \r
+ OUT CHAR8 **Filename,\r
+ OUT CHAR8 **Description,\r
+ OUT UINT32 *LineNumber\r
+ );\r
+\r
+\r
+/**\r
+ Extracts DEBUG() information from a status code structure.\r
+\r
+ Converts the status code specified by Data to the DEBUG() arguments specified \r
+ by ErrorLevel, Marker, and Format. If type GUID in Data is \r
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and \r
+ Format from the optional data area of the status code buffer specified by Data. \r
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker \r
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for \r
+ the Format. If the DEBUG() information could be extracted from Data, then \r
+ return TRUE. Otherwise, FALSE is returned.\r
+\r
+ If Data is NULL, then ASSERT().\r
+ If ErrorLevel is NULL, then ASSERT().\r
+ If Marker is NULL, then ASSERT().\r
+ If Format is NULL, then ASSERT().\r
+\r
+ @param Data Pointer to status code data buffer. \r
+ @param ErrorLevel Pointer to error level mask for a debug message.\r
+ @param Marker Pointer to the variable argument list associated with Format.\r
+ @param Format Pointer to a Null-terminated ASCII format string of a \r
+ debug message.\r
+\r
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments \r
+ specified by ErrorLevel, Marker, and Format.\r
+ @retval FALSE The status code specified by Data could not be converted to \r
+ DEBUG() arguments.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ReportStatusCodeExtractDebugInfo (\r
+ IN CONST EFI_STATUS_CODE_DATA *Data, \r
+ OUT UINT32 *ErrorLevel,\r
+ OUT VA_LIST *Marker,\r
+ OUT CHAR8 **Format\r
+ );\r
+\r
+\r
+/**\r
+ Reports a status code.\r
+\r
+ Reports the status code specified by the parameters Type and Value. Status \r
+ code also require an instance, caller ID, and extended data. This function \r
+ passed in a zero instance, NULL extended data, and a caller ID of \r
+ gEfiCallerIdGuid, which is the GUID for the module. \r
+ \r
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode() \r
+ is called while processing another any other Report Status Code Library function,\r
+ then ReportStatusCode() must return immediately.\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+\r
+ @retval EFI_SUCCESS The status code was reported.\r
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a \r
+ device error.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ReportStatusCode (\r
+ IN EFI_STATUS_CODE_TYPE Type,\r
+ IN EFI_STATUS_CODE_VALUE Value\r
+ );\r
+\r
+\r
+/**\r
+ Reports a status code with a Device Path Protocol as the extended data.\r
+\r
+ Allocates and fills in the extended data section of a status code with the \r
+ Device Path Protocol specified by DevicePath. This function is responsible \r
+ for allocating a buffer large enough for the standard header and the device \r
+ path. The standard header is filled in with a GUID of \r
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero \r
+ instance and a caller ID of gEfiCallerIdGuid.\r
+\r
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If \r
+ ReportStatusCodeWithDevicePath() is called while processing another any other \r
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath() \r
+ must return EFI_DEVICE_ERROR immediately.\r
+\r
+ If DevicePath is NULL, then ASSERT().\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param DevicePath Pointer to the Device Path Protocol to be reported.\r
+\r
+ @retval EFI_SUCCESS The status code was reported with the extended \r
+ data specified by DevicePath.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the \r
+ extended data section.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ReportStatusCodeWithDevicePath (\r
+ IN EFI_STATUS_CODE_TYPE Type,\r
+ IN EFI_STATUS_CODE_VALUE Value,\r
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath\r
+ );\r
+\r
+\r
+/**\r
+ Reports a status code with an extended data buffer.\r
+\r
+ Allocates and fills in the extended data section of a status code with the \r
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData \r
+ is assumed to be one of the data structures specified in Related Definitions. \r
+ These data structure do not have the standard header, so this function is \r
+ responsible for allocating a buffer large enough for the standard header and \r
+ the extended data passed into this function. The standard header is filled \r
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported \r
+ with a zero instance and a caller ID of gEfiCallerIdGuid.\r
+\r
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If \r
+ ReportStatusCodeWithExtendedData() is called while processing another any other \r
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData() \r
+ must return EFI_DEVICE_ERROR immediately.\r
+\r
+ If ExtendedData is NULL, then ASSERT().\r
+ If ExtendedDataSize is 0, then ASSERT().\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param ExtendedData Pointer to the extended data buffer to be reported.\r
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to \r
+ be reported.\r
+\r
+ @retval EFI_SUCCESS The status code was reported with the extended \r
+ data specified by ExtendedData and ExtendedDataSize.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the \r
+ extended data section.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ReportStatusCodeWithExtendedData (\r
+ IN EFI_STATUS_CODE_TYPE Type,\r
+ IN EFI_STATUS_CODE_VALUE Value,\r
+ IN CONST VOID *ExtendedData,\r
+ IN UINTN ExtendedDataSize\r
+ );\r
+\r
+\r
+/**\r
+ Reports a status code with full parameters.\r
+\r
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize \r
+ is 0, then an extended data buffer is not reported. If ExtendedData is not \r
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated. \r
+ ExtendedData is assumed not have the standard status code header, so this function \r
+ is responsible for allocating a buffer large enough for the standard header and \r
+ the extended data passed into this function. The standard header is filled in \r
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a \r
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with \r
+ an instance specified by Instance and a caller ID specified by CallerId. If \r
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.\r
+\r
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx() \r
+ is called while processing another any other Report Status Code Library function, \r
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.\r
+\r
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().\r
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param Instance Status code instance number.\r
+ @param CallerId Pointer to a GUID that identifies the caller of this \r
+ function. If this parameter is NULL, then a caller \r
+ ID of gEfiCallerIdGuid is used.\r
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer. \r
+ If this parameter is NULL, then a the status code \r
+ standard header is filled in with \r
+ gEfiStatusCodeSpecificDataGuid.\r
+ @param ExtendedData Pointer to the extended data buffer. This is an \r
+ optional parameter that may be NULL.\r
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.\r
+\r
+ @retval EFI_SUCCESS The status code was reported.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate \r
+ the extended data section if it was specified.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ReportStatusCodeEx (\r
+ IN EFI_STATUS_CODE_TYPE Type,\r
+ IN EFI_STATUS_CODE_VALUE Value,\r
+ IN UINT32 Instance,\r
+ IN CONST EFI_GUID *CallerId OPTIONAL,\r
+ IN CONST EFI_GUID *ExtendedDataGuid OPTIONAL,\r
+ IN CONST VOID *ExtendedData OPTIONAL,\r
+ IN UINTN ExtendedDataSize\r
+ );\r
+\r
+\r
+/**\r
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled\r
+\r
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED \r
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is set.\r
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ReportProgressCodeEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled\r
+\r
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED \r
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is set.\r
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ReportErrorCodeEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled\r
+\r
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED \r
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.\r
+\r
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is set.\r
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of \r
+ PcdReportStatusCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+ReportDebugCodeEnabled (\r
+ VOID\r
+ );\r
+\r
+\r
+/**\r
+ Reports a status code with minimal parameters if the status code type is enabled.\r
+\r
+ If the status code type specified by Type is enabled in \r
+ PcdReportStatusCodeProperyMask, then call ReportStatusCode() passing in Type \r
+ and Value.\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+\r
+ @retval EFI_SUCCESS The status code was reported.\r
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a device error.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+#define REPORT_STATUS_CODE(Type,Value) \\r
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \\r
+ ReportStatusCode(Type,Value) : \\r
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \\r
+ ReportStatusCode(Type,Value) : \\r
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \\r
+ ReportStatusCode(Type,Value) : \\r
+ EFI_UNSUPPORTED\r
+\r
+\r
+/**\r
+ Reports a status code with a Device Path Protocol as the extended data if the \r
+ status code type is enabled.\r
+\r
+ If the status code type specified by Type is enabled in \r
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithDevicePath() \r
+ passing in Type, Value, and DevicePath.\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param DevicePath Pointer to the Device Path Protocol to be reported.\r
+\r
+ @retval EFI_SUCCESS The status code was reported with the extended \r
+ data specified by DevicePath.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the \r
+ extended data section.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+#define REPORT_STATUS_CODE_WITH_DEVICE_PATH(Type,Value,DevicePathParameter) \\r
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \\r
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \\r
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \\r
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \\r
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \\r
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \\r
+ EFI_UNSUPPORTED\r
+\r
+\r
+/**\r
+ Reports a status code with an extended data buffer if the status code type \r
+ is enabled.\r
+\r
+ If the status code type specified by Type is enabled in \r
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithExtendedData() \r
+ passing in Type, Value, ExtendedData, and ExtendedDataSize.\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param ExtendedData Pointer to the extended data buffer to be reported.\r
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to\r
+ be reported.\r
+\r
+ @retval EFI_SUCCESS The status code was reported with the extended \r
+ data specified by ExtendedData and ExtendedDataSize.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the \r
+ extended data section.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+#define REPORT_STATUS_CODE_WITH_EXTENDED_DATA(Type,Value,ExtendedData,ExtendedDataSize) \\r
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \\r
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \\r
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \\r
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \\r
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \\r
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \\r
+ EFI_UNSUPPORTED\r
+\r
+/**\r
+ Reports a status code specifying all parameters if the status code type is enabled.\r
+\r
+ If the status code type specified by Type is enabled in \r
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeEx() passing in Type, \r
+ Value, Instance, CallerId, ExtendedDataGuid, ExtendedData, and ExtendedDataSize.\r
+\r
+ @param Type Status code type. \r
+ @param Value Status code value.\r
+ @param Instance Status code instance number.\r
+ @param CallerId Pointer to a GUID that identifies the caller of this \r
+ function. If this parameter is NULL, then a caller \r
+ ID of gEfiCallerIdGuid is used.\r
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer. \r
+ If this parameter is NULL, then a the status code \r
+ standard header is filled in with \r
+ gEfiStatusCodeSpecificDataGuid.\r
+ @param ExtendedData Pointer to the extended data buffer. This is an \r
+ optional parameter that may be NULL.\r
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.\r
+\r
+ @retval EFI_SUCCESS The status code was reported.\r
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the \r
+ extended data section if it was specified.\r
+ @retval EFI_UNSUPPORTED Report status code is not supported\r
+\r
+**/\r
+#define REPORT_STATUS_CODE_EX(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) \\r
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \\r
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \\r
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \\r
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \\r
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \\r
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \\r
+ EFI_UNSUPPORTED\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Declare presence of resources in the platform\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: ResourcePublicationLib.h\r
+\r
+**/\r
+\r
+#ifndef __RESOURCE_PUBLICATION_LIB__\r
+#define __RESOURCE_PUBLICATION_LIB__\r
+\r
+/**\r
+ \r
+ Declares the presence of permanent system memory in the platform.\r
+\r
+ Declares that the system memory buffer specified by MemoryBegin and MemoryLength\r
+ as permanent memory that may be used for general purpose use by software.\r
+ The amount of memory available to software may be less than MemoryLength\r
+ if published memory has alignment restrictions. \r
+\r
+ @param MemoryBegin The start address of the memory being declared.\r
+ @param MemoryLength The number of bytes of memory being declared.\r
+\r
+ @retval RETURN_SUCCESS The memory buffer was published.\r
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to publish the memory buffer\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PublishSystemMemory (\r
+ IN PHYSICAL_ADDRESS MemoryBegin,\r
+ IN UINT64 MemoryLength\r
+ )\r
+;\r
+\r
+#endif\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ ScsiLib.h\r
+\r
+ Abstract:\r
+\r
+ Common Libarary for SCSI\r
+\r
+ Revision History\r
+\r
+--*/\r
+\r
+#ifndef _SCSI_LIB_H\r
+#define _SCSI_LIB_H\r
+\r
+//\r
+// the time unit is 100ns, since the SCSI I/O defines timeout in 100ns unit.\r
+//\r
+#define EFI_SCSI_STALL_1_MICROSECOND 10\r
+#define EFI_SCSI_STALL_1_MILLISECOND 10000\r
+#define EFI_SCSI_STALL_1_SECOND 10000000\r
+\r
+//\r
+// this macro cannot be directly used by the gBS->Stall(),\r
+// since the value output by this macro is in 100ns unit,\r
+// not 1us unit (1us = 1000ns)\r
+//\r
+#define EfiScsiStallSeconds(a) (a) * EFI_SCSI_STALL_1_SECOND\r
+\r
+EFI_STATUS\r
+SubmitTestUnitReadyCommand (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ OUT VOID *SenseData,\r
+ OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+SubmitInquiryCommand (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus,\r
+ IN OUT VOID *InquiryDataBuffer,\r
+ IN OUT UINT32 *InquiryDataLength,\r
+ IN BOOLEAN EnableVitalProductData\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+ InquiryDataBuffer - TODO: add argument description\r
+ InquiryDataLength - TODO: add argument description\r
+ EnableVitalProductData - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+SubmitModeSense10Command (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus,\r
+ IN VOID *DataBuffer,\r
+ IN OUT UINT32 *DataLength,\r
+ IN UINT8 DBDField, OPTIONAL\r
+ IN UINT8 PageControl,\r
+ IN UINT8 PageCode\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+ DataBuffer - TODO: add argument description\r
+ DataLength - TODO: add argument description\r
+ DBDField - TODO: add argument description\r
+ PageControl - TODO: add argument description\r
+ PageCode - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+SubmitRequestSenseCommand (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+//\r
+// Commands for direct access command\r
+//\r
+EFI_STATUS\r
+SubmitReadCapacityCommand (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus,\r
+ OUT VOID *DataBuffer,\r
+ IN OUT UINT32 *DataLength,\r
+ IN BOOLEAN PMI\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+ DataBuffer - TODO: add argument description\r
+ DataLength - TODO: add argument description\r
+ PMI - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+SubmitRead10Command (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus,\r
+ OUT VOID *DataBuffer,\r
+ IN OUT UINT32 *DataLength,\r
+ IN UINT32 StartLba,\r
+ IN UINT32 SectorSize\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+ DataBuffer - TODO: add argument description\r
+ DataLength - TODO: add argument description\r
+ StartLba - TODO: add argument description\r
+ SectorSize - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+SubmitWrite10Command (\r
+ IN EFI_SCSI_IO_PROTOCOL *ScsiIo,\r
+ IN UINT64 Timeout,\r
+ IN VOID *SenseData,\r
+ IN OUT UINT8 *SenseDataLength,\r
+ OUT UINT8 *HostAdapterStatus,\r
+ OUT UINT8 *TargetStatus,\r
+ OUT VOID *DataBuffer,\r
+ IN OUT UINT32 *DataLength,\r
+ IN UINT32 StartLba,\r
+ IN UINT32 SectorSize\r
+ )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+ TODO: Add function description\r
+\r
+Arguments:\r
+\r
+ ScsiIo - TODO: add argument description\r
+ Timeout - TODO: add argument description\r
+ SenseData - TODO: add argument description\r
+ SenseDataLength - TODO: add argument description\r
+ HostAdapterStatus - TODO: add argument description\r
+ TargetStatus - TODO: add argument description\r
+ DataBuffer - TODO: add argument description\r
+ DataLength - TODO: add argument description\r
+ StartLba - TODO: add argument description\r
+ SectorSize - TODO: add argument description\r
+\r
+Returns:\r
+\r
+ TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ SMBUS Functions\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: SmbusLib.h\r
+\r
+**/\r
+\r
+#ifndef __SMBUS_LIB__\r
+#define __SMBUS_LIB__\r
+\r
+//\r
+// PEC BIT is bit 22 in SMBUS address\r
+//\r
+#define SMBUS_LIB_PEC_BIT (1 << 22)\r
+\r
+/**\r
+ Macro that converts SMBUS slave address, SMBUS command, SMBUS data length,\r
+ and PEC to a value that can be passed to the SMBUS Library functions.\r
+\r
+ Computes an address that is compatible with the SMBUS Library functions.\r
+ The unused upper bits of SlaveAddress, Command, and Length are stripped\r
+ prior to the generation of the address.\r
+ \r
+ @param SlaveAddress SMBUS Slave Address. Range 0..127.\r
+ @param Command SMBUS Command. Range 0..255.\r
+ @param Length SMBUS Data Length. Range 0..32.\r
+ @param Pec TRUE if Packet Error Checking is enabled. Otherwise FALSE.\r
+\r
+**/\r
+#define SMBUS_LIB_ADDRESS(SlaveAddress,Command,Length,Pec) \\r
+ ( ((Pec) ? SMBUS_LIB_PEC_BIT: 0) | \\r
+ (((SlaveAddress) & 0x7f) << 1) | \\r
+ (((Command) & 0xff) << 8) | \\r
+ (((Length) & 0x3f) << 16) \\r
+ )\r
+\r
+/**\r
+ Executes an SMBUS quick read command.\r
+\r
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SmBusQuickRead (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS quick write command.\r
+\r
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If PEC is set in SmBusAddress, then ASSERT().\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SmBusQuickWrite (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS receive byte command.\r
+\r
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address field of SmBusAddress is required.\r
+ The byte received from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte received from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+SmBusReceiveByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS send byte command.\r
+\r
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r
+ The byte specified by Value is sent.\r
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Command in SmBusAddress is not zero, then ASSERT().\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 8-bit value to send.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+SmBusSendByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS read data byte command.\r
+\r
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 8-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+SmBusReadDataByte (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS write data byte command.\r
+\r
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r
+ The 8-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 8-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+SmBusWriteDataByte (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT8 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS read data word command.\r
+\r
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value read from the SMBUS is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+ \r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The byte read from the SMBUS.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+SmBusReadDataWord (\r
+ IN UINTN SmBusAddress,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS write data word command.\r
+\r
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Value is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 16-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The parameter of Value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+SmBusWriteDataWord (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS process call command.\r
+\r
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r
+ The 16-bit value specified by Value is written.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ The 16-bit value returned by the process call command is returned.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Value The 16-bit value to write.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The 16-bit value returned by the process call command.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+SmBusProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN UINT16 Value,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS read block command.\r
+\r
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r
+ Bytes are read from the SMBUS and stored in Buffer.\r
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is not zero, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes read.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SmBusReadBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS write block command.\r
+\r
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from Buffer.\r
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.\r
+ If Status is not NULL, then the status of the executed command is returned in Status. \r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If Buffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SmBusWriteBlock (\r
+ IN UINTN SmBusAddress,\r
+ OUT VOID *Buffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+/**\r
+ Executes an SMBUS block process call command.\r
+\r
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r
+ If Status is not NULL, then the status of the executed command is returned in Status.\r
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r
+ If WriteBuffer is NULL, then ASSERT().\r
+ If ReadBuffer is NULL, then ASSERT().\r
+ If any reserved bits of SmBusAddress are set, then ASSERT().\r
+\r
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,\r
+ SMBUS Command, SMBUS Data Length, and PEC.\r
+ @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r
+ @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r
+ @param Status Return status for the executed command.\r
+ This is an optional parameter and may be NULL.\r
+\r
+ @return The number of bytes written.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SmBusBlockProcessCall (\r
+ IN UINTN SmBusAddress,\r
+ IN VOID *WriteBuffer,\r
+ OUT VOID *ReadBuffer,\r
+ OUT RETURN_STATUS *Status OPTIONAL\r
+ )\r
+;\r
+\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Timer Library Functions\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: TimerLib.h\r
+\r
+**/\r
+\r
+#ifndef __TIMER_LIB__\r
+#define __TIMER_LIB__\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of microseconds.\r
+\r
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+ @param MicroSeconds The minimum number of microseconds to delay.\r
+\r
+ @return MicroSeconds\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+MicroSecondDelay (\r
+ IN UINTN MicroSeconds\r
+ );\r
+\r
+/**\r
+ Stalls the CPU for at least the given number of nanoseconds.\r
+\r
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
+\r
+ @param NanoSeconds The minimum number of nanoseconds to delay.\r
+\r
+ @return NanoSeconds\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+NanoSecondDelay (\r
+ IN UINTN NanoSeconds\r
+ );\r
+\r
+/**\r
+ Retrieves the current value of a 64-bit free running performance counter.\r
+\r
+ Retrieves the current value of a 64-bit free running performance counter. The\r
+ counter can either count up by 1 or count down by 1. If the physical\r
+ performance counter counts by a larger increment, then the counter values\r
+ must be translated. The properties of the counter can be retrieved from\r
+ GetPerformanceCounterProperties().\r
+\r
+ @return The current value of the free running performance counter.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounter (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Retrieves the 64-bit frequency in Hz and the range of performance counter\r
+ values.\r
+\r
+ If StartValue is not NULL, then the value that the performance counter starts\r
+ with immediately after is it rolls over is returned in StartValue. If\r
+ EndValue is not NULL, then the value that the performance counter end with\r
+ immediately before it rolls over is returned in EndValue. The 64-bit\r
+ frequency of the performance counter in Hz is always returned. If StartValue\r
+ is less than EndValue, then the performance counter counts up. If StartValue\r
+ is greater than EndValue, then the performance counter counts down. For\r
+ example, a 64-bit free running counter that counts up would have a StartValue\r
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
+\r
+ @param StartValue The value the performance counter starts with when it\r
+ rolls over.\r
+ @param EndValue The value that the performance counter ends with before\r
+ it rolls over.\r
+\r
+ @return The frequency in Hz.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounterProperties (\r
+ OUT UINT64 *StartValue, OPTIONAL\r
+ OUT UINT64 *EndValue OPTIONAL\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Entry point to a UEFI Application.\r
+\r
+Copyright (c) 2007, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __UEFI_APPLICATION_ENTRY_POINT_H__\r
+#define __UEFI_APPLICATION_ENTRY_POINT_H__\r
+\r
+//\r
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented \r
+//\r
+extern const UINT32 _gUefiDriverRevision;\r
+\r
+/**\r
+ Enrty point to UEFI Application.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Enrty point wrapper of UEFI Application.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiMain (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Invoke the destuctors of all libraries and call gBS->Exit\r
+ to return control to firmware core.\r
+\r
+ @param Status Status returned by the application that is exiting.\r
+ \r
+ @retval VOID\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+Exit (\r
+ IN EFI_STATUS Status\r
+ );\r
+\r
+\r
+/**\r
+ Call constructors for all libraries. Autogen tool inserts the implementation\r
+ of this function into Autogen.c.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+ \r
+ @retval VOID\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Call destructors for all libraries. Autogen tool inserts the implementation\r
+ of this function into Autogen.c.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval VOID\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryDestructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Call driver entry point. For UEFI application, user\r
+ can only specify one entry point. Tool will automatically insert\r
+ this to Autogen.c.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @return Status returned by entry points specified by\r
+ the user. \r
+ \r
+**/\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Library that provides a global pointer to the UEFI Boot Services Tables\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: UefiBootServicesTableLib.h\r
+\r
+**/\r
+\r
+#ifndef __UEFI_BOOT_SERVICES_TABLE_LIB_H__\r
+#define __UEFI_BOOT_SERVICES_TABLE_LIB_H__\r
+\r
+//\r
+// Cache the Image Handle\r
+//\r
+extern EFI_HANDLE gImageHandle;\r
+\r
+//\r
+// Cache pointer to the EFI System Table\r
+//\r
+extern EFI_SYSTEM_TABLE *gST;\r
+\r
+//\r
+// Cache pointer to the EFI Boot Services Table\r
+//\r
+extern EFI_BOOT_SERVICES *gBS;\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Return UEFI Decompress Protocol \r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: UefiDecompressLib.h\r
+\r
+**/\r
+\r
+#ifndef __UEFI_DECPOMPRESS_LIB_H__\r
+#define __UEFI_DECPOMPRESS_LIB_H__\r
+\r
+/**\r
+ Retrieves the size of the uncompressed buffer and the size of the scratch buffer.\r
+\r
+ Retrieves the size of the uncompressed buffer and the temporary scratch buffer \r
+ required to decompress the buffer specified by Source and SourceSize.\r
+ If the size of the uncompressed buffer or the size of the scratch buffer cannot\r
+ be determined from the compressed data specified by Source and SourceData, \r
+ then RETURN_INVALID_PARAMETER is returned. Otherwise, the size of the uncompressed\r
+ buffer is returned in DestinationSize, the size of the scratch buffer is returned\r
+ in ScratchSize, and RETURN_SUCCESS is returned.\r
+ This function does not have scratch buffer available to perform a thorough \r
+ checking of the validity of the source data. It just retrieves the "Original Size"\r
+ field from the beginning bytes of the source data and output it as DestinationSize.\r
+ And ScratchSize is specific to the decompression implementation.\r
+\r
+ If Source is NULL, then ASSERT().\r
+ If DestinationSize is NULL, then ASSERT().\r
+ If ScratchSize is NULL, then ASSERT().\r
+\r
+ @param Source The source buffer containing the compressed data.\r
+ @param SourceSize The size, in bytes, of the source buffer.\r
+ @param DestinationSize A pointer to the size, in bytes, of the uncompressed buffer\r
+ that will be generated when the compressed buffer specified\r
+ by Source and SourceSize is decompressed..\r
+ @param ScratchSize A pointer to the size, in bytes, of the scratch buffer that\r
+ is required to decompress the compressed buffer specified \r
+ by Source and SourceSize.\r
+\r
+ @retval RETURN_SUCCESS The size of destination buffer and the size of scratch \r
+ buffer are successull retrieved.\r
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+UefiDecompressGetInfo (\r
+ IN CONST VOID *Source,\r
+ IN UINT32 SourceSize,\r
+ OUT UINT32 *DestinationSize,\r
+ OUT UINT32 *ScratchSize\r
+ );\r
+\r
+/**\r
+ Decompresses a compressed source buffer.\r
+\r
+ This function is designed so that the decompression algorithm can be implemented\r
+ without using any memory services. As a result, this function is not allowed to\r
+ call any memory allocation services in its implementation. It is the caller's r\r
+ esponsibility to allocate and free the Destination and Scratch buffers.\r
+ If the compressed source data specified by Source is sucessfully decompressed \r
+ into Destination, then RETURN_SUCCESS is returned. If the compressed source data \r
+ specified by Source is not in a valid compressed data format,\r
+ then RETURN_INVALID_PARAMETER is returned.\r
+\r
+ If Source is NULL, then ASSERT().\r
+ If Destination is NULL, then ASSERT().\r
+ If the required scratch buffer size > 0 and Scratch is NULL, then ASSERT().\r
+\r
+ @param Source The source buffer containing the compressed data.\r
+ @param Destination The destination buffer to store the decompressed data\r
+ @param Scratch A temporary scratch buffer that is used to perform the decompression.\r
+ This is an optional parameter that may be NULL if the \r
+ required scratch buffer size is 0.\r
+ \r
+ @retval RETURN_SUCCESS Decompression is successfull\r
+ @retval RETURN_INVALID_PARAMETER The source data is corrupted\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+UefiDecompress (\r
+ IN CONST VOID *Source,\r
+ IN OUT VOID *Destination,\r
+ IN OUT VOID *Scratch\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Entry point to a DXE Boot Services Driver\r
+\r
+Copyright (c) 2006, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __MODULE_ENTRY_POINT_H__\r
+#define __MODULE_ENTRY_POINT_H__\r
+\r
+//\r
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented \r
+//\r
+extern const UINT32 _gUefiDriverRevision;\r
+\r
+//\r
+// Declare the number of entry points in the image. \r
+//\r
+extern const UINT8 _gDriverEntryPointCount;\r
+\r
+//\r
+// Declare the number of unload handler in the image. \r
+//\r
+extern const UINT8 _gDriverUnloadImageCount;\r
+\r
+//\r
+// Declare the arrary of Boot Sevice Exit Event callbacks . \r
+//\r
+extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[];\r
+\r
+//\r
+// Declare the arrary of Virtual Address Change Event callbacks . \r
+//\r
+extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[];\r
+\r
+/**\r
+ Enrty point to DXE SMM Driver.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+_ModuleEntryPoint (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Enrty point wrapper of DXE Driver.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.\r
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiMain (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Computes the cummulative return status for the driver entry point and perform\r
+ a long jump back into DriverEntryPoint().\r
+\r
+ @param Status Status returned by the driver that is exiting.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ExitDriver (\r
+ IN EFI_STATUS Status\r
+ );\r
+\r
+\r
+/**\r
+ Call constructs for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryConstructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Call destructors for all libraries. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+ProcessLibraryDestructorList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+/**\r
+ Call the list of driver entry points. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ @param SystemTable Pointer to the EFI System Table.\r
+\r
+ @return Status returned by entry points of drivers. \r
+ \r
+**/\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleEntryPointList (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ );\r
+\r
+\r
+/**\r
+ Call the unload handlers for all the modules. Automatics Generated by tool.\r
+\r
+ @param ImageHandle ImageHandle of the loaded driver.\r
+ \r
+ @return Status returned by unload handlers of drivers.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+ProcessModuleUnloadList (\r
+ IN EFI_HANDLE ImageHandle\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ MDE UEFI library functions and macros\r
+\r
+ Copyright (c) 2006 - 2007, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef __UEFI_LIB_H__\r
+#define __UEFI_LIB_H__\r
+\r
+//\r
+// Unicode String Table\r
+//\r
+typedef struct {\r
+ CHAR8 *Language;\r
+ CHAR16 *UnicodeString;\r
+} EFI_UNICODE_STRING_TABLE;\r
+\r
+//\r
+// EFI Lock Status\r
+//\r
+typedef enum {\r
+ EfiLockUninitialized = 0,\r
+ EfiLockReleased = 1,\r
+ EfiLockAcquired = 2\r
+} EFI_LOCK_STATE;\r
+\r
+//\r
+// EFI Lock \r
+//\r
+typedef struct {\r
+ EFI_TPL Tpl;\r
+ EFI_TPL OwnerTpl;\r
+ EFI_LOCK_STATE Lock;\r
+} EFI_LOCK;\r
+\r
+\r
+/**\r
+ This function searches the list of configuration tables stored in the EFI System \r
+ Table for a table with a GUID that matches TableGuid. If a match is found, \r
+ then a pointer to the configuration table is returned in Table, and EFI_SUCCESS \r
+ is returned. If a matching GUID is not found, then EFI_NOT_FOUND is returned.\r
+\r
+ @param TableGuid Pointer to table's GUID type..\r
+ @param Table Pointer to the table associated with TableGuid in the EFI System Table.\r
+\r
+ @retval EFI_SUCCESS A configuration table matching TableGuid was found.\r
+ @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetSystemConfigurationTable ( \r
+ IN EFI_GUID *TableGuid,\r
+ OUT VOID **Table\r
+ );\r
+\r
+/**\r
+ This function causes the notification function to be executed for every protocol \r
+ of type ProtocolGuid instance that exists in the system when this function is \r
+ invoked. In addition, every time a protocol of type ProtocolGuid instance is \r
+ installed or reinstalled, the notification function is also executed.\r
+\r
+ @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired.\r
+ @param NotifyTpl Supplies the task priority level of the event notifications.\r
+ @param NotifyFunction Supplies the function to notify when the event is signaled.\r
+ @param NotifyContext The context parameter to pass to NotifyFunction.\r
+ @param Registration A pointer to a memory location to receive the registration value.\r
+\r
+ @return The notification event that was created. \r
+\r
+**/\r
+EFI_EVENT\r
+EFIAPI\r
+EfiCreateProtocolNotifyEvent(\r
+ IN EFI_GUID *ProtocolGuid,\r
+ IN EFI_TPL NotifyTpl,\r
+ IN EFI_EVENT_NOTIFY NotifyFunction,\r
+ IN VOID *NotifyContext, OPTIONAL\r
+ OUT VOID **Registration\r
+ );\r
+\r
+/**\r
+ This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext.\r
+ This event is signaled with EfiNamedEventSignal(). This provide the ability for \r
+ one or more listeners on the same event named by the GUID specified by Name.\r
+\r
+ @param Name Supplies GUID name of the event.\r
+ @param NotifyTpl Supplies the task priority level of the event notifications.\r
+ @param NotifyFunction Supplies the function to notify when the event is signaled.\r
+ @param NotifyContext The context parameter to pass to NotifyFunction. \r
+ @param Registration A pointer to a memory location to receive the registration value.\r
+\r
+ @retval EFI_SUCCESS A named event was created.\r
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiNamedEventListen (\r
+ IN CONST EFI_GUID *Name,\r
+ IN EFI_TPL NotifyTpl,\r
+ IN EFI_EVENT_NOTIFY NotifyFunction,\r
+ IN CONST VOID *NotifyContext, OPTIONAL\r
+ OUT VOID *Registration OPTIONAL\r
+ );\r
+\r
+/**\r
+ This function signals the named event specified by Name. The named event must \r
+ have been created with EfiNamedEventListen().\r
+\r
+ @param Name Supplies GUID name of the event.\r
+\r
+ @retval EFI_SUCCESS A named event was signaled.\r
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiNamedEventSignal (\r
+ IN CONST EFI_GUID *Name\r
+ );\r
+\r
+/** \r
+ Returns the current TPL.\r
+\r
+ This function returns the current TPL. There is no EFI service to directly \r
+ retrieve the current TPL. Instead, the RaiseTPL() function is used to raise \r
+ the TPL to TPL_HIGH_LEVEL. This will return the current TPL. The TPL level \r
+ can then immediately be restored back to the current TPL level with a call \r
+ to RestoreTPL().\r
+\r
+ @param VOID\r
+\r
+ @retvale EFI_TPL The current TPL.\r
+\r
+**/\r
+EFI_TPL\r
+EFIAPI\r
+EfiGetCurrentTpl (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ This function initializes a basic mutual exclusion lock to the released state \r
+ and returns the lock. Each lock provides mutual exclusion access at its task \r
+ priority level. Since there is no preemption or multiprocessor support in EFI,\r
+ acquiring the lock only consists of raising to the locks TPL.\r
+\r
+ @param Lock A pointer to the lock data structure to initialize.\r
+ @param Priority EFI TPL associated with the lock.\r
+\r
+ @return The lock.\r
+\r
+**/\r
+EFI_LOCK *\r
+EFIAPI\r
+EfiInitializeLock (\r
+ IN OUT EFI_LOCK *Lock,\r
+ IN EFI_TPL Priority\r
+ );\r
+\r
+/**\r
+ This macro initializes the contents of a basic mutual exclusion lock to the \r
+ released state. Each lock provides mutual exclusion access at its task \r
+ priority level. Since there is no preemption or multiprocessor support in EFI,\r
+ acquiring the lock only consists of raising to the locks TPL.\r
+\r
+ @param Lock A pointer to the lock data structure to initialize.\r
+ @param Priority The task priority level of the lock.\r
+\r
+ @return The lock.\r
+\r
+**/\r
+#define EFI_INITIALIZE_LOCK_VARIABLE(Priority) \\r
+ {Priority, EFI_TPL_APPLICATION, EfiLockReleased }\r
+\r
+\r
+/**\r
+ \r
+ Macro that calls DebugAssert() if an EFI_LOCK structure is not in the locked state.\r
+\r
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set, \r
+ then this macro evaluates the EFI_LOCK structure specified by Lock. If Lock \r
+ is not in the locked state, then DebugAssert() is called passing in the source \r
+ filename, source line number, and Lock.\r
+\r
+ If Lock is NULL, then ASSERT().\r
+\r
+ @param LockParameter A pointer to the lock to acquire.\r
+\r
+**/\r
+#define ASSERT_LOCKED(LockParameter) \\r
+ do { \\r
+ if (DebugAssertEnabled ()) { \\r
+ ASSERT (LockParameter != NULL); \\r
+ if ((LockParameter)->Lock != EfiLockAcquired) { \\r
+ _ASSERT (LockParameter not locked); \\r
+ } \\r
+ } \\r
+ } while (FALSE)\r
+\r
+\r
+/**\r
+ This function raises the system's current task priority level to the task \r
+ priority level of the mutual exclusion lock. Then, it places the lock in the \r
+ acquired state.\r
+\r
+ @param Priority The task priority level of the lock.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiAcquireLock (\r
+ IN EFI_LOCK *Lock\r
+ );\r
+\r
+/**\r
+ This function raises the system's current task priority level to the task \r
+ priority level of the mutual exclusion lock. Then, it attempts to place the \r
+ lock in the acquired state.\r
+\r
+ @param Lock A pointer to the lock to acquire.\r
+\r
+ @retval EFI_SUCCESS The lock was acquired.\r
+ @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiAcquireLockOrFail (\r
+ IN EFI_LOCK *Lock\r
+ );\r
+\r
+/**\r
+ This function transitions a mutual exclusion lock from the acquired state to \r
+ the released state, and restores the system's task priority level to its \r
+ previous level.\r
+\r
+ @param Lock A pointer to the lock to release.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiReleaseLock (\r
+ IN EFI_LOCK *Lock\r
+ );\r
+\r
+/**
+ Tests whether a controller handle is being managed by a specific driver.
+
+ This function tests whether the driver specified by DriverBindingHandle is\r
+ currently managing the controller specified by ControllerHandle. This test\r
+ is performed by evaluating if the the protocol specified by ProtocolGuid is\r
+ present on ControllerHandle and is was opened by DriverBindingHandle with an\r
+ attribute of EFI_OPEN_PROTOCOL_BY_DRIVER. \r
+ If ProtocolGuid is NULL, then ASSERT().\r
+
+ @param ControllerHandle A handle for a controller to test.
+ @param DriverBindingHandle Specifies the driver binding handle for the
+ driver.
+ @param ProtocolGuid Specifies the protocol that the driver specified
+ by DriverBindingHandle opens in its Start()
+ function.
+
+ @retval EFI_SUCCESS ControllerHandle is managed by the driver
+ specifed by DriverBindingHandle.
+ @retval EFI_UNSUPPORTED ControllerHandle is not managed by the driver
+ specifed by DriverBindingHandle.
+
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiTestManagedDevice (\r
+ IN CONST EFI_HANDLE ControllerHandle,\r
+ IN CONST EFI_HANDLE DriverBindingHandle,\r
+ IN CONST EFI_GUID *ProtocolGuid\r
+ );\r
+\r
+/**
+ Tests whether a child handle is a child device of the controller.
+
+ This function tests whether ChildHandle is one of the children of\r
+ ControllerHandle. This test is performed by checking to see if the protocol\r
+ specified by ProtocolGuid is present on ControllerHandle and opened by\r
+ ChildHandle with an attribute of EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.\r
+ If ProtocolGuid is NULL, then ASSERT().\r
+
+ @param ControllerHandle A handle for a (parent) controller to test.
+ @param ChildHandle A child handle to test.
+ @param ConsumsedGuid Supplies the protocol that the child controller
+ opens on its parent controller.
+
+ @retval EFI_SUCCESS ChildHandle is a child of the ControllerHandle.
+ @retval EFI_UNSUPPORTED ChildHandle is not a child of the
+ ControllerHandle.
+
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiTestChildHandle (\r
+ IN CONST EFI_HANDLE ControllerHandle,\r
+ IN CONST EFI_HANDLE ChildHandle,\r
+ IN CONST EFI_GUID *ProtocolGuid\r
+ );\r
+\r
+/**\r
+ This function looks up a Unicode string in UnicodeStringTable. If Language is \r
+ a member of SupportedLanguages and a Unicode string is found in UnicodeStringTable\r
+ that matches the language code specified by Language, then it is returned in \r
+ UnicodeString.\r
+\r
+ @param Language A pointer to the ISO 639-2 language code for the \r
+ Unicode string to look up and return.\r
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes \r
+ that the Unicode string table supports. Language \r
+ must be a member of this set.\r
+ @param UnicodeStringTable A pointer to the table of Unicode strings.\r
+ @param UnicodeString A pointer to the Unicode string from UnicodeStringTable\r
+ that matches the language specified by Language.\r
+\r
+ @retval EFI_SUCCESS The Unicode string that matches the language \r
+ specified by Language was found\r
+ in the table of Unicoide strings UnicodeStringTable, \r
+ and it was returned in UnicodeString.\r
+ @retval EFI_INVALID_PARAMETER Language is NULL.\r
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.\r
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.\r
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.\r
+ @retval EFI_UNSUPPORTED The language specified by Language is not a \r
+ member of SupportedLanguages.\r
+ @retval EFI_UNSUPPORTED The language specified by Language is not \r
+ supported by UnicodeStringTable.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LookupUnicodeString (\r
+ IN CONST CHAR8 *Language,\r
+ IN CONST CHAR8 *SupportedLanguages,\r
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,\r
+ OUT CHAR16 **UnicodeString\r
+ );\r
+\r
+/**\r
+ This function adds a Unicode string to UnicodeStringTable.\r
+ If Language is a member of SupportedLanguages then UnicodeString is added to \r
+ UnicodeStringTable. New buffers are allocated for both Language and \r
+ UnicodeString. The contents of Language and UnicodeString are copied into \r
+ these new buffers. These buffers are automatically freed when \r
+ FreeUnicodeStringTable() is called.\r
+\r
+ @param Language A pointer to the ISO 639-2 language code for the Unicode \r
+ string to add.\r
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes\r
+ that the Unicode string table supports.\r
+ Language must be a member of this set.\r
+ @param UnicodeStringTable A pointer to the table of Unicode strings.\r
+ @param UnicodeString A pointer to the Unicode string to add.\r
+\r
+ @retval EFI_SUCCESS The Unicode string that matches the language \r
+ specified by Language was found in the table of \r
+ Unicode strings UnicodeStringTable, and it was \r
+ returned in UnicodeString.\r
+ @retval EFI_INVALID_PARAMETER Language is NULL.\r
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.\r
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.\r
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.\r
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is \r
+ already present in UnicodeStringTable.\r
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another \r
+ Unicode string to UnicodeStringTable.\r
+ @retval EFI_UNSUPPORTED The language specified by Language is not a \r
+ member of SupportedLanguages.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+AddUnicodeString (\r
+ IN CONST CHAR8 *Language,\r
+ IN CONST CHAR8 *SupportedLanguages,\r
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,\r
+ IN CONST CHAR16 *UnicodeString\r
+ );\r
+\r
+/**\r
+ This function frees the table of Unicode strings in UnicodeStringTable.\r
+ If UnicodeStringTable is NULL, then EFI_SUCCESS is returned.\r
+ Otherwise, each language code, and each Unicode string in the Unicode string \r
+ table are freed, and EFI_SUCCESS is returned.\r
+\r
+ @param UnicodeStringTable A pointer to the table of Unicode strings.\r
+\r
+ @retval EFI_SUCCESS The Unicode string table was freed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+FreeUnicodeStringTable (\r
+ IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable\r
+ );\r
+\r
+/**\r
+ This function computes and returns the width of the Unicode character \r
+ specified by UnicodeChar.\r
+\r
+ @param UnicodeChar A Unicode character.\r
+\r
+ @retval 0 The width if UnicodeChar could not be determined.\r
+ @retval 1 UnicodeChar is a narrow glyph.\r
+ @retval 2 UnicodeChar is a wide glyph.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetGlyphWidth (\r
+ IN CHAR16 UnicodeChar\r
+ );\r
+\r
+/**\r
+ This function computes and returns the display length of\r
+ the Null-terminated Unicode string specified by String.\r
+ If String is NULL, then 0 is returned.\r
+ If any of the widths of the Unicode characters in String\r
+ can not be determined, then 0 is returned.\r
+\r
+ @param String A pointer to a Null-terminated Unicode string.\r
+\r
+ @return The display length of the Null-terminated Unicode string specified by String.\r
+ \r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeStringDisplayLength (\r
+ IN CONST CHAR16 *String\r
+ );\r
+\r
+//\r
+// Functions that abstract early Framework contamination of UEFI.\r
+//\r
+/**\r
+ Signal a Ready to Boot Event. \r
+ \r
+ Create a Ready to Boot Event. Signal it and close it. This causes other \r
+ events of the same event group to be signaled in other modules. \r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiSignalEventReadyToBoot (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Signal a Legacy Boot Event. \r
+ \r
+ Create a legacy Boot Event. Signal it and close it. This causes other \r
+ events of the same event group to be signaled in other modules. \r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiSignalEventLegacyBoot (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Create a Legacy Boot Event. \r
+ \r
+ Tiano extended the CreateEvent Type enum to add a legacy boot event type. \r
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was\r
+ added and now it's possible to not voilate the UEFI specification by \r
+ declaring a GUID for the legacy boot event class. This library supports\r
+ the EDK/EFI 1.10 form and EDK II/UEFI 2.0 form and allows common code to \r
+ work both ways.\r
+\r
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+\r
+ @retval EFI_SUCCESS Event was created.\r
+ @retval Other Event was not created.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiCreateEventLegacyBoot (\r
+ OUT EFI_EVENT *LegacyBootEvent\r
+ );\r
+\r
+/**\r
+ Create an EFI event in the Legacy Boot Event Group and allows\r
+ the caller to specify a notification function. \r
+ \r
+ This function abstracts the creation of the Legacy Boot Event.\r
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.\r
+ This library abstracts the caller from how this event is created to prevent\r
+ to code form having to change with the version of the specification supported.\r
+ If LegacyBootEvent is NULL, then ASSERT().\r
+\r
+ @param NotifyTpl The task priority level of the event.\r
+ @param NotifyFunction The notification function to call when the event is signaled.\r
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.\r
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+\r
+ @retval EFI_SUCCESS Event was created.\r
+ @retval Other Event was not created.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiCreateEventLegacyBootEx (\r
+ IN EFI_TPL NotifyTpl,\r
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL\r
+ IN VOID *NotifyContext, OPTIONAL\r
+ OUT EFI_EVENT *LegacyBootEvent\r
+ );\r
+\r
+/**\r
+ Create a Read to Boot Event. \r
+ \r
+ Tiano extended the CreateEvent Type enum to add a ready to boot event type. \r
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was\r
+ added and now it's possible to not voilate the UEFI specification and use \r
+ the ready to boot event class defined in UEFI 2.0. This library supports\r
+ the EDK/EFI 1.10 form and EDKII/UEFI 2.0 form and allows common code to \r
+ work both ways.\r
+\r
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+\r
+ @retval EFI_SUCCESS Event was created.\r
+ @retval Other Event was not created.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiCreateEventReadyToBoot (\r
+ OUT EFI_EVENT *ReadyToBootEvent\r
+ );\r
+\r
+/**\r
+ Create an EFI event in the Ready To Boot Event Group and allows\r
+ the caller to specify a notification function. \r
+ \r
+ This function abstracts the creation of the Ready to Boot Event.\r
+ The Framework moved from a proprietary to UEFI 2.0 based mechanism.\r
+ This library abstracts the caller from how this event is created to prevent\r
+ to code form having to change with the version of the specification supported.\r
+ If ReadyToBootEvent is NULL, then ASSERT().\r
+\r
+ @param NotifyTpl The task priority level of the event.\r
+ @param NotifyFunction The notification function to call when the event is signaled.\r
+ @param NotifyContext The content to pass to NotifyFunction when the event is signaled.\r
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).\r
+\r
+ @retval EFI_SUCCESS Event was created.\r
+ @retval Other Event was not created.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiCreateEventReadyToBootEx (\r
+ IN EFI_TPL NotifyTpl,\r
+ IN EFI_EVENT_NOTIFY NotifyFunction, OPTIONAL\r
+ IN VOID *NotifyContext, OPTIONAL\r
+ OUT EFI_EVENT *ReadyToBootEvent\r
+ );\r
+\r
+/**\r
+ Initialize a Firmware Volume (FV) Media Device Path node.\r
+ \r
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum\r
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with\r
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed \r
+ device path is defined for Tiano extensions of device path. If the code \r
+ is compiled to conform with the UEFI 2.0 specification use the new device path\r
+ else use the old form for backwards compatability.\r
+\r
+ @param FvDevicePathNode Pointer to a FV device path node to initialize\r
+ @param NameGuid FV file name to use in FvDevicePathNode\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EfiInitializeFwVolDevicepathNode (\r
+ IN OUT MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode,\r
+ IN CONST EFI_GUID *NameGuid\r
+ );\r
+\r
+/**\r
+ Check to see if the Firmware Volume (FV) Media Device Path is valid \r
+ \r
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum\r
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with\r
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed \r
+ device path is defined for Tiano extensions of device path. If the code \r
+ is compiled to conform with the UEFI 2.0 specification use the new device path\r
+ else use the old form for backwards compatability. The return value to this\r
+ function points to a location in FvDevicePathNode and it does not allocate\r
+ new memory for the GUID pointer that is returned.\r
+\r
+ @param FvDevicePathNode Pointer to FV device path to check.\r
+\r
+ @retval NULL FvDevicePathNode is not valid.\r
+ @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.\r
+\r
+**/\r
+EFI_GUID *\r
+EFIAPI\r
+EfiGetNameGuidFromFwVolDevicePathNode (\r
+ IN CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode\r
+ );\r
+\r
+/** \r
+ Prints a formatted Unicode string to the console output device specified by \r
+ ConOut defined in the EFI_SYSTEM_TABLE.\r
+\r
+ This function prints a formatted Unicode string to the console output device \r
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of Unicode \r
+ characters that printed to ConOut. If the length of the formatted Unicode \r
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first \r
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.\r
+\r
+ @param Format Null-terminated Unicode format string.\r
+ @param ... VARARG list consumed to process Format.\r
+ If Format is NULL, then ASSERT().\r
+ If Format is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+Print (\r
+ IN CONST CHAR16 *Format,\r
+ ...\r
+ );\r
+\r
+/** \r
+ Prints a formatted Unicode string to the console output device specified by \r
+ StdErr defined in the EFI_SYSTEM_TABLE.\r
+\r
+ This function prints a formatted Unicode string to the console output device \r
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of Unicode \r
+ characters that printed to StdErr. If the length of the formatted Unicode \r
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first \r
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.\r
+\r
+ @param Format Null-terminated Unicode format string.\r
+ @param ... VARARG list consumed to process Format.\r
+ If Format is NULL, then ASSERT().\r
+ If Format is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+ErrorPrint (\r
+ IN CONST CHAR16 *Format,\r
+ ...\r
+ );\r
+\r
+/** \r
+ Prints a formatted ASCII string to the console output device specified by \r
+ ConOut defined in the EFI_SYSTEM_TABLE.\r
+\r
+ This function prints a formatted ASCII string to the console output device \r
+ specified by ConOut in EFI_SYSTEM_TABLE and returns the number of ASCII \r
+ characters that printed to ConOut. If the length of the formatted ASCII \r
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first \r
+ PcdUefiLibMaxPrintBufferSize characters are sent to ConOut.\r
+\r
+ @param Format Null-terminated ASCII format string.\r
+ @param ... VARARG list consumed to process Format.\r
+ If Format is NULL, then ASSERT().\r
+ If Format is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiPrint (\r
+ IN CONST CHAR8 *Format,\r
+ ...\r
+ );\r
+\r
+/** \r
+ Prints a formatted ASCII string to the console output device specified by \r
+ StdErr defined in the EFI_SYSTEM_TABLE.\r
+\r
+ This function prints a formatted ASCII string to the console output device \r
+ specified by StdErr in EFI_SYSTEM_TABLE and returns the number of ASCII \r
+ characters that printed to StdErr. If the length of the formatted ASCII \r
+ string is greater than PcdUefiLibMaxPrintBufferSize, then only the first \r
+ PcdUefiLibMaxPrintBufferSize characters are sent to StdErr.\r
+\r
+ @param Format Null-terminated ASCII format string.\r
+ @param ... VARARG list consumed to process Format.\r
+ If Format is NULL, then ASSERT().\r
+ If Format is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiErrorPrint (\r
+ IN CONST CHAR8 *Format,\r
+ ...\r
+ );\r
+\r
+#endif\r
--- /dev/null
+/** @file\r
+ Library to abstract runtime services\r
+\r
+ Copyright (c) 2006, Intel Corporation \r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name: UefiRuntimeLib.h\r
+\r
+**/\r
+\r
+#ifndef __UEFI_RUNTIME_LIB__\r
+#define __UEFI_RUNTIME_LIB__\r
+\r
+\r
+extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[];\r
+\r
+extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[];\r
+\r
+/**\r
+ Check to see if the execute context is in Runtime phase or not.\r
+\r
+ @param None.\r
+\r
+ @retval TRUE The driver is in SMM.\r
+ @retval FALSE The driver is not in SMM.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+EfiAtRuntime (\r
+ VOID \r
+ );\r
+\r
+/**\r
+ Check to see if the SetVirtualAddressMsp() is invoked or not.\r
+\r
+ @retval TRUE SetVirtualAddressMsp() has been called.\r
+ @retval FALSE SetVirtualAddressMsp() has not been called.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+EfiGoneVirtual (\r
+ VOID \r
+ );\r
+\r
+/**\r
+ Return current time and date information, and time-keeping \r
+ capabilities of hardware platform.\r
+\r
+ @param Time A pointer to storage to receive a snapshot of the current time.\r
+ @param Capabilities An optional pointer to a buffer to receive the real time clock device's\r
+ capabilities.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetTime (\r
+ OUT EFI_TIME *Time,\r
+ OUT EFI_TIME_CAPABILITIES *Capabilities\r
+ );\r
+\r
+/**\r
+ Set current time and date information.\r
+\r
+ @param Time A pointer to cache of time setting.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to execute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiSetTime (\r
+ IN EFI_TIME *Time\r
+ );\r
+\r
+/**\r
+ Return current wakeup alarm clock setting.\r
+\r
+ @param Enabled Indicate if the alarm clock is enabled or disabled.\r
+ @param Pending Indicate if the alarm signal is pending and requires acknowledgement.\r
+ @param Time Current alarm clock setting.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetWakeupTime (\r
+ OUT BOOLEAN *Enabled,\r
+ OUT BOOLEAN *Pending,\r
+ OUT EFI_TIME *Time\r
+ );\r
+\r
+/**\r
+ Set current wakeup alarm clock.\r
+\r
+ @param Enable Enable or disable current alarm clock..\r
+ @param Time Point to alarm clock setting.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiSetWakeupTime (\r
+ IN BOOLEAN Enable,\r
+ IN EFI_TIME *Time\r
+ );\r
+\r
+/**\r
+ Return value of variable.\r
+\r
+ @param VariableName the name of the vendor's variable, it's a \r
+ Null-Terminated Unicode String\r
+ @param VendorGuid Unify identifier for vendor.\r
+ @param Attributes Point to memory location to return the attributes of variable. If the point \r
+ is NULL, the parameter would be ignored.\r
+ @param DataSize As input, point to the maxinum size of return Data-Buffer.\r
+ As output, point to the actual size of the returned Data-Buffer.\r
+ @param Data Point to return Data-Buffer.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetVariable (\r
+ IN CHAR16 *VariableName,\r
+ IN EFI_GUID *VendorGuid,\r
+ OUT UINT32 *Attributes,\r
+ IN OUT UINTN *DataSize,\r
+ OUT VOID *Data\r
+ )\r
+;\r
+\r
+/**\r
+ Enumerates variable's name.\r
+\r
+ @param VariableNameSize As input, point to maxinum size of variable name.\r
+ As output, point to actual size of varaible name.\r
+ @param VariableName As input, supplies the last VariableName that was returned by \r
+ GetNextVariableName().\r
+ As output, returns the name of variable. The name \r
+ string is Null-Terminated Unicode string.\r
+ @param VendorGuid As input, supplies the last VendorGuid that was returned by \r
+ GetNextVriableName().\r
+ As output, returns the VendorGuid of the current variable.\r
+ \r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetNextVariableName (\r
+ IN OUT UINTN *VariableNameSize,\r
+ IN OUT CHAR16 *VariableName,\r
+ IN OUT EFI_GUID *VendorGuid\r
+ );\r
+\r
+/**\r
+ Sets value of variable.\r
+\r
+ @param VariableName the name of the vendor's variable, it's a \r
+ Null-Terminated Unicode String\r
+ @param VendorGuid Unify identifier for vendor.\r
+ @param Attributes Point to memory location to return the attributes of variable. If the point \r
+ is NULL, the parameter would be ignored.\r
+ @param DataSize The size in bytes of Data-Buffer.\r
+ @param Data Point to the content of the variable.\r
+\r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiSetVariable (\r
+ IN CHAR16 *VariableName,\r
+ IN EFI_GUID *VendorGuid,\r
+ IN UINT32 Attributes,\r
+ IN UINTN DataSize,\r
+ IN VOID *Data\r
+ );\r
+\r
+/**\r
+ Returns the next high 32 bits of platform's monotonic counter.\r
+\r
+ @param HighCount Pointer to returned value.\r
+\r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiGetNextHighMonotonicCount (\r
+ OUT UINT32 *HighCount\r
+ );\r
+\r
+/**\r
+ Resets the entire platform.\r
+\r
+ @param ResetType The type of reset to perform.\r
+ @param ResetStatus The status code for reset.\r
+ @param DataSize The size in bytes of reset data.\r
+ @param ResetData Pointer to data buffer that includes \r
+ Null-Terminated Unicode string.\r
+\r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+VOID\r
+EfiResetSystem (\r
+ IN EFI_RESET_TYPE ResetType,\r
+ IN EFI_STATUS ResetStatus,\r
+ IN UINTN DataSize,\r
+ IN CHAR16 *ResetData\r
+ );\r
+\r
+/**\r
+ Determines the new virtual address that is to be used on subsequent memory accesses.\r
+\r
+ @param DebugDisposition Supplies type information for the pointer being converted.\r
+ @param Address The pointer to a pointer that is to be fixed to be the \r
+ value needed for the new virtual address mapping being \r
+ applied.\r
+\r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiConvertPointer (\r
+ IN UINTN DebugDisposition,\r
+ IN OUT VOID **Address\r
+ );\r
+\r
+\r
+/**\r
+ Change the runtime addressing mode of EFI firmware from physical to virtual.\r
+\r
+ @param MemoryMapSize The size in bytes of VirtualMap.\r
+ @param DescriptorSize The size in bytes of an entry in the VirtualMap.\r
+ @param DescriptorVersion The version of the structure entries in VirtualMap.\r
+ @param VirtualMap An array of memory descriptors which contain new virtual\r
+ address mapping information for all runtime ranges. Type\r
+ EFI_MEMORY_DESCRIPTOR is defined in the\r
+ GetMemoryMap() function description.\r
+\r
+ @retval EFI_SUCCESS The virtual address map has been applied.\r
+ @retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in\r
+ virtual address mapped mode.\r
+ @retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is\r
+ invalid.\r
+ @retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory\r
+ map that requires a mapping.\r
+ @retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found\r
+ in the memory map.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiSetVirtualAddressMap (\r
+ IN UINTN MemoryMapSize,\r
+ IN UINTN DescriptorSize,\r
+ IN UINT32 DescriptorVersion,\r
+ IN CONST EFI_MEMORY_DESCRIPTOR *VirtualMap\r
+ );\r
+\r
+\r
+/**\r
+ Conver the standard Lib double linked list to a virtual mapping.\r
+\r
+ @param DebugDisposition Supplies type information for the pointer being converted.\r
+ @param ListHead Head of linked list to convert.\r
+\r
+ @retval EFI_SUCCESS Success to execute the function.\r
+ @retval !EFI_SUCCESS Failed to e3xecute the function.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiConvertList (\r
+ IN UINTN DebugDisposition,\r
+ IN OUT LIST_ENTRY *ListHead\r
+ );\r
+\r
+/**\r
+ \r
+ Passes capsules to the firmware with both virtual and physical mapping. \r
+ Depending on the intended consumption, the firmware may\r
+ process the capsule immediately. If the payload should persist across a\r
+ system reset, the reset value returned from EFI_QueryCapsuleCapabilities must\r
+ be passed into ResetSystem() and will cause the capsule to be processed by \r
+ the firmware as part of the reset process.\r
+ \r
+ @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules\r
+ being passed into update capsule. Each capsules is assumed to\r
+ stored in contiguous virtual memory. The capsules in the\r
+ CapsuleHeaderArray must be the same capsules as the\r
+ ScatterGatherList. The CapsuleHeaderArray must\r
+ have the capsules in the same order as the ScatterGatherList.\r
+ @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in\r
+ CaspuleHeaderArray.\r
+ @param ScatterGatherList Physical pointer to a set of\r
+ EFI_CAPSULE_BLOCK_DESCRIPTOR that describes the\r
+ location in physical memory of a set of capsules. See Related\r
+ Definitions for an explanation of how more than one capsule is\r
+ passed via this interface. The capsules in the\r
+ ScatterGatherList must be in the same order as the\r
+ CapsuleHeaderArray. This parameter is only referenced if\r
+ the capsules are defined to persist across system reset.\r
+\r
+ @retval EFI_SUCCESS Valid capsule was passed. I Valid capsule was passed. If\r
+ CAPSULE_FLAGS_PERSIT_ACROSS_RESET is not set, the\r
+ capsule has been successfully processed by the firmware.\r
+ @retval EFI_INVALID_PARAMETER CapsuleSize is NULL or ResetTye is NULL.\r
+ @retval EFI_DEVICE_ERROR The capsule update was started, but failed due to a device error.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiUpdateCapsule (\r
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,\r
+ IN UINTN CapsuleCount,\r
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ The QueryCapsuleCapabilities() function allows a caller to test to see if a capsule or\r
+ capsules can be updated via UpdateCapsule(). The Flags values in the capsule header and\r
+ size of the entire capsule is checked.\r
+ If the caller needs to query for generic capsule capability a fake EFI_CAPSULE_HEADER can be\r
+ constructed where CapsuleImageSize is equal to HeaderSize that is equal to sizeof\r
+ (EFI_CAPSULE_HEADER). To determine reset requirements,\r
+ CAPSULE_FLAGS_PERSIST_ACROSS_RESET should be set in the Flags field of the\r
+ EFI_CAPSULE_HEADER.\r
+ The firmware must support any capsule that has the\r
+ CAPSULE_FLAGS_PERSIST_ACROSS_RESET flag set in EFI_CAPSULE_HEADER. The\r
+ firmware sets the policy for what capsules are supported that do not have the\r
+ CAPSULE_FLAGS_PERSIST_ACROSS_RESET flag set.\r
+ \r
+ @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules\r
+ being passed into update capsule. The capsules are assumed to\r
+ stored in contiguous virtual memory.\r
+ @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in\r
+ CaspuleHeaderArray.\r
+ @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can\r
+ support as an argument to UpdateCapsule() via\r
+ CapsuleHeaderArray and ScatterGatherList.\r
+ Undefined on input.\r
+ @param ResetType Returns the type of reset required for the capsule update.\r
+\r
+ @retval EFI_SUCCESS Valid answer returned..\r
+ @retval EFI_INVALID_PARAMETER MaximumCapsuleSize is NULL.\r
+ @retval EFI_UNSUPPORTED The capsule type is not supported on this platform, and\r
+ MaximumCapsuleSize and ResetType are undefined.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiQueryCapsuleCapabilities (\r
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,\r
+ IN UINTN CapsuleCount,\r
+ OUT UINT64 *MaximumCapsuleSize,\r
+ OUT EFI_RESET_TYPE *ResetType\r
+ );\r
+\r
+\r
+/**\r
+ \r
+ The QueryVariableInfo() function allows a caller to obtain the information about the\r
+ maximum size of the storage space available for the EFI variables, the remaining size of the storage\r
+ space available for the EFI variables and the maximum size of each individual EFI variable,\r
+ associated with the attributes specified.\r
+ The returned MaximumVariableStorageSize, RemainingVariableStorageSize,\r
+ MaximumVariableSize information may change immediately after the call based on other\r
+ runtime activities including asynchronous error events. Also, these values associated with different\r
+ attributes are not additive in nature.\r
+ \r
+ @param Attributes Attributes bitmask to specify the type of variables on\r
+ which to return information. Refer to the\r
+ GetVariable() function description.\r
+ @param MaximumVariableStorageSize \r
+ On output the maximum size of the storage space\r
+ available for the EFI variables associated with the\r
+ attributes specified.\r
+ @param RemainingVariableStorageSize \r
+ Returns the remaining size of the storage space\r
+ available for the EFI variables associated with the\r
+ attributes specified..\r
+ @param MaximumVariableSize Returns the maximum size of the individual EFI\r
+ variables associated with the attributes specified.\r
+\r
+ @retval EFI_SUCCESS Valid answer returned.\r
+ @retval EFI_INVALID_PARAMETER An invalid combination of attribute bits was supplied.\r
+ @retval EFI_UNSUPPORTED EFI_UNSUPPORTED The attribute is not supported on this platform, and the\r
+ MaximumVariableStorageSize,\r
+ RemainingVariableStorageSize, MaximumVariableSize\r
+ are undefined.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EfiQueryVariableInfo (\r
+ IN UINT32 Attrubutes,\r
+ OUT UINT64 *MaximumVariableStorageSize,\r
+ OUT UINT64 *RemainingVariableStorageSize,\r
+ OUT UINT64 *MaximumVariableSize\r
+ );\r
+\r
+#endif\r
+\r
--- /dev/null
+/** @file\r
+ Library that provides a global pointer to the UEFI Runtime Services Tables\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: UefiRuntimeServicesTableLib.h\r
+\r
+**/\r
+\r
+#ifndef __UEFI_RUNTIME_SERVICES_TABLE_LIB_H__\r
+#define __UEFI_RUNTIME_SERVICES_TABLE_LIB_H__\r
+\r
+//\r
+// Cached copy of the EFI Runtime Services Table\r
+//\r
+extern EFI_RUNTIME_SERVICES *gRT;\r
+\r
+#endif\r
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+ Module Name:\r
+\r
+ UsbDxeLib.h\r
+\r
+ Abstract:\r
+\r
+ Common Dxe Libarary for USB\r
+ Add Constants & structure definitions for Usb HID\r
+\r
+ Revision History\r
+\r
+--*/\r
+\r
+#ifndef _USB_DXE_LIB_H\r
+#define _USB_DXE_LIB_H\r
+\r
+//\r
+// define the timeout time as 3ms\r
+//\r
+#define TIMEOUT_VALUE 3 * 1000\r
+\r
+//\r
+// HID constants definition, see HID rev1.0\r
+//\r
+//\r
+// HID report item format\r
+//\r
+#define HID_ITEM_FORMAT_SHORT 0\r
+#define HID_ITEM_FORMAT_LONG 1\r
+\r
+//\r
+// Special tag indicating long items\r
+//\r
+#define HID_ITEM_TAG_LONG 15\r
+\r
+//\r
+// HID report descriptor item type (prefix bit 2,3)\r
+//\r
+#define HID_ITEM_TYPE_MAIN 0\r
+#define HID_ITEM_TYPE_GLOBAL 1\r
+#define HID_ITEM_TYPE_LOCAL 2\r
+#define HID_ITEM_TYPE_RESERVED 3\r
+\r
+//\r
+// HID report descriptor main item tags\r
+//\r
+#define HID_MAIN_ITEM_TAG_INPUT 8\r
+#define HID_MAIN_ITEM_TAG_OUTPUT 9\r
+#define HID_MAIN_ITEM_TAG_FEATURE 11\r
+#define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10\r
+#define HID_MAIN_ITEM_TAG_END_COLLECTION 12\r
+\r
+//\r
+// HID report descriptor main item contents\r
+//\r
+#define HID_MAIN_ITEM_CONSTANT 0x001\r
+#define HID_MAIN_ITEM_VARIABLE 0x002\r
+#define HID_MAIN_ITEM_RELATIVE 0x004\r
+#define HID_MAIN_ITEM_WRAP 0x008\r
+#define HID_MAIN_ITEM_NONLINEAR 0x010\r
+#define HID_MAIN_ITEM_NO_PREFERRED 0x020\r
+#define HID_MAIN_ITEM_NULL_STATE 0x040\r
+#define HID_MAIN_ITEM_VOLATILE 0x080\r
+#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100\r
+\r
+//\r
+// HID report descriptor collection item types\r
+//\r
+#define HID_COLLECTION_PHYSICAL 0\r
+#define HID_COLLECTION_APPLICATION 1\r
+#define HID_COLLECTION_LOGICAL 2\r
+\r
+//\r
+// HID report descriptor global item tags\r
+//\r
+#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0\r
+#define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1\r
+#define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2\r
+#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3\r
+#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4\r
+#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5\r
+#define HID_GLOBAL_ITEM_TAG_UNIT 6\r
+#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7\r
+#define HID_GLOBAL_ITEM_TAG_REPORT_ID 8\r
+#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9\r
+#define HID_GLOBAL_ITEM_TAG_PUSH 10\r
+#define HID_GLOBAL_ITEM_TAG_POP 11\r
+\r
+//\r
+// HID report descriptor local item tags\r
+//\r
+#define HID_LOCAL_ITEM_TAG_USAGE 0\r
+#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1\r
+#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2\r
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3\r
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4\r
+#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5\r
+#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7\r
+#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8\r
+#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9\r
+#define HID_LOCAL_ITEM_TAG_DELIMITER 10\r
+\r
+//\r
+// HID usage tables\r
+//\r
+#define HID_USAGE_PAGE 0xffff0000\r
+\r
+#define HID_UP_GENDESK 0x00010000\r
+#define HID_UP_KEYBOARD 0x00070000\r
+#define HID_UP_LED 0x00080000\r
+#define HID_UP_BUTTON 0x00090000\r
+#define HID_UP_CONSUMER 0x000c0000\r
+#define HID_UP_DIGITIZER 0x000d0000\r
+#define HID_UP_PID 0x000f0000\r
+\r
+#define HID_USAGE 0x0000ffff\r
+\r
+#define HID_GD_POINTER 0x00010001\r
+#define HID_GD_MOUSE 0x00010002\r
+#define HID_GD_JOYSTICK 0x00010004\r
+#define HID_GD_GAMEPAD 0x00010005\r
+#define HID_GD_HATSWITCH 0x00010039\r
+\r
+//\r
+// HID report types\r
+//\r
+#define HID_INPUT_REPORT 1\r
+#define HID_OUTPUT_REPORT 2\r
+#define HID_FEATURE_REPORT 3\r
+\r
+//\r
+// HID device quirks.\r
+//\r
+#define HID_QUIRK_INVERT 0x01\r
+#define HID_QUIRK_NOTOUCH 0x02\r
+\r
+//\r
+// HID class protocol request\r
+//\r
+#define EFI_USB_GET_REPORT_REQUEST 0x01\r
+#define EFI_USB_GET_IDLE_REQUEST 0x02\r
+#define EFI_USB_GET_PROTOCOL_REQUEST 0x03\r
+#define EFI_USB_SET_REPORT_REQUEST 0x09\r
+#define EFI_USB_SET_IDLE_REQUEST 0x0a\r
+#define EFI_USB_SET_PROTOCOL_REQUEST 0x0b\r
+\r
+#pragma pack(1)\r
+//\r
+// Descriptor header for Report/Physical Descriptors\r
+//\r
+typedef struct hid_class_descriptor {\r
+ UINT8 DescriptorType;\r
+ UINT16 DescriptorLength;\r
+} EFI_USB_HID_CLASS_DESCRIPTOR;\r
+\r
+typedef struct hid_descriptor {\r
+ UINT8 Length;\r
+ UINT8 DescriptorType;\r
+ UINT16 BcdHID;\r
+ UINT8 CountryCode;\r
+ UINT8 NumDescriptors;\r
+ EFI_USB_HID_CLASS_DESCRIPTOR HidClassDesc[1];\r
+} EFI_USB_HID_DESCRIPTOR;\r
+\r
+#pragma pack()\r
+\r
+EFI_STATUS\r
+UsbGetHidDescriptor (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 InterfaceNum,\r
+ OUT EFI_USB_HID_DESCRIPTOR *HidDescriptor\r
+ );\r
+\r
+EFI_STATUS\r
+UsbGetReportDescriptor (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 InterfaceNum,\r
+ IN UINT16 DescriptorSize,\r
+ OUT UINT8 *DescriptorBuffer\r
+ );\r
+\r
+EFI_STATUS\r
+UsbGetProtocolRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 *Protocol\r
+ );\r
+\r
+EFI_STATUS\r
+UsbSetProtocolRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 Protocol\r
+ );\r
+\r
+EFI_STATUS\r
+UsbSetIdleRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 ReportId,\r
+ IN UINT8 Duration\r
+ );\r
+\r
+EFI_STATUS\r
+UsbGetIdleRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 ReportId,\r
+ OUT UINT8 *Duration\r
+ );\r
+\r
+EFI_STATUS\r
+UsbSetReportRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 ReportId,\r
+ IN UINT8 ReportType,\r
+ IN UINT16 ReportLen,\r
+ IN UINT8 *Report\r
+ );\r
+\r
+EFI_STATUS\r
+UsbGetReportRequest (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 Interface,\r
+ IN UINT8 ReportId,\r
+ IN UINT8 ReportType,\r
+ IN UINT16 ReportLen,\r
+ IN UINT8 *Report\r
+ );\r
+\r
+//\r
+// Get Device Descriptor\r
+//\r
+EFI_STATUS\r
+UsbGetDescriptor (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 Value,\r
+ IN UINT16 Index,\r
+ IN UINT16 DescriptorLength,\r
+ OUT VOID *Descriptor,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Set Device Descriptor\r
+//\r
+EFI_STATUS\r
+UsbSetDescriptor (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 Value,\r
+ IN UINT16 Index,\r
+ IN UINT16 DescriptorLength,\r
+ IN VOID *Descriptor,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Get device Interface\r
+//\r
+EFI_STATUS\r
+UsbGetDeviceInterface (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 Index,\r
+ OUT UINT8 *AltSetting,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Set device interface\r
+//\r
+EFI_STATUS\r
+UsbSetDeviceInterface (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 InterfaceNo,\r
+ IN UINT16 AltSetting,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Get device configuration\r
+//\r
+EFI_STATUS\r
+UsbGetDeviceConfiguration (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ OUT UINT8 *ConfigValue,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Set device configuration\r
+//\r
+EFI_STATUS\r
+UsbSetDeviceConfiguration (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 Value,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Set Device Feature\r
+//\r
+EFI_STATUS\r
+UsbSetDeviceFeature (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN EFI_USB_RECIPIENT Recipient,\r
+ IN UINT16 Value,\r
+ IN UINT16 Target,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Clear Device Feature\r
+//\r
+EFI_STATUS\r
+UsbClearDeviceFeature (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN EFI_USB_RECIPIENT Recipient,\r
+ IN UINT16 Value,\r
+ IN UINT16 Target,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Get Device Status\r
+//\r
+EFI_STATUS\r
+UsbGetDeviceStatus (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN EFI_USB_RECIPIENT Recipient,\r
+ IN UINT16 Target,\r
+ OUT UINT16 *DevStatus,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// The following APIs are not basic library, but they are common used.\r
+//\r
+//\r
+// Usb Get String\r
+//\r
+EFI_STATUS\r
+UsbGetString (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT16 LangID,\r
+ IN UINT8 Index,\r
+ IN VOID *Buf,\r
+ IN UINTN BufSize,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+//\r
+// Clear endpoint stall\r
+//\r
+EFI_STATUS\r
+UsbClearEndpointHalt (\r
+ IN EFI_USB_IO_PROTOCOL *UsbIo,\r
+ IN UINT8 EndpointNo,\r
+ OUT UINT32 *Status\r
+ );\r
+\r
+#endif\r
#include <Ppi/CpuIo.h>\r
#include <Ppi/PciCfg2.h>\r
\r
+\r
/**\r
The PEI Dispatcher will invoke each PEIM one time. During this pass, the PEI \r
Dispatcher will pass control to the PEIM at the AddressOfEntryPoint in the PE Header. \r
UINTN StackSize;\r
} EFI_SEC_PEI_HAND_OFF;\r
\r
+\r
+/**\r
+\r
+ This function is the entry point for the PEI Foundation, which\r
+ allows the SEC phase to pass information about the stack,\r
+ temporary RAM and the Boot Firmware Volume. In addition, it also\r
+ allows the SEC phase to pass services and data forward for use\r
+ during the PEI phase in the form of one or more PPIs. There is\r
+ no limit to the number of additional PPIs that can be passed\r
+ from SEC into the PEI Foundation. As part of its initialization\r
+ phase, the PEI Foundation will add these SEC-hosted PPIs to its\r
+ PPI database such that both the PEI Foundation and any modules\r
+ can leverage the associated service calls and/or code in these\r
+ early PPIs.\r
+\r
+ @param SecCoreData Points to a data structure containing\r
+ information about the PEI core's\r
+ operating environment, such as the size\r
+ and location of temporary RAM, the stack\r
+ location and the BFV location. The type\r
+ EFI_SEC_PEI_HAND_OFF is\r
+\r
+ @param PpiList Points to a list of one or more PPI\r
+ descriptors to be installed initially by\r
+ the PEI core. An empty PPI list consists\r
+ of a single descriptor with the end-tag\r
+ EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST.\r
+ As part of its initialization phase, the\r
+ PEI Foundation will add these SEC-hosted\r
+ PPIs to its PPI database such that both\r
+ the PEI Foundation and any modules can\r
+ leverage the associated service calls\r
+ and/or code in these early PPIs.\r
+\r
+\r
+**/\r
+typedef\r
+VOID\r
+EFIAPI\r
+(*EFI_PEI_CORE_ENTRY_POINT)(\r
+ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData,\r
+ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList\r
+);\r
+\r
#endif\r
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