global ASM_PFX(gcSmiHandlerTemplate)\r
global ASM_PFX(gcSmiHandlerSize)\r
global ASM_PFX(gSmiCr3)\r
-global ASM_PFX(gSmiStack)\r
+global ASM_PFX(gPatchSmiStack)\r
global ASM_PFX(gPatchSmbase)\r
global ASM_PFX(mXdSupported)\r
extern ASM_PFX(gSmiHandlerIdtr)\r
o16 mov fs, ax\r
o16 mov gs, ax\r
o16 mov ss, ax\r
- DB 0xbc ; mov esp, imm32\r
-ASM_PFX(gSmiStack): DD 0\r
+ mov esp, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmiStack):\r
mov eax, ASM_PFX(gSmiHandlerIdtr)\r
lidt [eax]\r
jmp ProtFlatMode\r
/// Variables from SMI Handler\r
///\r
X86_ASSEMBLY_PATCH_LABEL gPatchSmbase;\r
-extern volatile UINT32 gSmiStack;\r
+X86_ASSEMBLY_PATCH_LABEL gPatchSmiStack;\r
extern UINT32 gSmiCr3;\r
extern volatile UINT8 gcSmiHandlerTemplate[];\r
extern CONST UINT16 gcSmiHandlerSize;\r
)\r
{\r
PROCESSOR_SMM_DESCRIPTOR *Psd;\r
+ UINT32 CpuSmiStack;\r
\r
//\r
// Initialize PROCESSOR_SMM_DESCRIPTOR\r
//\r
// Initialize values in template before copy\r
//\r
- gSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));\r
+ CpuSmiStack = (UINT32)((UINTN)SmiStack + StackSize - sizeof (UINTN));\r
+ PatchInstructionX86 (gPatchSmiStack, CpuSmiStack, 4);\r
gSmiCr3 = Cr3;\r
PatchInstructionX86 (gPatchSmbase, SmBase, 4);\r
gSmiHandlerIdtr.Base = IdtBase;\r
//\r
// Set the value at the top of the CPU stack to the CPU Index\r
//\r
- *(UINTN*)(UINTN)gSmiStack = CpuIndex;\r
+ *(UINTN*)(UINTN)CpuSmiStack = CpuIndex;\r
\r
//\r
// Copy template to CPU specific SMI handler location\r
\r
global ASM_PFX(gPatchSmbase)\r
global ASM_PFX(mXdSupported)\r
-global ASM_PFX(gSmiStack)\r
+global ASM_PFX(gPatchSmiStack)\r
global ASM_PFX(gSmiCr3)\r
global ASM_PFX(gcSmiHandlerTemplate)\r
global ASM_PFX(gcSmiHandlerSize)\r
o16 mov fs, ax\r
o16 mov gs, ax\r
o16 mov ss, ax\r
- DB 0xbc ; mov esp, imm32\r
-ASM_PFX(gSmiStack): DD 0\r
+ mov esp, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmiStack):\r
jmp ProtFlatMode\r
\r
BITS 64\r