]> git.proxmox.com Git - mirror_edk2.git/commitdiff
Add vpush/vpop to the exception handler as we added CopyMem/SetMem that can use NEON...
authorandrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 8 Dec 2010 00:14:23 +0000 (00:14 +0000)
committerandrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 8 Dec 2010 00:14:23 +0000 (00:14 +0000)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11130 6f19259b-4bc3-4df7-8a09-765794883524

ArmPkg/Drivers/CpuDxe/ExceptionSupport.ARMv6.S
ArmPkg/Drivers/CpuDxe/ExceptionSupport.ARMv6.asm

index edf3d4723f2184113d56dee7f0f417bd1ec95449..a4e165fdc7fe24f593fd9b5c9b6456d264478560 100644 (file)
@@ -57,6 +57,7 @@ This is the stack constructed by the exception handler (low address to high addr
 .globl ASM_PFX(CommonCExceptionHandler)
 
 .text
+.fpu neon    @ makes vpush/vpop assemble
 .align 3
 
 
@@ -246,6 +247,8 @@ NoAdjustNeeded:
                                     @ R0 is ExceptionType 
   mov       R1,SP                   @ R1 is SystemContext 
 
+  vpush     {d0-d15}                @ save vstm registers in case they are used in optimizations\r
+
 /* 
 VOID
 EFIAPI
@@ -257,6 +260,8 @@ CommonCExceptionHandler (
 */  
   blx       ASM_PFX(CommonCExceptionHandler)  @ Call exception handler
 
+  vpop      {d0-d15}  
+
   ldr       R1, [SP, #0x4c]         @ Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
   mcr       p15, 0, R1, c5, c0, 1   @ Write IFSR
 
index 8584ef079448d219ab6c3c9386da57aa7ec25b34..a8a477026eeb1636bd949f1ee8a2e72b13fefd58 100644 (file)
@@ -243,6 +243,8 @@ NoAdjustNeeded
                                     ; R0 is ExceptionType 
   mov       R1,SP                   ; R1 is SystemContext 
 
+  vpush    {d0-d15}                  ; save vstm registers in case they are used in optimizations\r
+
 /* 
 VOID
 EFIAPI
@@ -253,6 +255,8 @@ CommonCExceptionHandler (
 
 */
   blx       CommonCExceptionHandler ; Call exception handler
+\r
+  vpop      {d0-d15}\r
   
   ldr       R1, [SP, #0x4c]         ; Restore EFI_SYSTEM_CONTEXT_ARM.IFSR
   mcr       p15, 0, R1, c5, c0, 1   ; Write IFSR