MdeModulePkg XhciDxe: Assign Usb2Hc.XXXRevision based on SBRN

Current hard code Usb2Hc.XXXRevision may be not accurate.
This patch updates code to assign Usb2Hc.XXXRevision based on
SBRN (Serial Bus Release Number, PCI configuration space offset
0x60) although there is no code consuming them.

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 48eccf770a35f9be5092faf11f3a2968a04230ae..4796d4611b19ed7fdd6ec63d147bddd692c240b8 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -1770,6 +1770,7 @@ XhcCreateUsbHc (
   EFI_STATUS              Status;\r
   UINT32                  PageSize;\r
   UINT16                  ExtCapReg;\r
+  UINT8                   ReleaseNumber;\r
 \r
   Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));\r
 \r
@@ -1786,6 +1787,19 @@ XhcCreateUsbHc (
   Xhc->OriginalPciAttributes = OriginalPciAttributes;\r
   CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));\r
 \r
+  Status = PciIo->Pci.Read (\r
+                        PciIo,\r
+                        EfiPciIoWidthUint8,\r
+                        XHC_PCI_SBRN_OFFSET,\r
+                        1,\r
+                        &ReleaseNumber\r
+                        );\r
+\r
+  if (!EFI_ERROR (Status)) {\r
+    Xhc->Usb2Hc.MajorRevision = (ReleaseNumber & 0xF0) >> 4;\r
+    Xhc->Usb2Hc.MinorRevision = (ReleaseNumber & 0x0F);\r
+  }\r
+\r
   InitializeListHead (&Xhc->AsyncIntTransfers);\r
 \r
   //\r

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
index 20e7ac0e8f02ae43661b8518286557f0988ab9fa..feef3a4bd5efd7d74e9595d44f7239c75d04c4ab 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
@@ -26,6 +26,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define XHC_PCI_BAR_OFFSET          0x10       // Memory Bar Register Offset\r
 #define XHC_PCI_BAR_MASK            0xFFFF     // Memory Base Address Mask\r
 \r
+#define XHC_PCI_SBRN_OFFSET         0x60       // Serial Bus Release Number Register Offset\r
+\r
 #define USB_HUB_CLASS_CODE          0x09\r
 #define USB_HUB_SUBCLASS_CODE       0x00\r
 \r