MdePkg: Add definitions for SMBIOS spec 3.1.0

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=340

TPM Device (Type 43) definition has been added at
713e4b007cb791829397522ad8f366dd1e08bee6.

This patch is to add definitions for below items.
• BIOS Information (Type 0):
– Add new entry for extended BIOS ROM size
• System Enclosure or Chassis (Type 3):
– Add new chassis types: IoT Gateway and Embedded PC
– Add new chassis types: Mini PC and Stick PC
• Processor Information (Type 4):
– Add Intel Core m3 m5 m7 processors
– Add processor socket AM4
– Add processor socket LGA1151
– Add processor socket BGA1356, BGA1440, BGA1515
– Add AMD Opteron A-Series processor
– Add processor socket LGA3647-1
– Add processor socket SP3 Processors
– Add families for ARMv7 and ARMv8
– Add family for AMD Opteron(TM) X3000 Series APU
• Cache Information (Type 7):
– Extend to support Cache sizes >2047 MB
• System Slots (Type 9):
– Add Mini PCIe support

Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/IndustryStandard/SmBios.h
index f72a56d6a0d31bfa8e6fa8142f190d29ce390b76..f5c29bcbd0c8331ba3168e43264cc7a8c5e5c321 100644 (file)
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
 /** @file\r
-  Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r
+  Industry Standard Definitions of SMBIOS Table Specification v3.1.0.\r
 \r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
 (C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
 This program and the accompanying materials are licensed and made available under \r
 the terms and conditions of the BSD License that accompanies this distribution.  \r
@@ -267,6 +267,14 @@ typedef struct {
   MBCE_SYSTEM_RESERVED  SystemReserved;\r
 } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
 \r
+///\r
+/// Extended BIOS ROM size.\r
+///\r
+typedef struct {\r
+  UINT16 Size           :14;\r
+  UINT16 Unit           :2;\r
+} EXTENDED_BIOS_ROM_SIZE;\r
+\r
 ///\r
 /// BIOS Information (Type 0).\r
 ///\r
@@ -283,6 +291,10 @@ typedef struct {
   UINT8                     SystemBiosMinorRelease;\r
   UINT8                     EmbeddedControllerFirmwareMajorRelease;\r
   UINT8                     EmbeddedControllerFirmwareMinorRelease;\r
+  //\r
+  // Add for smbios 3.1.0\r
+  //\r
+  EXTENDED_BIOS_ROM_SIZE    ExtendedBiosSize;\r
 } SMBIOS_TABLE_TYPE0;\r
 \r
 ///\r
@@ -407,7 +419,11 @@ typedef enum {
   MiscChassisBladeEnclosure           = 0x1D,\r
   MiscChassisTablet                   = 0x1E,\r
   MiscChassisConvertible              = 0x1F,\r
-  MiscChassisDetachable               = 0x20\r
+  MiscChassisDetachable               = 0x20,\r
+  MiscChassisIoTGateway               = 0x21,\r
+  MiscChassisEmbeddedPc               = 0x22,\r
+  MiscChassisMiniPc                   = 0x23,\r
+  MiscChassisStickPc                  = 0x24\r
 } MISC_CHASSIS_TYPE;\r
 \r
 ///\r
@@ -540,6 +556,9 @@ typedef enum {
   ProcessorFamilyIntelCoreSoloMobile    = 0x2A,\r
   ProcessorFamilyIntelAtom              = 0x2B,\r
   ProcessorFamilyIntelCoreM             = 0x2C,\r
+  ProcessorFamilyIntelCorem3            = 0x2D,\r
+  ProcessorFamilyIntelCorem5            = 0x2E,\r
+  ProcessorFamilyIntelCorem7            = 0x2F,\r
   ProcessorFamilyAlpha                  = 0x30,\r
   ProcessorFamilyAlpha21064             = 0x31,\r
   ProcessorFamilyAlpha21066             = 0x32,\r
@@ -590,6 +609,8 @@ typedef enum {
   ProcessorFamilyAmdAthlonX4QuadCore    = 0x66,\r
   ProcessorFamilyAmdOpteronX1000Series  = 0x67,\r
   ProcessorFamilyAmdOpteronX2000Series  = 0x68,\r
+  ProcessorFamilyAmdOpteronASeries      = 0x69,\r
+  ProcessorFamilyAmdOpteronX3000Series  = 0x6A,\r
   ProcessorFamilyHobbit                 = 0x70,\r
   ProcessorFamilyCrusoeTM5000           = 0x78,\r
   ProcessorFamilyCrusoeTM3000           = 0x79,\r
@@ -699,6 +720,8 @@ typedef enum {
 /// Processor Information2 - Processor Family2.\r
 ///\r
 typedef enum {\r
+  ProcessorFamilyARMv7                 = 0x0100,\r
+  ProcessorFamilyARMv8                 = 0x0101,\r
   ProcessorFamilySH3                   = 0x0104,\r
   ProcessorFamilySH4                   = 0x0105,\r
   ProcessorFamilyARM                   = 0x0118,\r
@@ -774,7 +797,14 @@ typedef enum {
   ProcessorUpgradeSocketLGA1150   = 0x2D,\r
   ProcessorUpgradeSocketBGA1168   = 0x2E,\r
   ProcessorUpgradeSocketBGA1234   = 0x2F,\r
-  ProcessorUpgradeSocketBGA1364   = 0x30\r
+  ProcessorUpgradeSocketBGA1364   = 0x30,\r
+  ProcessorUpgradeSocketAM4       = 0x31,\r
+  ProcessorUpgradeSocketLGA1151   = 0x32,\r
+  ProcessorUpgradeSocketBGA1356   = 0x33,\r
+  ProcessorUpgradeSocketBGA1440   = 0x34,\r
+  ProcessorUpgradeSocketBGA1515   = 0x35,\r
+  ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
+  ProcessorUpgradeSocketSP3       = 0x37\r
 } PROCESSOR_UPGRADE;\r
 \r
 ///\r
@@ -1081,6 +1111,11 @@ typedef struct {
   UINT8                     ErrorCorrectionType;            ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
   UINT8                     SystemCacheType;                ///< The enumeration value from CACHE_TYPE_DATA.\r
   UINT8                     Associativity;                  ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
+  //\r
+  // Add for smbios 3.1.0\r
+  //\r
+  UINT32                    MaximumCacheSize2;\r
+  UINT32                    InstalledSize2;\r
 } SMBIOS_TABLE_TYPE7;\r
 \r
 ///\r
@@ -1225,6 +1260,9 @@ typedef enum {
   SlotTypeMxm30TypeB                   = 0x1E,\r
   SlotTypePciExpressGen2Sff_8639       = 0x1F,\r
   SlotTypePciExpressGen3Sff_8639       = 0x20,\r
+  SlotTypePciExpressMini52pinWithBSKO  = 0x21,      ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
+  SlotTypePciExpressMini52pinWithoutBSKO = 0x22,    ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
+  SlotTypePciExpressMini76pin          = 0x23,      ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
   SlotTypePC98C20                      = 0xA0,\r
   SlotTypePC98C24                      = 0xA1,\r
   SlotTypePC98E                        = 0xA2,\r