From: Maurice Ma <maurice.ma@intel.com>
Date: Mon, 17 Oct 2016 17:48:04 +0000 (-0700)
Subject: CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit
X-Git-Tag: edk2-stable201903~5579
X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=0613ccbd1357b1f6aecab27a2e72dde328d36f6d

CorebootPayloadPkg/PciHostBridgeLib: Fix the wrong PCI resource limit

The current PCI resource limit calculation in CorebootPayloadPkg
PciHostBridgeLib is wrong. Adjusted it to match the PciHostBridge
driver's expectation.

Cc: Prince Agyeman <prince.agyeman@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by : Prince Agyeman <prince.agyeman@intel.com>
---

diff --git a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
index 0f1c8cb1a2..6d94ff72c9 100644
--- a/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
+++ b/CorebootPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c
@@ -91,7 +91,7 @@ AdjustRootBridgeResource (
   // Align IO  resource at 4K  boundary
   //
   Mask        = 0xFFFULL;
-  Io->Limit   = (Io->Limit + Mask) & ~Mask;
+  Io->Limit   = ((Io->Limit + Mask) & ~Mask) - 1;
   if (Io->Base != MAX_UINT64) {
     Io->Base &= ~Mask;
   }
@@ -100,7 +100,7 @@ AdjustRootBridgeResource (
   // Align MEM resource at 1MB boundary
   //
   Mask        = 0xFFFFFULL;
-  Mem->Limit  = (Mem->Limit + Mask) & ~Mask;
+  Mem->Limit  = ((Mem->Limit + Mask) & ~Mask) - 1;
   if (Mem->Base != MAX_UINT64) {
     Mem->Base &= ~Mask;
   }