From: Yao, Jiewen Date: Wed, 25 Nov 2015 04:01:00 +0000 (+0000) Subject: Correct TSS segment. X-Git-Tag: edk2-stable201903~8521 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=20ab326972339d16d7e95d94f9d7710cae1ae75f Correct TSS segment. TSS segment should use (SIZE - 1) as limit, and do not set G bit (highest bit of LimitHigh) because limit means byte count. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Yao, Jiewen" Reviewed-by: "Fan, Jeff" Reviewed-by: "Kinney, Michael D" git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18935 6f19259b-4bc3-4df7-8a09-765794883524 --- diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S index 69dfd946de..4130bf5be5 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S @@ -82,18 +82,18 @@ CodeSeg64: .equ GDT_SIZE, .- NullSeg TssSeg: - .word TSS_DESC_SIZE # LimitLow + .word TSS_DESC_SIZE -1 # LimitLow .word 0 # BaseLow .byte 0 # BaseMid .byte 0x89 - .byte 0x80 # LimitHigh + .byte 0x00 # LimitHigh .byte 0 # BaseHigh ExceptionTssSeg: - .word TSS_DESC_SIZE # LimitLow + .word TSS_DESC_SIZE - 1 # LimitLow .word 0 # BaseLow .byte 0 # BaseMid .byte 0x89 - .byte 0x80 # LimitHigh + .byte 0x00 # LimitHigh .byte 0 # BaseHigh .equ CODE_SEL, CodeSeg32 - NullSeg diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm index 65a120e1e7..b4eb492da0 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm @@ -85,18 +85,18 @@ CodeSeg64 LABEL QWORD GDT_SIZE = $ - offset NullSeg TssSeg LABEL QWORD - DW TSS_DESC_SIZE ; LimitLow + DW TSS_DESC_SIZE - 1 ; LimitLow DW 0 ; BaseLow DB 0 ; BaseMid DB 89h - DB 080h ; LimitHigh + DB 00h ; LimitHigh DB 0 ; BaseHigh ExceptionTssSeg LABEL QWORD - DW TSS_DESC_SIZE ; LimitLow + DW TSS_DESC_SIZE - 1 ; LimitLow DW 0 ; BaseLow DB 0 ; BaseMid DB 89h - DB 080h ; LimitHigh + DB 00h ; LimitHigh DB 0 ; BaseHigh CODE_SEL = offset CodeSeg32 - offset NullSeg diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S index 6dbcaa5b67..2ae6f2c32f 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S @@ -79,11 +79,11 @@ CodeSeg64: .byte 0 # BaseHigh # TSS Segment for X64 specially TssSeg: - .word TSS_DESC_SIZE # LimitLow + .word TSS_DESC_SIZE - 1 # LimitLow .word 0 # BaseLow .byte 0 # BaseMid .byte 0x89 - .byte 0xDB # LimitHigh + .byte 0x00 # LimitHigh .byte 0 # BaseHigh .long 0 # BaseUpper .long 0 # Reserved diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm index 3d841c6546..ab716450b7 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm @@ -78,11 +78,11 @@ CodeSeg64 LABEL QWORD DB 0 ; BaseHigh ; TSS Segment for X64 specially TssSeg LABEL QWORD - DW TSS_DESC_SIZE ; LimitLow + DW TSS_DESC_SIZE - 1 ; LimitLow DW 0 ; BaseLow DB 0 ; BaseMid DB 89h - DB 080h ; LimitHigh + DB 00h ; LimitHigh DB 0 ; BaseHigh DD 0 ; BaseUpper DD 0 ; Reserved