From: rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524>
Date: Wed, 22 Dec 2010 03:15:24 +0000 (+0000)
Subject: Document the inconsistency of EFI_SMM_CPU_SAVE_STATE between the EDK2 code base and... 
X-Git-Tag: edk2-stable201903~15287
X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=23228db3827140cea7be70a20bb62cbcd9636cd7

Document the inconsistency of EFI_SMM_CPU_SAVE_STATE between the EDK2 code base and the Framework SMM CIS 0.91 spec.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11188 6f19259b-4bc3-4df7-8a09-765794883524
---

diff --git a/IntelFrameworkPkg/FrameworkSpecConformance.txt b/IntelFrameworkPkg/FrameworkSpecConformance.txt
index 96fa3c7c10..ae4e38b2c6 100644
--- a/IntelFrameworkPkg/FrameworkSpecConformance.txt
+++ b/IntelFrameworkPkg/FrameworkSpecConformance.txt
@@ -1193,6 +1193,20 @@
     The enumeration fields listed above are *NOT* defined in Framework SmmCis specification 0.91. EdkII introduces
     these fields to support new SMI types.
 
+  3. Include/Framework/SmmCis.h
+    typedef union {
+      ///
+      /// The processor save-state information for IA-32 processors. 
+      ///
+      EFI_SMI_CPU_SAVE_STATE     Ia32SaveState;
+      ///
+      /// Note: Inconsistency with the Framework SMM CIS spec - Itanium save state not included.
+      ///
+      /// The processor save-state information for Itanium processors.
+      ///
+      /// EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+    } EFI_SMM_CPU_SAVE_STATE;
+
 ##
 # Mismatch with Intel Platform Innovation Framework for EFI S3 Resume Boot Path Specification (Version 0.9)
 ##