From: oliviermartin Date: Wed, 14 Dec 2011 10:35:04 +0000 (+0000) Subject: ArmPlatformPkg/LcdPlatformLib: Produce the protocols EFI_EDID_DISCOVERED_PROTOCOL... X-Git-Tag: edk2-stable201903~13756 X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=6d8d7363347b58834e74271ca0ff49569db8e5da ArmPlatformPkg/LcdPlatformLib: Produce the protocols EFI_EDID_DISCOVERED_PROTOCOL and EFI_EDID_ACTIVE_PROTOCOL These two EDID protocols are excepted to be produced by the GOP. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12860 6f19259b-4bc3-4df7-8a09-765794883524 --- diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c index c4140150f8..3b2f63fb66 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c @@ -13,9 +13,13 @@ #include -#include -#include #include +#include +#include +#include + +#include +#include #include @@ -50,14 +54,33 @@ CLCD_RESOLUTION mResolutions[] = { } }; +EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = { + 0, + NULL +}; + +EFI_EDID_ACTIVE_PROTOCOL mEdidActive = { + 0, + NULL +}; EFI_STATUS LcdPlatformInitializeDisplay ( - VOID + IN EFI_HANDLE Handle ) { + EFI_STATUS Status; + MmioWrite32(ARM_EB_SYS_CLCD_REG, 1); + // Install the EDID Protocols + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered, + &gEfiEdidActiveProtocolGuid, &mEdidActive, + NULL + ); + return EFI_SUCCESS; } diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c index 31a3549f13..f6f01fa20d 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c @@ -21,6 +21,8 @@ #include #include +#include +#include #include @@ -41,94 +43,119 @@ typedef struct { LCD_RESOLUTION mResolutions[] = { - { // Mode 0 : VGA : 640 x 480 x 24 bpp - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY, - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH - }, - { // Mode 1 : SVGA : 800 x 600 x 24 bpp - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY, - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH - }, - { // Mode 2 : XGA : 1024 x 768 x 24 bpp - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY, - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH - }, - { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp - SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2), - SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH, - SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH - }, - { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp - UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2), - UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH, - UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH - }, - { // Mode 5 : HD : 1920 x 1080 x 24 bpp - HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2), - HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH, - HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH - }, - { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode) - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY, - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH - }, - { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode) - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY, - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH - }, - { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode) - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY, - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH - }, - { // Mode 9 : VGA : 640 x 480 x 15 bpp - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY, - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH - }, - { // Mode 10 : SVGA : 800 x 600 x 15 bpp - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY, - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH - }, - { // Mode 11 : XGA : 1024 x 768 x 15 bpp - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY, - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH - }, - { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000, - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH - }, - { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode) - VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY, - VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, - VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH - }, - { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode) - SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY, - SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, - SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH - }, - { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode) - XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY, - XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, - XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH - } + { // Mode 0 : VGA : 640 x 480 x 24 bpp + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY, + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH + }, + { // Mode 1 : SVGA : 800 x 600 x 24 bpp + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY, + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH + }, + { // Mode 2 : XGA : 1024 x 768 x 24 bpp + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + }, + { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp + SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2), + SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH, + SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH + }, + { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp + UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2), + UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH, + UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH + }, + { // Mode 5 : HD : 1920 x 1080 x 24 bpp + HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2), + HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH, + HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH + }, + { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode) + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY, + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH + }, + { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode) + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY, + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH + }, + { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode) + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + }, + { // Mode 9 : VGA : 640 x 480 x 15 bpp + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY, + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH + }, + { // Mode 10 : SVGA : 800 x 600 x 15 bpp + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY, + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH + }, + { // Mode 11 : XGA : 1024 x 768 x 15 bpp + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + }, + { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + }, + { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode) + VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY, + VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH, + VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH + }, + { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode) + SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY, + SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH, + SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH + }, + { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode) + XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY, + XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH, + XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH + } +}; + +EFI_EDID_DISCOVERED_PROTOCOL mEdidDiscovered = { + 0, + NULL }; +EFI_EDID_ACTIVE_PROTOCOL mEdidActive = { + 0, + NULL +}; + + EFI_STATUS LcdPlatformInitializeDisplay ( - VOID - ) { + IN EFI_HANDLE Handle + ) +{ + EFI_STATUS Status; + // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard - return ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE); + Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE); + if (!EFI_ERROR(Status)) { + // Install the EDID Protocols + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gEfiEdidDiscoveredProtocolGuid, &mEdidDiscovered, + &gEfiEdidActiveProtocolGuid, &mEdidActive, + NULL + ); + } + + return Status; } EFI_STATUS diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c index a0cf9afe2e..229d2a6aa2 100644 --- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c +++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c @@ -125,7 +125,7 @@ InitializeDisplay ( goto EXIT_ERROR_LCD_SHUTDOWN; } - Status = LcdPlatformInitializeDisplay (); + Status = LcdPlatformInitializeDisplay (Instance->Handle); if (EFI_ERROR(Status)) { goto EXIT_ERROR_LCD_SHUTDOWN; } diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h index 93afa6322e..7a424c0ad7 100644 --- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h +++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h @@ -158,7 +158,7 @@ typedef enum { EFI_STATUS LcdPlatformInitializeDisplay ( - VOID + IN EFI_HANDLE Handle ); EFI_STATUS