From: Ruiyu Ni <ruiyu.ni@intel.com>
Date: Fri, 20 Oct 2017 09:55:01 +0000 (+0800)
Subject: MdeModulePkg/PciBus: Fix bug that PCI BUS claims too much resource
X-Git-Tag: edk2-stable201903~3194
X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=commitdiff_plain;h=6e3287442774c1a4bc83f127694700eeb07c18dc

MdeModulePkg/PciBus: Fix bug that PCI BUS claims too much resource

The bug was caused by 728d74973c9262b6c7b7ef4be213223d55affec3
"MdeModulePkg/PciBus: Count multiple hotplug resource paddings".

The patch firstly updated the Bridge->Alignment to the maximum
alignment of all devices under the bridge, then aligned the
Bridge->Length to Bridge->Alignment.
It caused too much resources were claimed.

The new patch firstly aligns Bridge->Length to Bridge->Alignment,
then updates the Bridge->Alignment to the maximum alignment of all
devices under the bridge.
Because the step to update the Bridge->Alignment is to make sure
the resource allocated to the bus under the Bridge meets all
devices alignment. But the Bridge->Length doesn't have to align
to the maximum alignment.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
---

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
index 8dbe9a0038..2f713fcee9 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c
@@ -389,18 +389,7 @@ CalculateResourceAperture (
   }
 
   //
-  // Adjust the bridge's alignment to the MAX (first) alignment of all children.
-  //
-  CurrentLink = Bridge->ChildList.ForwardLink;
-  if (CurrentLink != &Bridge->ChildList) {
-    Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
-    if (Node->Alignment > Bridge->Alignment) {
-      Bridge->Alignment = Node->Alignment;
-    }
-  }
-
-  //
-  // At last, adjust the aperture with the bridge's alignment
+  // Adjust the aperture with the bridge's alignment
   //
   Aperture[PciResUsageTypical] = ALIGN_VALUE (Aperture[PciResUsageTypical], Bridge->Alignment + 1);
   Aperture[PciResUsagePadding] = ALIGN_VALUE (Aperture[PciResUsagePadding], Bridge->Alignment + 1);
@@ -410,6 +399,17 @@ CalculateResourceAperture (
   // Use the larger one between the padding resource and actual occupied resource.
   //
   Bridge->Length = MAX (Aperture[PciResUsageTypical], Aperture[PciResUsagePadding]);
+
+  //
+  // Adjust the bridge's alignment to the MAX (first) alignment of all children.
+  //
+  CurrentLink = Bridge->ChildList.ForwardLink;
+  if (CurrentLink != &Bridge->ChildList) {
+    Node = RESOURCE_NODE_FROM_LINK (CurrentLink);
+    if (Node->Alignment > Bridge->Alignment) {
+      Bridge->Alignment = Node->Alignment;
+    }
+  }
 }
 
 /**